Welcome to TMC-API’s documentation!

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DOCS

struct ConfigurationTypeDef
#include <Config.h>

Public Members

ConfigState state
uint8_t configIndex
int32_t shadowRegister[TMC_REGISTER_COUNT]
uint8_t (*reset)(void)
uint8_t (*restore)(void)
tmc_callback_config callback
uint8_t channel
struct CRCTypeDef

Public Members

uint8_t table[256]
uint8_t polynomial
bool isReflected
struct MAX22216TypeDef
#include <MAX22216.h>

Public Members

uint8_t channel
uint8_t slaveAddress
uint8_t crc_en
struct TChopperConfig

Public Members

uint8_t BlankTime
uint8_t ChopperMode
uint8_t HysteresisDecay
uint8_t RandomTOff
uint8_t HysteresisEnd
uint8_t HysteresisStart
uint8_t TOff
uint8_t DisableFlag
struct TClosedLoopConfig
#include <Configs.h>

Public Members

uint8_t ClosedLoopMode
uint32_t GammaVMin
uint32_t GammaVAdd
uint8_t Gamma
uint16_t Beta
uint32_t Offset
uint8_t CurrentScalerMinimum
uint8_t CurrentScalerMaximum
uint8_t CurrentScalerStartUp
uint32_t UpscaleDelay
uint32_t DownscaleDelay
uint32_t CorrectionVelocityP
uint32_t CorrectionVelocityI
uint32_t CorrectionVelocityIClip
uint32_t CorrectionVelocityDClk
uint32_t CorrectionVelocityDClip
uint32_t PositionCorrectionP
uint32_t PositionCorrectionTolerance
uint32_t PositionWindow
uint8_t EncVMeanWait
uint8_t EncVMeanFilter
uint32_t EncVMeanInt
int8_t EncoderCorrectionYOffset
struct TDriverConfig

Public Members

uint8_t SlopeHighSide
uint8_t SlopeLowSide
uint8_t ProtectionDisable
uint8_t ProtectionTimer
uint8_t StepDirectionDisable
uint8_t VSenseScale
uint8_t ReadBackSelect
struct TMC2130TypeDef
#include <TMC2130.h>

Public Members

ConfigurationTypeDef *config
int32_t registerResetState[TMC2130_REGISTER_COUNT]
uint8_t registerAccess[TMC2130_REGISTER_COUNT]
struct TMC2160TypeDef
#include <TMC2160.h>

Public Members

ConfigurationTypeDef *config
int32_t registerResetState[TMC2160_REGISTER_COUNT]
uint8_t registerAccess[TMC2160_REGISTER_COUNT]
struct TMC2208TypeDef
#include <TMC2208.h>

Public Members

ConfigurationTypeDef *config
int32_t registerResetState[TMC2208_REGISTER_COUNT]
uint8_t registerAccess[TMC2208_REGISTER_COUNT]
struct TMC2209TypeDef
#include <TMC2209.h>

Public Members

ConfigurationTypeDef *config
int32_t registerResetState[TMC2209_REGISTER_COUNT]
uint8_t registerAccess[TMC2209_REGISTER_COUNT]
uint8_t slaveAddress
struct TMC2224TypeDef
#include <TMC2224.h>

Public Members

int32_t velocity
int32_t oldX
uint32_t oldTick
int32_t registerResetState[TMC2224_REGISTER_COUNT]
uint8_t registerAccess[TMC2224_REGISTER_COUNT]
bool vMaxModified
uint8_t slave
struct TMC2225TypeDef
#include <TMC2225.h>

Public Members

ConfigurationTypeDef *config
int32_t registerResetState[TMC2225_REGISTER_COUNT]
uint8_t registerAccess[TMC2225_REGISTER_COUNT]
uint8_t slave_address
struct TMC2226TypeDef
#include <TMC2226.h>

Public Members

ConfigurationTypeDef *config
int32_t registerResetState[TMC2226_REGISTER_COUNT]
uint8_t registerAccess[TMC2226_REGISTER_COUNT]
uint8_t slaveAddress
struct TMC2240TypeDef
#include <TMC2240.h>

Public Members

ConfigurationTypeDef *config
int32_t velocity
int32_t oldX
uint32_t oldTick
int32_t registerResetState[TMC2240_REGISTER_COUNT]
uint8_t registerAccess[TMC2240_REGISTER_COUNT]
uint8_t slaveAddress
struct TMC2300TypeDef
#include <TMC2300.h>

configuration struct for TMC2300

Public Members

ConfigurationTypeDef *config
int32_t registerResetState[TMC2300_REGISTER_COUNT]
uint8_t registerAccess[TMC2300_REGISTER_COUNT]
uint8_t slaveAddress
uint8_t standbyEnabled
struct TMC2590TypeDef
#include <TMC2590.h>

Public Members

ConfigurationTypeDef *config
uint8_t continuousModeEnable
uint8_t coolStepInactiveValue
uint8_t coolStepActiveValue
uint32_t coolStepThreshold
uint8_t isStandStillCurrent
uint8_t runCurrentScale
uint8_t standStillCurrentScale
uint32_t standStillTimeout
uint32_t standStillTick
uint8_t registerAccess[TMC2590_REGISTER_COUNT]
int32_t registerResetState[TMC2590_REGISTER_COUNT]
struct TMC2660TypeDef
#include <TMC2660.h>

Public Members

uint8_t standStillCurrentScale
uint32_t standStillTimeout
uint8_t isStandStillOverCurrent
uint8_t isStandStillCurrentLimit
uint8_t continuousModeEnable
uint8_t runCurrentScale
uint8_t coolStepInactiveValue
uint8_t coolStepActiveValue
uint32_t coolStepThreshold
int32_t velocity
int32_t oldX
uint32_t oldTick
uint8_t registerAccess[TMC2660_REGISTER_COUNT]
int32_t registerResetState[TMC2660_REGISTER_COUNT]
struct TMC4330TypeDef
#include <TMC4330.h>

Public Members

ConfigurationTypeDef *config
int32_t velocity
int32_t oldX
uint32_t oldTick
int32_t registerResetState[TMC4330_REGISTER_COUNT]
uint8_t registerAccess[TMC4330_REGISTER_COUNT]
uint8_t status
struct TMC4331TypeDef
#include <TMC4331.h>

Public Members

ConfigurationTypeDef *config
int32_t velocity
int32_t oldX
uint32_t oldTick
int32_t registerResetState[TMC4331_REGISTER_COUNT]
uint8_t registerAccess[TMC4331_REGISTER_COUNT]
uint8_t status
struct TMC4361ATypeDef
#include <TMC4361A.h>

Public Members

ConfigurationTypeDef *config
int32_t velocity
int32_t oldX
uint32_t oldTick
int32_t registerResetState[TMC4361A_REGISTER_COUNT]
uint8_t registerAccess[TMC4361A_REGISTER_COUNT]
uint8_t status
ConfigurationTypeDef *cover
struct TMC5031TypeDef
#include <TMC5031.h>

Public Members

int32_t velocity[2]
int32_t oldX[2]
uint32_t oldTick
int32_t registerResetState[TMC5031_REGISTER_COUNT]
uint8_t registerAccess[TMC5031_REGISTER_COUNT]
bool vMaxModified[2]
struct TMC5041TypeDef
#include <TMC5041.h>

Public Members

ConfigurationTypeDef *config
int32_t velocity[2]
int32_t oldX[2]
uint32_t oldTick
int32_t registerResetState[TMC5041_REGISTER_COUNT]
uint8_t registerAccess[TMC5041_REGISTER_COUNT]
bool vMaxModified[2]
struct TMC5062_MicroStepTable
#include <TMC5062.h>

Public Members

uint32_t LUT_0
uint32_t LUT_1
uint32_t LUT_2
uint32_t LUT_3
uint32_t LUT_4
uint32_t LUT_5
uint32_t LUT_6
uint32_t LUT_7
uint8_t X1
uint8_t X2
uint8_t X3
uint8_t W0
uint8_t W1
uint8_t W2
uint8_t W3
uint8_t START_SIN
uint8_t START_SIN90
struct TMC5062TypeDef
#include <TMC5062.h>

Public Members

ConfigurationTypeDef *config
uint8_t motors[TMC5062_MOTORS]
uint32_t chipFrequency
uint32_t measurementInterval
uint32_t oldTick
int32_t oldXActual[TMC5062_MOTORS]
int32_t velocity[TMC5062_MOTORS]
int32_t registerResetState[TMC5062_REGISTER_COUNT]
uint8_t registerAccess[TMC5062_REGISTER_COUNT]
struct TMC5072TypeDef
#include <TMC5072.h>

Public Members

ConfigurationTypeDef *config
int32_t oldX[TMC5072_MOTORS]
uint32_t velocity[TMC5072_MOTORS]
uint32_t oldTick
int32_t registerResetState[TMC5072_REGISTER_COUNT]
uint8_t registerAccess[TMC5072_REGISTER_COUNT]
struct TMC5130TypeDef
#include <TMC5130.h>

Public Members

ConfigurationTypeDef *config
int32_t velocity
int32_t oldX
uint32_t oldTick
int32_t registerResetState[TMC5130_REGISTER_COUNT]
uint8_t registerAccess[TMC5130_REGISTER_COUNT]
struct TMC5160TypeDef
#include <TMC5160.h>

Public Members

ConfigurationTypeDef *config
int32_t velocity
int32_t oldX
uint32_t oldTick
int32_t registerResetState[TMC5160_REGISTER_COUNT]
uint8_t registerAccess[TMC5160_REGISTER_COUNT]
struct TMC5240TypeDef
#include <TMC5240.h>

Public Members

ConfigurationTypeDef *config
int32_t velocity
int32_t oldX
uint32_t oldTick
int32_t registerResetState[TMC5240_REGISTER_COUNT]
uint8_t registerAccess[TMC5240_REGISTER_COUNT]
uint8_t slaveAddress
struct TMC5271TypeDef
#include <TMC5271.h>

Public Members

ConfigurationTypeDef *config
int32_t oldX[TMC5271_MOTORS]
int32_t velocity[TMC5271_MOTORS]
uint32_t oldTick
int32_t registerResetState[TMC5271_REGISTER_COUNT]
uint8_t registerAccess[TMC5271_REGISTER_COUNT]
uint8_t slaveAddress
struct TMC5272TypeDef
#include <TMC5272.h>

Public Members

ConfigurationTypeDef *config
int32_t oldX[TMC5272_MOTORS]
int32_t velocity[TMC5272_MOTORS]
uint32_t oldTick
int32_t registerResetState[TMC5272_REGISTER_COUNT]
uint8_t registerAccess[TMC5272_REGISTER_COUNT]
uint8_t slaveAddress
struct TMC7300TypeDef
#include <TMC7300.h>

Public Members

ConfigurationTypeDef *config
int32_t registerResetState[TMC7300_REGISTER_COUNT]
uint8_t registerAccess[TMC7300_REGISTER_COUNT]
uint8_t slaveAddress
uint8_t standbyEnabled
struct TMC8461TypeDef
#include <TMC8461.h>

Public Members

ConfigurationTypeDef *config_esc
ConfigurationTypeDef *config_mfc
struct TMC8462TypeDef
#include <TMC8462.h>

Public Members

ConfigurationTypeDef *config_esc
ConfigurationTypeDef *config_mfc
struct TMC_LinearRamp
#include <LinearRamp.h>

Public Members

uint32_t maxVelocity
int32_t targetPosition
int32_t rampPosition
int32_t targetVelocity
int32_t rampVelocity
int32_t acceleration
uint16_t encoderSteps
int32_t lastdVRest
int32_t lastdXRest
uint8_t rampEnabled
bool rampEnabled
int32_t accumulatorVelocity
int32_t accumulatorPosition
TMC_LinearRamp_Mode rampMode
TMC_LinearRamp_State state
int32_t accelerationSteps
uint32_t precision
uint32_t homingDistance
uint32_t stopVelocity
struct TMCRegisterConstant
#include <RegisterAccess.h>

Public Members

uint8_t address
uint32_t value
struct TMotorConfig
#include <Configs.h>

Public Members

uint8_t IRun
uint8_t IStandby
uint16_t SettingDelay
uint8_t BoostCurrent
struct TSmartEnergyControl

Public Members

uint8_t SmartIMin
uint8_t SmartDownStep
uint8_t SmartStallLevelMax
uint8_t SmartUpStep
uint8_t SmartStallLevelMin
struct TStallGuardConfig

Public Members

uint8_t FilterEnable
int8_t StallGuardThreshold
uint8_t CurrentScale
struct TStepDirConfig

Public Members

uint8_t Intpol
uint8_t DEdge
uint8_t MRes
file API_Header.h
#include “Config.h”
#include “Macros.h”
#include “Constants.h”
#include “Bits.h”
#include “CRC.h”
#include “RegisterAccess.h”
#include <stdlib.h>
#include “Types.h”

Enums

enum TMCError

Values:

enumerator TMC_ERROR_NONE
enumerator TMC_ERROR_GENERIC
enumerator TMC_ERROR_FUNCTION
enumerator TMC_ERROR_MOTOR
enumerator TMC_ERROR_VALUE
enumerator TMC_ERROR_CHIP
enum TMC_Comm_Mode

Values:

enumerator TMC_COMM_DEFAULT
enumerator TMC_COMM_SPI
enumerator TMC_COMM_UART
file Bits.h

Defines

BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
BIT10
BIT11
BIT12
BIT13
BIT14
BIT15
BIT16
BIT17
BIT18
BIT19
BIT20
BIT21
BIT22
BIT23
BIT24
BIT25
BIT26
BIT27
BIT28
BIT29
BIT30
BIT31
BYTE0_MASK
BYTE0_SHIFT
BYTE1_MASK
BYTE1_SHIFT
BYTE2_MASK
BYTE2_SHIFT
BYTE3_MASK
BYTE3_SHIFT
BYTE4_MASK
BYTE4_SHIFT
BYTE5_MASK
BYTE5_SHIFT
BYTE6_MASK
BYTE6_SHIFT
BYTE7_MASK
BYTE7_SHIFT
SHORT0_MASK
SHORT0_SHIFT
SHORT1_MASK
SHORT1_SHIFT
SHORT2_MASK
SHORT2_SHIFT
SHORT3_MASK
SHORT3_SHIFT
WORD0_MASK
WORD0_SHIFT
WORD1_MASK
WORD1_SHIFT
NIBBLE(value, n)
BYTE(value, n)
SHORT(value, n)
WORD(value, n)
_8_16(__1, __0)
_8_32(__3, __2, __1, __0)
_16_32(__1, __0)
_8_64(__7, __6, __5, __4, __3, __2, __1, __0)
_16_64(__3, __2, __1, __0)
_32_64(__1, __0)
file Config.h
#include “Constants.h”
#include “Types.h”

Typedefs

typedef void (*tmc_callback_config)(void)

Enums

enum ConfigState

Values:

enumerator CONFIG_READY
enumerator CONFIG_RESET
enumerator CONFIG_RESTORE
file Constants.h

Defines

TMC_WRITE_BIT
TMC_ADDRESS_MASK
TMC_DEFAULT_MOTOR
TMC_REGISTER_COUNT
file CRC.c
#include “CRC.h”

Functions

static uint8_t flipByte(uint8_t value)
static uint32_t flipBitsInBytes(uint32_t value)
uint8_t tmc_fillCRC8Table(uint8_t polynomial, bool isReflected, uint8_t index)
uint8_t tmc_CRC8(uint8_t *data, uint32_t bytes, uint8_t index)
uint8_t tmc_tableGetPolynomial(uint8_t index)
bool tmc_tableIsReflected(uint8_t index)

Variables

CRCTypeDef CRCTables[CRC_TABLE_COUNT] = {0}
file CRC.h
#include “Types.h”

Defines

CRC_TABLE_COUNT

Functions

uint8_t tmc_fillCRC8Table(uint8_t polynomial, bool isReflected, uint8_t index)
uint8_t tmc_CRC8(uint8_t *data, uint32_t bytes, uint8_t index)
uint8_t tmc_tableGetPolynomial(uint8_t index)
bool tmc_tableIsReflected(uint8_t index)
file Functions.c
#include “Functions.h”

Functions

int32_t tmc_limitInt(int32_t value, int32_t min, int32_t max)
int64_t tmc_limitS64(int64_t value, int64_t min, int64_t max)
int32_t tmc_sqrti(int32_t x)
int32_t tmc_filterPT1(int64_t *akku, int32_t newValue, int32_t lastValue, uint8_t actualFilter, uint8_t maxFilter)

Variables

static const unsigned char sqrttable[256] = {0, 16, 22, 27, 32, 35, 39, 42, 45, 48, 50, 53, 55, 57, 59, 61, 64, 65, 67, 69, 71, 73, 75, 76, 78, 80, 81, 83, 84, 86, 87, 89, 90, 91, 93, 94, 96, 97, 98, 99, 101, 102, 103, 104, 106, 107, 108, 109, 110, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 128, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 144, 145, 146, 147, 148, 149, 150, 150, 151, 152, 153, 154, 155, 155, 156, 157, 158, 159, 160, 160, 161, 162, 163, 163, 164, 165, 166, 167, 167, 168, 169, 170, 170, 171, 172, 173, 173, 174, 175, 176, 176, 177, 178, 178, 179, 180, 181, 181, 182, 183, 183, 184, 185, 185, 186, 187, 187, 188, 189, 189, 190, 191, 192, 192, 193, 193, 194, 195, 195, 196, 197, 197, 198, 199, 199, 200, 201, 201, 202, 203, 203, 204, 204, 205, 206, 206, 207, 208, 208, 209, 209, 210, 211, 211, 212, 212, 213, 214, 214, 215, 215, 216, 217, 217, 218, 218, 219, 219, 220, 221, 221, 222, 222, 223, 224, 224, 225, 225, 226, 226, 227, 227, 228, 229, 229, 230, 230, 231, 231, 232, 232, 233, 234, 234, 235, 235, 236, 236, 237, 237, 238, 238, 239, 240, 240, 241, 241, 242, 242, 243, 243, 244, 244, 245, 245, 246, 246, 247, 247, 248, 248, 249, 249, 250, 250, 251, 251, 252, 252, 253, 253, 254, 254, 255}
file Functions.h
#include “API_Header.h”

Functions

int32_t tmc_limitInt(int32_t value, int32_t min, int32_t max)
int64_t tmc_limitS64(int64_t value, int64_t min, int64_t max)
int32_t tmc_sqrti(int32_t x)
int32_t tmc_filterPT1(int64_t *akku, int32_t newValue, int32_t lastValue, uint8_t actualFilter, uint8_t maxFilter)
file Macros.h

Defines

CAST_Sn_TO_S32(value, n)
MIN(a, b)
MAX(a, b)
ARRAY_SIZE(x)
FIELD_GET(data, mask, shift)
FIELD_SET(data, mask, shift, value)
FIELD_READ(read, motor, address, mask, shift)
FIELD_WRITE(write, motor, address, mask, shift, value)
FIELD_UPDATE(read, write, motor, address, mask, shift, value)
UNUSED(x)
ACCESS_ONCE(x)
TMC_ADDRESS(x)
file RegisterAccess.h

Defines

TMC_ACCESS_NONE
TMC_ACCESS_READ
TMC_ACCESS_WRITE
TMC_ACCESS_DIRTY
TMC_ACCESS_RW_SPECIAL
TMC_ACCESS_FLAGS
TMC_ACCESS_HW_PRESET
TMC_ACCESS_RW
TMC_ACCESS_RW_SEPARATE
TMC_ACCESS_R_FLAGS
TMC_ACCESS_RW_FLAGS
TMC_ACCESS_W_PRESET
TMC_ACCESS_RW_PRESET
TMC_IS_READABLE(x)
TMC_IS_WRITABLE(x)
TMC_IS_DIRTY(x)
TMC_IS_PRESET(x)
TMC_IS_RESETTABLE(x)
TMC_IS_RESTORABLE(x)
____
N_A
file Types.h
#include <stddef.h>
#include <stdbool.h>
#include <stdint.h>

Defines

TMC_TYPES_INTEGERS
TMC_TYPES_INTEGERS_UNSIGNED
u8_MAX
u10_MAX
u12_MAX
u15_MAX
u16_MAX
u18_MAX
u20_MAX
u22_MAX
u24_MAX
u32_MAX
TMC_TYPES_INTEGERS_SIGNED
s8_MAX
s8_MIN
s16_MAX
s16_MIN
s24_MAX
s24_MIN
s32_MAX
s32_MIN
TMC_TYPES_NULL
NULL
FALSE
TRUE

Typedefs

typedef float float32_t
typedef double float64_t
typedef uint8_t u8
typedef uint16_t u16
typedef uint32_t u32
typedef uint8_t uint8
typedef uint16_t uint16
typedef uint32_t uint32
typedef int8_t s8
typedef int16_t s16
typedef int32_t s32
typedef int8_t int8
typedef int16_t int16
typedef int32_t int32
file MAX22216.c
#include “MAX22216.h”

Functions

void max22216_readWriteArray(uint8_t channel, uint8_t *data, size_t length)
uint8_t max22216_CRC(uint8_t *data, size_t length)
void max22216_writeDatagram(MAX22216TypeDef *max22216, uint8_t address, uint8_t x1, uint8_t x2)
void max22216_writeInt(MAX22216TypeDef *max22216, uint8_t address, int16_t value)
int32_t max22216_readInt(MAX22216TypeDef *max22216, uint8_t address)
void max22216_writeInt_UART(MAX22216TypeDef *max22216, uint8_t address, int32_t value)
int32_t max22216_readInt_UART(MAX22216TypeDef *max22216, uint8_t address)
void max22216_writeIntDep(MAX22216TypeDef *max22216, uint8_t address, int32_t value, uint8_t dep_address, int32_t dep_value)
int32_t max22216_readIntDep(MAX22216TypeDef *max22216, uint8_t address, uint8_t dep_address, int32_t dep_value)
void max22216_init(MAX22216TypeDef *max22216, uint8_t channel)
uint8_t max22216_getSlaveAddress(const MAX22216TypeDef *max22216)
void max22216_setSlaveAddress(MAX22216TypeDef *max22216, uint8_t slaveAddress)
int16_t max22216_getS16CircleDifference(int16_t newValue, int16_t oldValue)
file MAX22216.h
#include “tmc/helpers/API_Header.h”
#include “MAX22216_Fields.h”
#include “MAX22216_Register.h”
#include “MAX22216_Constants.h”

Defines

MAX22216_FIELD_READ(tdef, address, mask, shift)
MAX22216_FIELD_WRITE(tdef, address, mask, shift, value)

Functions

uint8_t max22216_CRC(uint8_t *data, size_t length)
void max22216_writeDatagram(MAX22216TypeDef *max22216, uint8_t address, uint8_t x1, uint8_t x2)
void max22216_writeInt(MAX22216TypeDef *max22216, uint8_t address, int16_t value)
int32_t max22216_readInt(MAX22216TypeDef *max22216, uint8_t address)
void max22216_writeIntDep(MAX22216TypeDef *max22216, uint8_t address, int32_t value, uint8_t dep_address, int32_t dep_value)
int32_t max22216_readIntDep(MAX22216TypeDef *max22216, uint8_t address, uint8_t dep_address, int32_t dep_value)
void max22216_init(MAX22216TypeDef *max22216, uint8_t channel)
uint8_t max22216_getSlaveAddress(const MAX22216TypeDef *max22216)
void max22216_setSlaveAddress(MAX22216TypeDef *max22216, uint8_t slaveAddress)
file MAX22216_Constants.h

Defines

MAX22216_SYNC_BYTE
MAX22216_MASTER_ADDRESS
MAX22216_MOTION_MODE_STOPPED
MAX22216_MOTION_MODE_TORQUE
MAX22216_MOTION_MODE_VELOCITY
MAX22216_MOTION_MODE_POSITION
MAX22216_MOTION_MODE_UQ_UD_EXT
MAX22216_PHI_E_EXTERNAL
MAX22216_PHI_E_OPEN_LOOP
MAX22216_PHI_E_ABN
MAX22216_PHI_E_HALL
MAX22216_PHI_E_AENC
MAX22216_PHI_A_AENC
MAX22216_STATE_NOTHING_TO_DO
MAX22216_STATE_START_INIT
MAX22216_STATE_WAIT_INIT_TIME
MAX22216_STATE_ESTIMATE_OFFSET
MAX22216_CHIPINFO_ADDR_SI_TYPE
MAX22216_CHIPINFO_ADDR_SI_VERSION
MAX22216_CHIPINFO_ADDR_SI_DATE
MAX22216_CHIPINFO_ADDR_SI_TIME
MAX22216_CHIPINFO_ADDR_SI_VARIANT
MAX22216_CHIPINFO_ADDR_SI_BUILD
file MAX22216_Fields.h

Defines

MAX22216_CNTL0_MASK
MAX22216_CNTL0_SHIFT
MAX22216_CNTL1_MASK
MAX22216_CNTL1_SHIFT
MAX22216_CNTL2_MASK
MAX22216_CNTL2_SHIFT
MAX22216_CNTL3_MASK
MAX22216_CNTL3_SHIFT
MAX22216_F_PWM_M_MASK
MAX22216_F_PWM_M_SHIFT
MAX22216_CHS_MASK
MAX22216_CHS_SHIFT
MAX22216_VDR_NDUTY_MASK
MAX22216_VDR_NDUTY_SHIFT
MAX22216_STAT_POL_MASK
MAX22216_STAT_POL_SHIFT
MAX22216_CNTL_POL_MASK
MAX22216_CNTL_POL_SHIFT
MAX22216_M_UVM_MASK
MAX22216_M_UVM_SHIFT
MAX22216_M_COMF_MASK
MAX22216_M_COMF_SHIFT
MAX22216_M_DPM_MASK
MAX22216_M_DPM_SHIFT
MAX22216_M_HHF_MASK
MAX22216_M_HHF_SHIFT
MAX22216_M_OLF_MASK
MAX22216_M_OLF_SHIFT
MAX22216_M_OCP_MASK
MAX22216_M_OCP_SHIFT
MAX22216_M_OVT_MASK
MAX22216_M_OVT_SHIFT
MAX22216_ACTIVE_MASK
MAX22216_ACTIVE_SHIFT
MAX22216_RFU_MASK
MAX22216_RFU_SHIFT
MAX22216_UVM_MASK
MAX22216_UVM_SHIFT
MAX22216_COMER_MASK
MAX22216_COMER_SHIFT
MAX22216_DPM_MASK
MAX22216_DPM_SHIFT
MAX22216_HHF_MASK
MAX22216_HHF_SHIFT
MAX22216_OLF_MASK
MAX22216_OLF_SHIFT
MAX22216_OCP_MASK
MAX22216_OCP_SHIFT
MAX22216_OVT_MASK
MAX22216_OVT_SHIFT
MAX22216_IND_MASK
MAX22216_IND_SHIFT
MAX22216_RES_MASK
MAX22216_RES_SHIFT
MAX22216_MIN_T_ON_MASK
MAX22216_MIN_T_ON_SHIFT
MAX22216_STAT0_MASK
MAX22216_STAT0_SHIFT
MAX22216_STAT1_MASK
MAX22216_STAT1_SHIFT
MAX22216_STAT2_MASK
MAX22216_STAT2_SHIFT
MAX22216_STAT3_MASK
MAX22216_STAT3_SHIFT
MAX22216_STAT_FUN_MASK
MAX22216_STAT_FUN_SHIFT
MAX22216_STAT_SEL0_MASK
MAX22216_STAT_SEL0_SHIFT
MAX22216_STAT_SEL1_MASK
MAX22216_STAT_SEL1_SHIFT
MAX22216_STRETCH_EN_MASK
MAX22216_STRETCH_EN_SHIFT
MAX22216_EN_LDO_MASK
MAX22216_EN_LDO_SHIFT
MAX22216_V5_NV3_MASK
MAX22216_V5_NV3_SHIFT
MAX22216_M_UVM_CMP_MASK
MAX22216_M_UVM_CMP_SHIFT
MAX22216_DC_H2L_MASK
MAX22216_DC_H2L_SHIFT
MAX22216_ADC_VM_RAW_MASK
MAX22216_ADC_VM_RAW_SHIFT
MAX22216_VM_THLD_DOWN_MASK
MAX22216_VM_THLD_DOWN_SHIFT
MAX22216_VM_THLD_UP_MASK
MAX22216_VM_THLD_UP_SHIFT
MAX22216_DELTA_PHI_MASK
MAX22216_DELTA_PHI_SHIFT
MAX22216_U_AC_MASK
MAX22216_U_AC_SHIFT
MAX22216_DC_L2H_MASK
MAX22216_DC_L2H_SHIFT
MAX22216_DC_H_MASK
MAX22216_DC_H_SHIFT
MAX22216_DC_L_MASK
MAX22216_DC_L_SHIFT
MAX22216_TIME_L2H_MASK
MAX22216_TIME_L2H_SHIFT
MAX22216_RAMP_MASK
MAX22216_RAMP_SHIFT
MAX22216_RUPE_MASK
MAX22216_RUPE_SHIFT
MAX22216_RMDE_MASK
MAX22216_RMDE_SHIFT
MAX22216_RDWE_MASK
MAX22216_RDWE_SHIFT
MAX22216_H2L_EN_MASK
MAX22216_H2L_EN_SHIFT
MAX22216_OL_EN_MASK
MAX22216_OL_EN_SHIFT
MAX22216_HHF_EN_MASK
MAX22216_HHF_EN_SHIFT
MAX22216_CTRL_MODE_MASK
MAX22216_CTRL_MODE_SHIFT
MAX22216_FSF_MASK
MAX22216_FSF_SHIFT
MAX22216_SHUNT_SCALE_MASK
MAX22216_SHUNT_SCALE_SHIFT
MAX22216_SLEW_RATE_MASK
MAX22216_SLEW_RATE_SHIFT
MAX22216_T_BLANKING_MASK
MAX22216_T_BLANKING_SHIFT
MAX22216_F_PWM_MASK
MAX22216_F_PWM_SHIFT
MAX22216_HSNLS_MASK
MAX22216_HSNLS_SHIFT
MAX22216_DPM_THLD_MASK
MAX22216_DPM_THLD_SHIFT
MAX22216_DPM_MIN_CURRENT_MASK
MAX22216_DPM_MIN_CURRENT_SHIFT
MAX22216_DPM_MIN_NBR_MASK
MAX22216_DPM_MIN_NBR_SHIFT
MAX22216_END_HIT_AUTO_MASK
MAX22216_END_HIT_AUTO_SHIFT
MAX22216_END_HIT_START_HIZ_AUTO_MASK
MAX22216_END_HIT_START_HIZ_AUTO_SHIFT
MAX22216_DPM_EN_MASK
MAX22216_DPM_EN_SHIFT
MAX22216_IDC_THLD_MASK
MAX22216_IDC_THLD_SHIFT
MAX22216_RES_THLD_MASK
MAX22216_RES_THLD_SHIFT
MAX22216_L_NBR_CALC_MASK
MAX22216_L_NBR_CALC_SHIFT
MAX22216_L_MEAS_WCYCLES_MASK
MAX22216_L_MEAS_WCYCLES_SHIFT
MAX22216_L_MEAS_H_MASK
MAX22216_L_MEAS_H_SHIFT
MAX22216_L_MEAS_L2H_MASK
MAX22216_L_MEAS_L2H_SHIFT
MAX22216_L_MEAS_EN_MASK
MAX22216_L_MEAS_EN_SHIFT
MAX22216_DITH_EN_MASK
MAX22216_DITH_EN_SHIFT
MAX22216_IAC_THLD_MASK
MAX22216_IAC_THLD_SHIFT
MAX22216_CFG_P_MASK
MAX22216_CFG_P_SHIFT
MAX22216_CFG_I_MASK
MAX22216_CFG_I_SHIFT
MAX22216_I_DPM_PEAK_MASK
MAX22216_I_DPM_PEAK_SHIFT
MAX22216_I_DPM_VALLEY_MASK
MAX22216_I_DPM_VALLEY_SHIFT
MAX22216_TRAVEL_TIME_MASK
MAX22216_TRAVEL_TIME_SHIFT
MAX22216_REACTION_TIME_MASK
MAX22216_REACTION_TIME_SHIFT
MAX22216_I_MONITOR_MASK
MAX22216_I_MONITOR_SHIFT
MAX22216_I_DC_MASK
MAX22216_I_DC_SHIFT
MAX22216_I_AC_MASK
MAX22216_I_AC_SHIFT
MAX22216_R_MASK
MAX22216_R_SHIFT
MAX22216_PWM_DUTYCYCLE_MASK
MAX22216_PWM_DUTYCYCLE_SHIFT
MAX22216_OCP0_MASK
MAX22216_OCP0_SHIFT
MAX22216_OCP1_MASK
MAX22216_OCP1_SHIFT
MAX22216_OCP2_MASK
MAX22216_OCP2_SHIFT
MAX22216_OCP3_MASK
MAX22216_OCP3_SHIFT
MAX22216_HHF0_MASK
MAX22216_HHF0_SHIFT
MAX22216_HHF1_MASK
MAX22216_HHF1_SHIFT
MAX22216_HHF2_MASK
MAX22216_HHF2_SHIFT
MAX22216_HHF3_MASK
MAX22216_HHF3_SHIFT
MAX22216_OLF0_MASK
MAX22216_OLF0_SHIFT
MAX22216_OLF1_MASK
MAX22216_OLF1_SHIFT
MAX22216_OLF2_MASK
MAX22216_OLF2_SHIFT
MAX22216_OLF3_MASK
MAX22216_OLF3_SHIFT
MAX22216_DPM0_MASK
MAX22216_DPM0_SHIFT
MAX22216_DPM1_MASK
MAX22216_DPM1_SHIFT
MAX22216_DPM2_MASK
MAX22216_DPM2_SHIFT
MAX22216_DPM3_MASK
MAX22216_DPM3_SHIFT
MAX22216_IND0_MASK
MAX22216_IND0_SHIFT
MAX22216_IND1_MASK
MAX22216_IND1_SHIFT
MAX22216_IND2_MASK
MAX22216_IND2_SHIFT
MAX22216_IND3_MASK
MAX22216_IND3_SHIFT
MAX22216_RES0_MASK
MAX22216_RES0_SHIFT
MAX22216_RES1_MASK
MAX22216_RES1_SHIFT
MAX22216_RES2_MASK
MAX22216_RES2_SHIFT
MAX22216_RES3_MASK
MAX22216_RES3_SHIFT
MAX22216_SRT_PROG_MASK
MAX22216_SRT_PROG_SHIFT
MAX22216_STOP_PROG_MASK
MAX22216_STOP_PROG_SHIFT
MAX22216_VERI_FAIL_MASK
MAX22216_VERI_FAIL_SHIFT
MAX22216_OTP_FULL_MASK
MAX22216_OTP_FULL_SHIFT
MAX22216_VPP_INIT_FAIL_MASK
MAX22216_VPP_INIT_FAIL_SHIFT
MAX22216_OV_DURING_BURN_PULSE_MASK
MAX22216_OV_DURING_BURN_PULSE_SHIFT
MAX22216_ECC_ERR_1BIT_MASK
MAX22216_ECC_ERR_1BIT_SHIFT
MAX22216_ECC_ERR_2BIT_MASK
MAX22216_ECC_ERR_2BIT_SHIFT
MAX22216_DONE_MASK
MAX22216_DONE_SHIFT
MAX22216_OTP_DATA0_MASK
MAX22216_OTP_DATA0_SHIFT
MAX22216_OTP_DATA1_MASK
MAX22216_OTP_DATA1_SHIFT
MAX22216_OTP_ADDR_MASK
MAX22216_OTP_ADDR_SHIFT
file MAX22216_Register.h

Defines

MAX22216_GLOBAL_CTRL
MAX22216_GLOBAL_CFG
MAX22216_STATUS
MAX22216_STATUS_CFG
MAX22216_DEMAG_VOLTAGE
MAX22216_ADC_VM_MEASUREMENT
MAX22216_VM_THRESHOLD
MAX22216_F_AC
MAX22216_U_AC_SCAN
MAX22216_CFG_DC_L2H_0
MAX22216_CFG_DC_H_0
MAX22216_CFG_DC_L_0
MAX22216_CFG_L2H_TIME_0
MAX22216_CFG_CTRL0_0
MAX22216_CFG_CTRL1_0
MAX22216_CFG_DPM0_0
MAX22216_CFG_DPM1_0
MAX22216_CFG_DC_0
MAX22216_CFG_R_THLD_0
MAX22216_CFG_IND_0_0
MAX22216_CFG_IND_1_0
MAX22216_CFG_P_0
MAX22216_CFG_I_0
MAX22216_CFG_DC_L2H_1
MAX22216_CFG_DC_H_1
MAX22216_CFG_DC_L_1
MAX22216_CFG_L2H_TIME_1
MAX22216_CFG_CTRL0_1
MAX22216_CFG_CTRL1_1
MAX22216_CFG_DPM0_1
MAX22216_CFG_DPM1_1
MAX22216_CFG_DC_1
MAX22216_CFG_R_THLD_1
MAX22216_CFG_IND_0_1
MAX22216_CFG_IND_1_1
MAX22216_CFG_P_1
MAX22216_CFG_I_1
MAX22216_CFG_DC_L2H_2
MAX22216_CFG_DC_H_2
MAX22216_CFG_DC_L_2
MAX22216_CFG_L2H_TIME_2
MAX22216_CFG_CTRL0_2
MAX22216_CFG_CTRL1_2
MAX22216_CFG_DPM0_2
MAX22216_CFG_DPM1_2
MAX22216_CFG_DC_2
MAX22216_CFG_R_THLD_2
MAX22216_CFG_IND_0_2
MAX22216_CFG_IND_1_2
MAX22216_CFG_P_2
MAX22216_CFG_I_2
MAX22216_CFG_DC_L2H_3
MAX22216_CFG_DC_H_3
MAX22216_CFG_DC_L_3
MAX22216_CFG_L2H_TIME_3
MAX22216_CFG_CTRL0_3
MAX22216_CFG_CTRL1_3
MAX22216_CFG_DPM0_3
MAX22216_CFG_DPM1_3
MAX22216_CFG_DC_3
MAX22216_CFG_R_THLD_3
MAX22216_CFG_IND_0_3
MAX22216_CFG_IND_1_3
MAX22216_CFG_P_3
MAX22216_CFG_I_3
MAX22216_I_DPM_PEAK_0
MAX22216_I_DPM_VALLEY_0
MAX22216_TRAVEL_TIME_0
MAX22216_REACTION_TIME_0
MAX22216_I_ADC_0
MAX22216_I_DC_0
MAX22216_I_IND_AC_0
MAX22216_R_0
MAX22216_PWM_DUTY_0
MAX22216_I_DPM_PEAK_1
MAX22216_I_DPM_VALLEY_1
MAX22216_TRAVEL_TIME_1
MAX22216_REACTION_TIME_1
MAX22216_I_ADC_1
MAX22216_I_DC_1
MAX22216_I_IND_AC_1
MAX22216_R_1
MAX22216_PWM_DUTY_1
MAX22216_I_DPM_PEAK_2
MAX22216_I_DPM_VALLEY_2
MAX22216_TRAVEL_TIME_2
MAX22216_REACTION_TIME_2
MAX22216_I_ADC_2
MAX22216_I_DC_2
MAX22216_I_IND_AC_2
MAX22216_R_2
MAX22216_PWM_DUTY_2
MAX22216_I_DPM_PEAK_3
MAX22216_I_DPM_VALLEY_3
MAX22216_TRAVEL_TIME_3
MAX22216_REACTION_TIME_3
MAX22216_I_ADC_3
MAX22216_I_DC_3
MAX22216_I_IND_AC_3
MAX22216_R_3
MAX22216_PWM_DUTY_3
MAX22216_FAULT0
MAX22216_FAULT1
MAX22216_OTP_CONTROL
MAX22216_OTP_STATUS
MAX22216_OTP_DATA0
MAX22216_OTP_DATA1
MAX22216_OTP_ADDR
file TMC2130.c
#include “TMC2130.h”

Functions

void tmc2130_readWriteArray(uint8_t channel, uint8_t *data, size_t length)
void tmc2130_writeDatagram(TMC2130TypeDef *tmc2130, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc2130_writeInt(TMC2130TypeDef *tmc2130, uint8_t address, int32_t value)
int32_t tmc2130_readInt(TMC2130TypeDef *tmc2130, uint8_t address)
void tmc2130_init(TMC2130TypeDef *tmc2130, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
void tmc2130_fillShadowRegisters(TMC2130TypeDef *tmc2130)
uint8_t tmc2130_reset(TMC2130TypeDef *tmc2130)
uint8_t tmc2130_restore(TMC2130TypeDef *tmc2130)
void tmc2130_setRegisterResetState(TMC2130TypeDef *tmc2130, const int32_t *resetState)
void tmc2130_setCallback(TMC2130TypeDef *tmc2130, tmc2130_callback callback)
static void writeConfiguration(TMC2130TypeDef *tmc2130)
void tmc2130_periodicJob(TMC2130TypeDef *tmc2130, uint32_t tick)
file TMC2130.h
#include “tmc/helpers/API_Header.h”
#include “TMC2130_Register.h”
#include “TMC2130_Constants.h”
#include “TMC2130_Mask_Shift.h”

Defines

TMC2130_FIELD_READ(tdef, address, mask, shift)
TMC2130_FIELD_WRITE(tdef, address, mask, shift, value)
R10
R6C

Typedefs

typedef void (*tmc2130_callback)(TMC2130TypeDef*, ConfigState)

Functions

void tmc2130_writeDatagram(TMC2130TypeDef *tmc2130, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc2130_writeInt(TMC2130TypeDef *tmc2130, uint8_t address, int32_t value)
int32_t tmc2130_readInt(TMC2130TypeDef *tmc2130, uint8_t address)
void tmc2130_init(TMC2130TypeDef *tmc2130, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
void tmc2130_fillShadowRegisters(TMC2130TypeDef *tmc2130)
uint8_t tmc2130_reset(TMC2130TypeDef *tmc2130)
uint8_t tmc2130_restore(TMC2130TypeDef *tmc2130)
void tmc2130_setRegisterResetState(TMC2130TypeDef *tmc2130, const int32_t *resetState)
void tmc2130_setCallback(TMC2130TypeDef *tmc2130, tmc2130_callback callback)
void tmc2130_periodicJob(TMC2130TypeDef *tmc2130, uint32_t tick)

Variables

static const int32_t tmc2130_defaultRegisterResetState[TMC2130_REGISTER_COUNT] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, R6C, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,}
static const uint8_t tmc2130_defaultRegisterAccess[TMC2130_REGISTER_COUNT] = {0x03, 0x21, ____, ____, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x02, 0x01, 0x02, 0x02, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x03, ____, ____, ____, ____, ____, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x01, 0x01, 0x03, 0x02, 0x02, 0x01, 0x42, 0x01, 0x02, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const TMCRegisterConstant tmc2130_RegisterConstants[] = {{0x60, 0xAAAAB554}, {0x61, 0x4A9554AA}, {0x62, 0x24492929}, {0x63, 0x10104222}, {0x64, 0xFBFFFFFF}, {0x65, 0xB5BB777D}, {0x66, 0x49295556}, {0x67, 0x00404222}, {0x68, 0xFFFF8056}, {0x69, 0x00F70000}, {0x70, 0x00050480}}
file TMC2130_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC2130_REGISTER_COUNT
TMC2130_MOTORS
TMC2130_WRITE_BIT
TMC2130_ADDRESS_MASK
TMC2130_MAX_VELOCITY
TMC2130_MAX_ACCELERATION
file TMC2130_Mask_Shift.h

Defines

TMC2130_I_SCALE_ANALOG_MASK
TMC2130_I_SCALE_ANALOG_SHIFT
TMC2130_INTERNAL_RSENSE_MASK
TMC2130_INTERNAL_RSENSE_SHIFT
TMC2130_EN_PWM_MODE_MASK
TMC2130_EN_PWM_MODE_SHIFT
TMC2130_ENC_COMMUTATION_MASK
TMC2130_ENC_COMMUTATION_SHIFT
TMC2130_SHAFT_MASK
TMC2130_SHAFT_SHIFT
TMC2130_DIAG0_ERROR_ONLY_WITH_SD_MODE1_MASK
TMC2130_DIAG0_ERROR_ONLY_WITH_SD_MODE1_SHIFT
TMC2130_DIAG0_OTPW_ONLY_WITH_SD_MODE1_MASK
TMC2130_DIAG0_OTPW_ONLY_WITH_SD_MODE1_SHIFT
TMC2130_DIAG0_STALL_MASK
TMC2130_DIAG0_STALL_SHIFT
TMC2130_DIAG1_STALL_MASK
TMC2130_DIAG1_STALL_SHIFT
TMC2130_DIAG1_INDEX_MASK
TMC2130_DIAG1_INDEX_SHIFT
TMC2130_DIAG1_ONSTATE_MASK
TMC2130_DIAG1_ONSTATE_SHIFT
TMC2130_DIAG1_STEPS_SKIPPED_MASK
TMC2130_DIAG1_STEPS_SKIPPED_SHIFT
TMC2130_DIAG0_INT_PUSHPULL_MASK
TMC2130_DIAG0_INT_PUSHPULL_SHIFT
TMC2130_DIAG1_POSCOMP_PUSHPULL_MASK
TMC2130_DIAG1_POSCOMP_PUSHPULL_SHIFT
TMC2130_SMALL_HYSTERESIS_MASK
TMC2130_SMALL_HYSTERESIS_SHIFT
TMC2130_STOP_ENABLE_MASK
TMC2130_STOP_ENABLE_SHIFT
TMC2130_DIRECT_MODE_MASK
TMC2130_DIRECT_MODE_SHIFT
TMC2130_TEST_MODE_MASK
TMC2130_TEST_MODE_SHIFT
TMC2130_RESET_MASK
TMC2130_RESET_SHIFT
TMC2130_DRV_ERR_MASK
TMC2130_DRV_ERR_SHIFT
TMC2130_UV_CP_MASK
TMC2130_UV_CP_SHIFT
TMC2130_REFL_STEP_MASK
TMC2130_REFL_STEP_SHIFT
TMC2130_REFR_DIR_MASK
TMC2130_REFR_DIR_SHIFT
TMC2130_ENCB_DCEN_CFG4_MASK
TMC2130_ENCB_DCEN_CFG4_SHIFT
TMC2130_ENCA_DCIN_CFG5_MASK
TMC2130_ENCA_DCIN_CFG5_SHIFT
TMC2130_DRV_ENN_CFG6_MASK
TMC2130_DRV_ENN_CFG6_SHIFT
TMC2130_ENC_N_DCO_MASK
TMC2130_ENC_N_DCO_SHIFT
TMC2130_VERSION_MASK
TMC2130_VERSION_SHIFT
TMC2130_IHOLD_MASK
TMC2130_IHOLD_SHIFT
TMC2130_IRUN_MASK
TMC2130_IRUN_SHIFT
TMC2130_IHOLDDELAY_MASK
TMC2130_IHOLDDELAY_SHIFT
TMC2130_TPOWERDOWN_MASK
TMC2130_TPOWERDOWN_SHIFT
TMC2130_TSTEP_MASK
TMC2130_TSTEP_SHIFT
TMC2130_TPWMTHRS_MASK
TMC2130_TPWMTHRS_SHIFT
TMC2130_TCOOLTHRS_MASK
TMC2130_TCOOLTHRS_SHIFT
TMC2130_THIGH_MASK
TMC2130_THIGH_SHIFT
TMC2130_VDCMIN_MASK
TMC2130_VDCMIN_SHIFT
TMC2130_W0_MASK
TMC2130_W0_SHIFT
TMC2130_W1_MASK
TMC2130_W1_SHIFT
TMC2130_W2_MASK
TMC2130_W2_SHIFT
TMC2130_W3_MASK
TMC2130_W3_SHIFT
TMC2130_X1_MASK
TMC2130_X1_SHIFT
TMC2130_X2_MASK
TMC2130_X2_SHIFT
TMC2130_X3_MASK
TMC2130_X3_SHIFT
TMC2130_START_SIN_MASK
TMC2130_START_SIN_SHIFT
TMC2130_START_SIN90_MASK
TMC2130_START_SIN90_SHIFT
TMC2130_MSCNT_MASK
TMC2130_MSCNT_SHIFT
TMC2130_CUR_A_MASK
TMC2130_CUR_A_SHIFT
TMC2130_CUR_B_MASK
TMC2130_CUR_B_SHIFT
TMC2130_TOFF_MASK
TMC2130_TOFF_SHIFT
TMC2130_HSTRT_MASK
TMC2130_HSTRT_SHIFT
TMC2130_TFD_ALL_MASK
TMC2130_TFD_ALL_SHIFT
TMC2130_HEND_MASK
TMC2130_HEND_SHIFT
TMC2130_OFFSET_MASK
TMC2130_OFFSET_SHIFT
TMC2130_TFD_3_MASK
TMC2130_TFD_3_SHIFT
TMC2130_DISFDCC_MASK
TMC2130_DISFDCC_SHIFT
TMC2130_RNDTF_MASK
TMC2130_RNDTF_SHIFT
TMC2130_CHM_MASK
TMC2130_CHM_SHIFT
TMC2130_TBL_MASK
TMC2130_TBL_SHIFT
TMC2130_VSENSE_MASK
TMC2130_VSENSE_SHIFT
TMC2130_VHIGHFS_MASK
TMC2130_VHIGHFS_SHIFT
TMC2130_VHIGHCHM_MASK
TMC2130_VHIGHCHM_SHIFT
TMC2130_SYNC_MASK
TMC2130_SYNC_SHIFT
TMC2130_MRES_MASK
TMC2130_MRES_SHIFT
TMC2130_INTPOL_MASK
TMC2130_INTPOL_SHIFT
TMC2130_DEDGE_MASK
TMC2130_DEDGE_SHIFT
TMC2130_DISS2G_MASK
TMC2130_DISS2G_SHIFT
TMC2130_SEMIN_MASK
TMC2130_SEMIN_SHIFT
TMC2130_SEUP_MASK
TMC2130_SEUP_SHIFT
TMC2130_SEMAX_MASK
TMC2130_SEMAX_SHIFT
TMC2130_SEDN_MASK
TMC2130_SEDN_SHIFT
TMC2130_SEIMIN_MASK
TMC2130_SEIMIN_SHIFT
TMC2130_SGT_MASK
TMC2130_SGT_SHIFT
TMC2130_SFILT_MASK
TMC2130_SFILT_SHIFT
TMC2130_DC_TIME_MASK
TMC2130_DC_TIME_SHIFT
TMC2130_DC_SG_MASK
TMC2130_DC_SG_SHIFT
TMC2130_SG_RESULT_MASK
TMC2130_SG_RESULT_SHIFT
TMC2130_FSACTIVE_MASK
TMC2130_FSACTIVE_SHIFT
TMC2130_CS_ACTUAL_MASK
TMC2130_CS_ACTUAL_SHIFT
TMC2130_STALLGUARD_MASK
TMC2130_STALLGUARD_SHIFT
TMC2130_OT_MASK
TMC2130_OT_SHIFT
TMC2130_OTPW_MASK
TMC2130_OTPW_SHIFT
TMC2130_S2GA_MASK
TMC2130_S2GA_SHIFT
TMC2130_S2GB_MASK
TMC2130_S2GB_SHIFT
TMC2130_OLA_MASK
TMC2130_OLA_SHIFT
TMC2130_OLB_MASK
TMC2130_OLB_SHIFT
TMC2130_STST_MASK
TMC2130_STST_SHIFT
TMC2130_PWM_AMPL_MASK
TMC2130_PWM_AMPL_SHIFT
TMC2130_PWM_GRAD_MASK
TMC2130_PWM_GRAD_SHIFT
TMC2130_PWM_FREQ_MASK
TMC2130_PWM_FREQ_SHIFT
TMC2130_PWM_AUTOSCALE_MASK
TMC2130_PWM_AUTOSCALE_SHIFT
TMC2130_PWM_SYMMETRIC_MASK
TMC2130_PWM_SYMMETRIC_SHIFT
TMC2130_FREEWHEEL_MASK
TMC2130_FREEWHEEL_SHIFT
TMC2130_PWM_SCALE_MASK
TMC2130_PWM_SCALE_SHIFT
TMC2130_INV_MASK
TMC2130_INV_SHIFT
TMC2130_MAXSPEED_MASK
TMC2130_MAXSPEED_SHIFT
TMC2130_LOST_STEPS_MASK
TMC2130_LOST_STEPS_SHIFT
file TMC2130_Register.h

Defines

TMC2130_GCONF
TMC2130_GSTAT
TMC2130_IOIN
TMC2130_IHOLD_IRUN
TMC2130_TPOWERDOWN
TMC2130_TSTEP
TMC2130_TPWMTHRS
TMC2130_TCOOLTHRS
TMC2130_THIGH
TMC2130_XDIRECT
TMC2130_VDCMIN
TMC2130_MSLUT0
TMC2130_MSLUT1
TMC2130_MSLUT2
TMC2130_MSLUT3
TMC2130_MSLUT4
TMC2130_MSLUT5
TMC2130_MSLUT6
TMC2130_MSLUT7
TMC2130_MSLUTSEL
TMC2130_MSLUTSTART
TMC2130_MSCNT
TMC2130_MSCURACT
TMC2130_CHOPCONF
TMC2130_COOLCONF
TMC2130_DCCTRL
TMC2130_DRV_STATUS
TMC2130_PWMCONF
TMC2130_PWM_SCALE
TMC2130_ENCM_CTRL
TMC2130_LOST_STEPS
file TMC2160.c
#include “TMC2160.h”

Functions

void tmc2160_readWriteArray(uint8_t channel, uint8_t *data, size_t length)
void tmc2160_writeDatagram(TMC2160TypeDef *tmc2160, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc2160_writeInt(TMC2160TypeDef *tmc2160, uint8_t address, int32_t value)
int32_t tmc2160_readInt(TMC2160TypeDef *tmc2160, uint8_t address)
void tmc2160_init(TMC2160TypeDef *tmc2160, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
void tmc2160_fillShadowRegisters(TMC2160TypeDef *tmc2160)
uint8_t tmc2160_reset(TMC2160TypeDef *tmc2160)
uint8_t tmc2160_restore(TMC2160TypeDef *tmc2160)
void tmc2160_setRegisterResetState(TMC2160TypeDef *tmc2160, const int32_t *resetState)
void tmc2160_setCallback(TMC2160TypeDef *tmc2160, tmc2160_callback callback)
static void writeConfiguration(TMC2160TypeDef *tmc2160)
void tmc2160_periodicJob(TMC2160TypeDef *tmc2160, uint32_t tick)
file TMC2160.h
#include “tmc/helpers/API_Header.h”
#include “TMC2160_Constants.h”
#include “TMC2160_Fields.h”
#include “TMC2160_Register.h”

Defines

TMC2160_FIELD_READ(tdef, address, mask, shift)
TMC2160_FIELD_WRITE(tdef, address, mask, shift, value)
R10
R6C
R70

Typedefs

typedef void (*tmc2160_callback)(TMC2160TypeDef*, ConfigState)

Functions

void tmc2160_writeDatagram(TMC2160TypeDef *tmc2160, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc2160_writeInt(TMC2160TypeDef *tmc2160, uint8_t address, int32_t value)
int32_t tmc2160_readInt(TMC2160TypeDef *tmc2160, uint8_t address)
void tmc2160_init(TMC2160TypeDef *tmc2160, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
void tmc2160_fillShadowRegisters(TMC2160TypeDef *tmc2160)
uint8_t tmc2160_reset(TMC2160TypeDef *tmc2160)
uint8_t tmc2160_restore(TMC2160TypeDef *tmc2160)
void tmc2160_setRegisterResetState(TMC2160TypeDef *tmc2160, const int32_t *resetState)
void tmc2160_setCallback(TMC2160TypeDef *tmc2160, tmc2160_callback callback)
void tmc2160_periodicJob(TMC2160TypeDef *tmc2160, uint32_t tick)

Variables

static const uint8_t tmc2160_defaultRegisterAccess[TMC2160_REGISTER_COUNT] = {0x03, 0x23, 0x01, 0x02, 0x23, 0x02, 0x02, 0x01, 0x42, 0x42, 0x42, 0x02, 0x01, ____, ____, ____, 0x02, 0x02, 0x01, 0x02, 0x02, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x03, 0x03, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, 0x02, 0x02, 0x02, 0x03, ____, ____, ____, ____, ____, 0x02, 0x03, 0x23, 0x01, ____, 0x03, 0x03, 0x02, 0x23, 0x01, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x01, 0x01, 0x03, 0x02, 0x02, 0x01, 0x02, 0x01, 0x01, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const int32_t tmc2160_defaultRegisterResetState[TMC2160_REGISTER_COUNT] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, R6C, 0, 0, 0, R70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,}
static const TMCRegisterConstant tmc2160_RegisterConstants[] = {{0x08, 0x00000000}, {0x09, 0x00000000}, {0x0A, 0x00000000}, {0x60, 0xAAAAB554}, {0x61, 0x4A9554AA}, {0x62, 0x24492929}, {0x63, 0x10104222}, {0x64, 0xFBFFFFFF}, {0x65, 0xB5BB777D}, {0x66, 0x49295556}, {0x67, 0x00404222}, {0x68, 0xFFFF8056}, {0x69, 0x00F70000}}
file TMC2160_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC2160_REGISTER_COUNT
TMC2160_MOTORS
TMC2160_WRITE_BIT
TMC2160_ADDRESS_MASK
TMC2160_MAX_VELOCITY
TMC2160_MAX_ACCELERATION
file TMC2160_Fields.h

Defines

TMC2160_RECALIBRATE_MASK
TMC2160_RECALIBRATE_SHIFT
TMC2160_FASTSTANDSTILL_MASK
TMC2160_FASTSTANDSTILL_SHIFT
TMC2160_EN_PWM_MODE_MASK
TMC2160_EN_PWM_MODE_SHIFT
TMC2160_MULTISTEP_FILT_MASK
TMC2160_MULTISTEP_FILT_SHIFT
TMC2160_SHAFT_MASK
TMC2160_SHAFT_SHIFT
TMC2160_DIAG0_ERROR__ONLY_WITH_SD_MODE_1__MASK
TMC2160_DIAG0_ERROR__ONLY_WITH_SD_MODE_1__SHIFT
TMC2160_DIAG0_OTPW__ONLY_WITH_SD_MODE_1__MASK
TMC2160_DIAG0_OTPW__ONLY_WITH_SD_MODE_1__SHIFT
TMC2160_DIAG0_STALL_MASK
TMC2160_DIAG0_STALL_SHIFT
TMC2160_DIAG1_STALL_MASK
TMC2160_DIAG1_STALL_SHIFT
TMC2160_DIAG1_INDEX_MASK
TMC2160_DIAG1_INDEX_SHIFT
TMC2160_DIAG1_ONSTATE_MASK
TMC2160_DIAG1_ONSTATE_SHIFT
TMC2160_DIAG1_STEPS_SKIPPED_MASK
TMC2160_DIAG1_STEPS_SKIPPED_SHIFT
TMC2160_DIAG0_INT_PUSHPULL_MASK
TMC2160_DIAG0_INT_PUSHPULL_SHIFT
TMC2160_DIAG1_POSCOMP_PUSHPULL_MASK
TMC2160_DIAG1_POSCOMP_PUSHPULL_SHIFT
TMC2160_SMALL_HYSTERESIS_MASK
TMC2160_SMALL_HYSTERESIS_SHIFT
TMC2160_STOP_ENABLE_MASK
TMC2160_STOP_ENABLE_SHIFT
TMC2160_DIRECT_MODE_MASK
TMC2160_DIRECT_MODE_SHIFT
TMC2160_TEST_MODE_MASK
TMC2160_TEST_MODE_SHIFT
TMC2160_DIAG0_STEP_MASK
TMC2160_DIAG0_STEP_SHIFT
TMC2160_DIAG1_DIR_MASK
TMC2160_DIAG1_DIR_SHIFT
TMC2160_RESET_MASK
TMC2160_RESET_SHIFT
TMC2160_DRV_ERR_MASK
TMC2160_DRV_ERR_SHIFT
TMC2160_UV_CP_MASK
TMC2160_UV_CP_SHIFT
TMC2160_STEP_MASK
TMC2160_STEP_SHIFT
TMC2160_DIR_MASK
TMC2160_DIR_SHIFT
TMC2160_DCEN_CFG4_MASK
TMC2160_DCEN_CFG4_SHIFT
TMC2160_DCIN_CFG5_MASK
TMC2160_DCIN_CFG5_SHIFT
TMC2160_DRV_ENN_MASK
TMC2160_DRV_ENN_SHIFT
TMC2160_DCO_CFG6_MASK
TMC2160_DCO_CFG6_SHIFT
TMC2160_VERSION_MASK
TMC2160_VERSION_SHIFT
TMC2160_OUTPUT_PIN_POLARITY_MASK
TMC2160_OUTPUT_PIN_POLARITY_SHIFT
TMC2160_X_COMPARE_MASK
TMC2160_X_COMPARE_SHIFT
TMC2160_OTPBIT_MASK
TMC2160_OTPBIT_SHIFT
TMC2160_OTPBYTE_MASK
TMC2160_OTPBYTE_SHIFT
TMC2160_OTPMAGIC_MASK
TMC2160_OTPMAGIC_SHIFT
TMC2160_OTP_TBL_MASK
TMC2160_OTP_TBL_SHIFT
TMC2160_OTP_BBM_MASK
TMC2160_OTP_BBM_SHIFT
TMC2160_OTP_S2_LEVEL_MASK
TMC2160_OTP_S2_LEVEL_SHIFT
TMC2160_OTP_FCLKTRIM_MASK
TMC2160_OTP_FCLKTRIM_SHIFT
TMC2160_FCLKTRIM_MASK
TMC2160_FCLKTRIM_SHIFT
TMC2160_S2VS_LEVEL_MASK
TMC2160_S2VS_LEVEL_SHIFT
TMC2160_S2GND_LEVEL_MASK
TMC2160_S2GND_LEVEL_SHIFT
TMC2160_SHORTFILTER_MASK
TMC2160_SHORTFILTER_SHIFT
TMC2160_SHORTDELAY_MASK
TMC2160_SHORTDELAY_SHIFT
TMC2160_BBMTIME_MASK
TMC2160_BBMTIME_SHIFT
TMC2160_BBMCLKS_MASK
TMC2160_BBMCLKS_SHIFT
TMC2160_OTSELECT_MASK
TMC2160_OTSELECT_SHIFT
TMC2160_DRVSTRENGTH_MASK
TMC2160_DRVSTRENGTH_SHIFT
TMC2160_FILT_ISENSE_MASK
TMC2160_FILT_ISENSE_SHIFT
TMC2160_GLOBAL_SCALER_MASK
TMC2160_GLOBAL_SCALER_SHIFT
TMC2160_OFFSET_READ_A_MASK
TMC2160_OFFSET_READ_A_SHIFT
TMC2160_OFFSET_READ_B_MASK
TMC2160_OFFSET_READ_B_SHIFT
TMC2160_IHOLD_MASK
TMC2160_IHOLD_SHIFT
TMC2160_IRUN_MASK
TMC2160_IRUN_SHIFT
TMC2160_IHOLDDELAY_MASK
TMC2160_IHOLDDELAY_SHIFT
TMC2160_TPOWERDOWN_MASK
TMC2160_TPOWERDOWN_SHIFT
TMC2160_TSTEP_MASK
TMC2160_TSTEP_SHIFT
TMC2160_TPWMTHRS_MASK
TMC2160_TPWMTHRS_SHIFT
TMC2160_TCOOLTHRS_MASK
TMC2160_TCOOLTHRS_SHIFT
TMC2160_THIGH_MASK
TMC2160_THIGH_SHIFT
TMC2160_XDIRECT_MASK
TMC2160_XDIRECT_SHIFT
TMC2160_VDCMIN_MASK
TMC2160_VDCMIN_SHIFT
TMC2160_OFS0_MASK
TMC2160_OFS0_SHIFT
TMC2160_OFS1_MASK
TMC2160_OFS1_SHIFT
TMC2160_OFS2_MASK
TMC2160_OFS2_SHIFT
TMC2160_OFS3_MASK
TMC2160_OFS3_SHIFT
TMC2160_OFS4_MASK
TMC2160_OFS4_SHIFT
TMC2160_OFS5_MASK
TMC2160_OFS5_SHIFT
TMC2160_OFS6_MASK
TMC2160_OFS6_SHIFT
TMC2160_OFS7_MASK
TMC2160_OFS7_SHIFT
TMC2160_OFS8_MASK
TMC2160_OFS8_SHIFT
TMC2160_OFS9_MASK
TMC2160_OFS9_SHIFT
TMC2160_OFS10_MASK
TMC2160_OFS10_SHIFT
TMC2160_OFS11_MASK
TMC2160_OFS11_SHIFT
TMC2160_OFS12_MASK
TMC2160_OFS12_SHIFT
TMC2160_OFS13_MASK
TMC2160_OFS13_SHIFT
TMC2160_OFS14_MASK
TMC2160_OFS14_SHIFT
TMC2160_OFS15_MASK
TMC2160_OFS15_SHIFT
TMC2160_OFS16_MASK
TMC2160_OFS16_SHIFT
TMC2160_OFS17_MASK
TMC2160_OFS17_SHIFT
TMC2160_OFS18_MASK
TMC2160_OFS18_SHIFT
TMC2160_OFS19_MASK
TMC2160_OFS19_SHIFT
TMC2160_OFS20_MASK
TMC2160_OFS20_SHIFT
TMC2160_OFS21_MASK
TMC2160_OFS21_SHIFT
TMC2160_OFS22_MASK
TMC2160_OFS22_SHIFT
TMC2160_OFS23_MASK
TMC2160_OFS23_SHIFT
TMC2160_OFS24_MASK
TMC2160_OFS24_SHIFT
TMC2160_OFS25_MASK
TMC2160_OFS25_SHIFT
TMC2160_OFS26_MASK
TMC2160_OFS26_SHIFT
TMC2160_OFS27_MASK
TMC2160_OFS27_SHIFT
TMC2160_OFS28_MASK
TMC2160_OFS28_SHIFT
TMC2160_OFS29_MASK
TMC2160_OFS29_SHIFT
TMC2160_OFS30_MASK
TMC2160_OFS30_SHIFT
TMC2160_OFS31_MASK
TMC2160_OFS31_SHIFT
TMC2160_OFS32_MASK
TMC2160_OFS32_SHIFT
TMC2160_OFS33_MASK
TMC2160_OFS33_SHIFT
TMC2160_OFS34_MASK
TMC2160_OFS34_SHIFT
TMC2160_OFS35_MASK
TMC2160_OFS35_SHIFT
TMC2160_OFS36_MASK
TMC2160_OFS36_SHIFT
TMC2160_OFS37_MASK
TMC2160_OFS37_SHIFT
TMC2160_OFS38_MASK
TMC2160_OFS38_SHIFT
TMC2160_OFS39_MASK
TMC2160_OFS39_SHIFT
TMC2160_OFS40_MASK
TMC2160_OFS40_SHIFT
TMC2160_OFS41_MASK
TMC2160_OFS41_SHIFT
TMC2160_OFS42_MASK
TMC2160_OFS42_SHIFT
TMC2160_OFS43_MASK
TMC2160_OFS43_SHIFT
TMC2160_OFS44_MASK
TMC2160_OFS44_SHIFT
TMC2160_OFS45_MASK
TMC2160_OFS45_SHIFT
TMC2160_OFS46_MASK
TMC2160_OFS46_SHIFT
TMC2160_OFS47_MASK
TMC2160_OFS47_SHIFT
TMC2160_OFS48_MASK
TMC2160_OFS48_SHIFT
TMC2160_OFS49_MASK
TMC2160_OFS49_SHIFT
TMC2160_OFS50_MASK
TMC2160_OFS50_SHIFT
TMC2160_OFS51_MASK
TMC2160_OFS51_SHIFT
TMC2160_OFS52_MASK
TMC2160_OFS52_SHIFT
TMC2160_OFS53_MASK
TMC2160_OFS53_SHIFT
TMC2160_OFS54_MASK
TMC2160_OFS54_SHIFT
TMC2160_OFS55_MASK
TMC2160_OFS55_SHIFT
TMC2160_OFS56_MASK
TMC2160_OFS56_SHIFT
TMC2160_OFS57_MASK
TMC2160_OFS57_SHIFT
TMC2160_OFS58_MASK
TMC2160_OFS58_SHIFT
TMC2160_OFS59_MASK
TMC2160_OFS59_SHIFT
TMC2160_OFS60_MASK
TMC2160_OFS60_SHIFT
TMC2160_OFS61_MASK
TMC2160_OFS61_SHIFT
TMC2160_OFS62_MASK
TMC2160_OFS62_SHIFT
TMC2160_OFS63_MASK
TMC2160_OFS63_SHIFT
TMC2160_OFS64_MASK
TMC2160_OFS64_SHIFT
TMC2160_OFS65_MASK
TMC2160_OFS65_SHIFT
TMC2160_OFS66_MASK
TMC2160_OFS66_SHIFT
TMC2160_OFS67_MASK
TMC2160_OFS67_SHIFT
TMC2160_OFS68_MASK
TMC2160_OFS68_SHIFT
TMC2160_OFS69_MASK
TMC2160_OFS69_SHIFT
TMC2160_OFS70_MASK
TMC2160_OFS70_SHIFT
TMC2160_OFS71_MASK
TMC2160_OFS71_SHIFT
TMC2160_OFS72_MASK
TMC2160_OFS72_SHIFT
TMC2160_OFS73_MASK
TMC2160_OFS73_SHIFT
TMC2160_OFS74_MASK
TMC2160_OFS74_SHIFT
TMC2160_OFS75_MASK
TMC2160_OFS75_SHIFT
TMC2160_OFS76_MASK
TMC2160_OFS76_SHIFT
TMC2160_OFS77_MASK
TMC2160_OFS77_SHIFT
TMC2160_OFS78_MASK
TMC2160_OFS78_SHIFT
TMC2160_OFS79_MASK
TMC2160_OFS79_SHIFT
TMC2160_OFS80_MASK
TMC2160_OFS80_SHIFT
TMC2160_OFS81_MASK
TMC2160_OFS81_SHIFT
TMC2160_OFS82_MASK
TMC2160_OFS82_SHIFT
TMC2160_OFS83_MASK
TMC2160_OFS83_SHIFT
TMC2160_OFS84_MASK
TMC2160_OFS84_SHIFT
TMC2160_OFS85_MASK
TMC2160_OFS85_SHIFT
TMC2160_OFS86_MASK
TMC2160_OFS86_SHIFT
TMC2160_OFS87_MASK
TMC2160_OFS87_SHIFT
TMC2160_OFS88_MASK
TMC2160_OFS88_SHIFT
TMC2160_OFS89_MASK
TMC2160_OFS89_SHIFT
TMC2160_OFS90_MASK
TMC2160_OFS90_SHIFT
TMC2160_OFS91_MASK
TMC2160_OFS91_SHIFT
TMC2160_OFS92_MASK
TMC2160_OFS92_SHIFT
TMC2160_OFS93_MASK
TMC2160_OFS93_SHIFT
TMC2160_OFS94_MASK
TMC2160_OFS94_SHIFT
TMC2160_OFS95_MASK
TMC2160_OFS95_SHIFT
TMC2160_OFS96_MASK
TMC2160_OFS96_SHIFT
TMC2160_OFS97_MASK
TMC2160_OFS97_SHIFT
TMC2160_OFS98_MASK
TMC2160_OFS98_SHIFT
TMC2160_OFS99_MASK
TMC2160_OFS99_SHIFT
TMC2160_OFS100_MASK
TMC2160_OFS100_SHIFT
TMC2160_OFS101_MASK
TMC2160_OFS101_SHIFT
TMC2160_OFS102_MASK
TMC2160_OFS102_SHIFT
TMC2160_OFS103_MASK
TMC2160_OFS103_SHIFT
TMC2160_OFS104_MASK
TMC2160_OFS104_SHIFT
TMC2160_OFS105_MASK
TMC2160_OFS105_SHIFT
TMC2160_OFS106_MASK
TMC2160_OFS106_SHIFT
TMC2160_OFS107_MASK
TMC2160_OFS107_SHIFT
TMC2160_OFS108_MASK
TMC2160_OFS108_SHIFT
TMC2160_OFS109_MASK
TMC2160_OFS109_SHIFT
TMC2160_OFS110_MASK
TMC2160_OFS110_SHIFT
TMC2160_OFS111_MASK
TMC2160_OFS111_SHIFT
TMC2160_OFS112_MASK
TMC2160_OFS112_SHIFT
TMC2160_OFS113_MASK
TMC2160_OFS113_SHIFT
TMC2160_OFS114_MASK
TMC2160_OFS114_SHIFT
TMC2160_OFS115_MASK
TMC2160_OFS115_SHIFT
TMC2160_OFS116_MASK
TMC2160_OFS116_SHIFT
TMC2160_OFS117_MASK
TMC2160_OFS117_SHIFT
TMC2160_OFS118_MASK
TMC2160_OFS118_SHIFT
TMC2160_OFS119_MASK
TMC2160_OFS119_SHIFT
TMC2160_OFS120_MASK
TMC2160_OFS120_SHIFT
TMC2160_OFS121_MASK
TMC2160_OFS121_SHIFT
TMC2160_OFS122_MASK
TMC2160_OFS122_SHIFT
TMC2160_OFS123_MASK
TMC2160_OFS123_SHIFT
TMC2160_OFS124_MASK
TMC2160_OFS124_SHIFT
TMC2160_OFS125_MASK
TMC2160_OFS125_SHIFT
TMC2160_OFS126_MASK
TMC2160_OFS126_SHIFT
TMC2160_OFS127_MASK
TMC2160_OFS127_SHIFT
TMC2160_OFS128_MASK
TMC2160_OFS128_SHIFT
TMC2160_OFS129_MASK
TMC2160_OFS129_SHIFT
TMC2160_OFS130_MASK
TMC2160_OFS130_SHIFT
TMC2160_OFS131_MASK
TMC2160_OFS131_SHIFT
TMC2160_OFS132_MASK
TMC2160_OFS132_SHIFT
TMC2160_OFS133_MASK
TMC2160_OFS133_SHIFT
TMC2160_OFS134_MASK
TMC2160_OFS134_SHIFT
TMC2160_OFS135_MASK
TMC2160_OFS135_SHIFT
TMC2160_OFS136_MASK
TMC2160_OFS136_SHIFT
TMC2160_OFS137_MASK
TMC2160_OFS137_SHIFT
TMC2160_OFS138_MASK
TMC2160_OFS138_SHIFT
TMC2160_OFS139_MASK
TMC2160_OFS139_SHIFT
TMC2160_OFS140_MASK
TMC2160_OFS140_SHIFT
TMC2160_OFS141_MASK
TMC2160_OFS141_SHIFT
TMC2160_OFS142_MASK
TMC2160_OFS142_SHIFT
TMC2160_OFS143_MASK
TMC2160_OFS143_SHIFT
TMC2160_OFS144_MASK
TMC2160_OFS144_SHIFT
TMC2160_OFS145_MASK
TMC2160_OFS145_SHIFT
TMC2160_OFS146_MASK
TMC2160_OFS146_SHIFT
TMC2160_OFS147_MASK
TMC2160_OFS147_SHIFT
TMC2160_OFS148_MASK
TMC2160_OFS148_SHIFT
TMC2160_OFS149_MASK
TMC2160_OFS149_SHIFT
TMC2160_OFS150_MASK
TMC2160_OFS150_SHIFT
TMC2160_OFS151_MASK
TMC2160_OFS151_SHIFT
TMC2160_OFS152_MASK
TMC2160_OFS152_SHIFT
TMC2160_OFS153_MASK
TMC2160_OFS153_SHIFT
TMC2160_OFS154_MASK
TMC2160_OFS154_SHIFT
TMC2160_OFS155_MASK
TMC2160_OFS155_SHIFT
TMC2160_OFS156_MASK
TMC2160_OFS156_SHIFT
TMC2160_OFS157_MASK
TMC2160_OFS157_SHIFT
TMC2160_OFS158_MASK
TMC2160_OFS158_SHIFT
TMC2160_OFS159_MASK
TMC2160_OFS159_SHIFT
TMC2160_OFS160_MASK
TMC2160_OFS160_SHIFT
TMC2160_OFS161_MASK
TMC2160_OFS161_SHIFT
TMC2160_OFS162_MASK
TMC2160_OFS162_SHIFT
TMC2160_OFS163_MASK
TMC2160_OFS163_SHIFT
TMC2160_OFS164_MASK
TMC2160_OFS164_SHIFT
TMC2160_OFS165_MASK
TMC2160_OFS165_SHIFT
TMC2160_OFS166_MASK
TMC2160_OFS166_SHIFT
TMC2160_OFS167_MASK
TMC2160_OFS167_SHIFT
TMC2160_OFS168_MASK
TMC2160_OFS168_SHIFT
TMC2160_OFS169_MASK
TMC2160_OFS169_SHIFT
TMC2160_OFS170_MASK
TMC2160_OFS170_SHIFT
TMC2160_OFS171_MASK
TMC2160_OFS171_SHIFT
TMC2160_OFS172_MASK
TMC2160_OFS172_SHIFT
TMC2160_OFS173_MASK
TMC2160_OFS173_SHIFT
TMC2160_OFS174_MASK
TMC2160_OFS174_SHIFT
TMC2160_OFS175_MASK
TMC2160_OFS175_SHIFT
TMC2160_OFS176_MASK
TMC2160_OFS176_SHIFT
TMC2160_OFS177_MASK
TMC2160_OFS177_SHIFT
TMC2160_OFS178_MASK
TMC2160_OFS178_SHIFT
TMC2160_OFS179_MASK
TMC2160_OFS179_SHIFT
TMC2160_OFS180_MASK
TMC2160_OFS180_SHIFT
TMC2160_OFS181_MASK
TMC2160_OFS181_SHIFT
TMC2160_OFS182_MASK
TMC2160_OFS182_SHIFT
TMC2160_OFS183_MASK
TMC2160_OFS183_SHIFT
TMC2160_OFS184_MASK
TMC2160_OFS184_SHIFT
TMC2160_OFS185_MASK
TMC2160_OFS185_SHIFT
TMC2160_OFS186_MASK
TMC2160_OFS186_SHIFT
TMC2160_OFS187_MASK
TMC2160_OFS187_SHIFT
TMC2160_OFS188_MASK
TMC2160_OFS188_SHIFT
TMC2160_OFS189_MASK
TMC2160_OFS189_SHIFT
TMC2160_OFS190_MASK
TMC2160_OFS190_SHIFT
TMC2160_OFS191_MASK
TMC2160_OFS191_SHIFT
TMC2160_OFS192_MASK
TMC2160_OFS192_SHIFT
TMC2160_OFS193_MASK
TMC2160_OFS193_SHIFT
TMC2160_OFS194_MASK
TMC2160_OFS194_SHIFT
TMC2160_OFS195_MASK
TMC2160_OFS195_SHIFT
TMC2160_OFS196_MASK
TMC2160_OFS196_SHIFT
TMC2160_OFS197_MASK
TMC2160_OFS197_SHIFT
TMC2160_OFS198_MASK
TMC2160_OFS198_SHIFT
TMC2160_OFS199_MASK
TMC2160_OFS199_SHIFT
TMC2160_OFS200_MASK
TMC2160_OFS200_SHIFT
TMC2160_OFS201_MASK
TMC2160_OFS201_SHIFT
TMC2160_OFS202_MASK
TMC2160_OFS202_SHIFT
TMC2160_OFS203_MASK
TMC2160_OFS203_SHIFT
TMC2160_OFS204_MASK
TMC2160_OFS204_SHIFT
TMC2160_OFS205_MASK
TMC2160_OFS205_SHIFT
TMC2160_OFS206_MASK
TMC2160_OFS206_SHIFT
TMC2160_OFS207_MASK
TMC2160_OFS207_SHIFT
TMC2160_OFS208_MASK
TMC2160_OFS208_SHIFT
TMC2160_OFS209_MASK
TMC2160_OFS209_SHIFT
TMC2160_OFS210_MASK
TMC2160_OFS210_SHIFT
TMC2160_OFS211_MASK
TMC2160_OFS211_SHIFT
TMC2160_OFS212_MASK
TMC2160_OFS212_SHIFT
TMC2160_OFS213_MASK
TMC2160_OFS213_SHIFT
TMC2160_OFS214_MASK
TMC2160_OFS214_SHIFT
TMC2160_OFS215_MASK
TMC2160_OFS215_SHIFT
TMC2160_OFS216_MASK
TMC2160_OFS216_SHIFT
TMC2160_OFS217_MASK
TMC2160_OFS217_SHIFT
TMC2160_OFS218_MASK
TMC2160_OFS218_SHIFT
TMC2160_OFS219_MASK
TMC2160_OFS219_SHIFT
TMC2160_OFS220_MASK
TMC2160_OFS220_SHIFT
TMC2160_OFS221_MASK
TMC2160_OFS221_SHIFT
TMC2160_OFS222_MASK
TMC2160_OFS222_SHIFT
TMC2160_OFS223_MASK
TMC2160_OFS223_SHIFT
TMC2160_OFS224_MASK
TMC2160_OFS224_SHIFT
TMC2160_OFS225_MASK
TMC2160_OFS225_SHIFT
TMC2160_OFS226_MASK
TMC2160_OFS226_SHIFT
TMC2160_OFS227_MASK
TMC2160_OFS227_SHIFT
TMC2160_OFS228_MASK
TMC2160_OFS228_SHIFT
TMC2160_OFS229_MASK
TMC2160_OFS229_SHIFT
TMC2160_OFS230_MASK
TMC2160_OFS230_SHIFT
TMC2160_OFS231_MASK
TMC2160_OFS231_SHIFT
TMC2160_OFS232_MASK
TMC2160_OFS232_SHIFT
TMC2160_OFS233_MASK
TMC2160_OFS233_SHIFT
TMC2160_OFS234_MASK
TMC2160_OFS234_SHIFT
TMC2160_OFS235_MASK
TMC2160_OFS235_SHIFT
TMC2160_OFS236_MASK
TMC2160_OFS236_SHIFT
TMC2160_OFS237_MASK
TMC2160_OFS237_SHIFT
TMC2160_OFS238_MASK
TMC2160_OFS238_SHIFT
TMC2160_OFS239_MASK
TMC2160_OFS239_SHIFT
TMC2160_OFS240_MASK
TMC2160_OFS240_SHIFT
TMC2160_OFS241_MASK
TMC2160_OFS241_SHIFT
TMC2160_OFS242_MASK
TMC2160_OFS242_SHIFT
TMC2160_OFS243_MASK
TMC2160_OFS243_SHIFT
TMC2160_OFS244_MASK
TMC2160_OFS244_SHIFT
TMC2160_OFS245_MASK
TMC2160_OFS245_SHIFT
TMC2160_OFS246_MASK
TMC2160_OFS246_SHIFT
TMC2160_OFS247_MASK
TMC2160_OFS247_SHIFT
TMC2160_OFS248_MASK
TMC2160_OFS248_SHIFT
TMC2160_OFS249_MASK
TMC2160_OFS249_SHIFT
TMC2160_OFS250_MASK
TMC2160_OFS250_SHIFT
TMC2160_OFS251_MASK
TMC2160_OFS251_SHIFT
TMC2160_OFS252_MASK
TMC2160_OFS252_SHIFT
TMC2160_OFS253_MASK
TMC2160_OFS253_SHIFT
TMC2160_OFS254_MASK
TMC2160_OFS254_SHIFT
TMC2160_OFS255_MASK
TMC2160_OFS255_SHIFT
TMC2160_W0_MASK
TMC2160_W0_SHIFT
TMC2160_W1_MASK
TMC2160_W1_SHIFT
TMC2160_W2_MASK
TMC2160_W2_SHIFT
TMC2160_W3_MASK
TMC2160_W3_SHIFT
TMC2160_X1_MASK
TMC2160_X1_SHIFT
TMC2160_X2_MASK
TMC2160_X2_SHIFT
TMC2160_X3_MASK
TMC2160_X3_SHIFT
TMC2160_START_SIN_MASK
TMC2160_START_SIN_SHIFT
TMC2160_START_SIN90_MASK
TMC2160_START_SIN90_SHIFT
TMC2160_MSCNT_MASK
TMC2160_MSCNT_SHIFT
TMC2160_CUR_A_MASK
TMC2160_CUR_A_SHIFT
TMC2160_CUR_B_MASK
TMC2160_CUR_B_SHIFT
TMC2160_TOFF_MASK
TMC2160_TOFF_SHIFT
TMC2160_TFD_ALL_MASK
TMC2160_TFD_ALL_SHIFT
TMC2160_OFFSET_MASK
TMC2160_OFFSET_SHIFT
TMC2160_TFD_3_MASK
TMC2160_TFD_3_SHIFT
TMC2160_DISFDCC_MASK
TMC2160_DISFDCC_SHIFT
TMC2160_CHM_MASK
TMC2160_CHM_SHIFT
TMC2160_TBL_MASK
TMC2160_TBL_SHIFT
TMC2160_VHIGHFS_MASK
TMC2160_VHIGHFS_SHIFT
TMC2160_VHIGHCHM_MASK
TMC2160_VHIGHCHM_SHIFT
TMC2160_TPFD_MASK
TMC2160_TPFD_SHIFT
TMC2160_MRES_MASK
TMC2160_MRES_SHIFT
TMC2160_INTPOL_MASK
TMC2160_INTPOL_SHIFT
TMC2160_DEDGE_MASK
TMC2160_DEDGE_SHIFT
TMC2160_DISS2G_MASK
TMC2160_DISS2G_SHIFT
TMC2160_DISS2VS_MASK
TMC2160_DISS2VS_SHIFT
TMC2160_RNDTF_MASK
TMC2160_RNDTF_SHIFT
TMC2160_VSENSE_MASK
TMC2160_VSENSE_SHIFT
TMC2160_HSTRT_MASK
TMC2160_HSTRT_SHIFT
TMC2160_HEND_MASK
TMC2160_HEND_SHIFT
TMC2160_SEMIN_MASK
TMC2160_SEMIN_SHIFT
TMC2160_SEUP_MASK
TMC2160_SEUP_SHIFT
TMC2160_SEMAX_MASK
TMC2160_SEMAX_SHIFT
TMC2160_SEDN_MASK
TMC2160_SEDN_SHIFT
TMC2160_SEIMIN_MASK
TMC2160_SEIMIN_SHIFT
TMC2160_SGT_MASK
TMC2160_SGT_SHIFT
TMC2160_SFILT_MASK
TMC2160_SFILT_SHIFT
TMC2160_DC_TIME_MASK
TMC2160_DC_TIME_SHIFT
TMC2160_DC_SG_MASK
TMC2160_DC_SG_SHIFT
TMC2160_SG_RESULT_MASK
TMC2160_SG_RESULT_SHIFT
TMC2160_S2VSA_MASK
TMC2160_S2VSA_SHIFT
TMC2160_S2VSB_MASK
TMC2160_S2VSB_SHIFT
TMC2160_STEALTH_MASK
TMC2160_STEALTH_SHIFT
TMC2160_FSACTIVE_MASK
TMC2160_FSACTIVE_SHIFT
TMC2160_CS_ACTUAL_MASK
TMC2160_CS_ACTUAL_SHIFT
TMC2160_STALLGUARD_MASK
TMC2160_STALLGUARD_SHIFT
TMC2160_OT_MASK
TMC2160_OT_SHIFT
TMC2160_OTPW_MASK
TMC2160_OTPW_SHIFT
TMC2160_S2GA_MASK
TMC2160_S2GA_SHIFT
TMC2160_S2GB_MASK
TMC2160_S2GB_SHIFT
TMC2160_OLA_MASK
TMC2160_OLA_SHIFT
TMC2160_OLB_MASK
TMC2160_OLB_SHIFT
TMC2160_STST_MASK
TMC2160_STST_SHIFT
TMC2160_PWM_OFS_MASK
TMC2160_PWM_OFS_SHIFT
TMC2160_PWM_GRAD_MASK
TMC2160_PWM_GRAD_SHIFT
TMC2160_PWM_FREQ_MASK
TMC2160_PWM_FREQ_SHIFT
TMC2160_PWM_AUTOSCALE_MASK
TMC2160_PWM_AUTOSCALE_SHIFT
TMC2160_PWM_AUTOGRAD_MASK
TMC2160_PWM_AUTOGRAD_SHIFT
TMC2160_FREEWHEEL_MASK
TMC2160_FREEWHEEL_SHIFT
TMC2160_PWM_REG_MASK
TMC2160_PWM_REG_SHIFT
TMC2160_PWM_LIM_MASK
TMC2160_PWM_LIM_SHIFT
TMC2160_PWM_SCALE_SUM_MASK
TMC2160_PWM_SCALE_SUM_SHIFT
TMC2160_PWM_SCALE_AUTO_MASK
TMC2160_PWM_SCALE_AUTO_SHIFT
TMC2160_PWM_OFS_AUTO_MASK
TMC2160_PWM_OFS_AUTO_SHIFT
TMC2160_PWM_GRAD_AUTO_MASK
TMC2160_PWM_GRAD_AUTO_SHIFT
TMC2160_LOST_STEPS_MASK
TMC2160_LOST_STEPS_SHIFT
file TMC2160_Register.h

Defines

TMC2160_GCONF
TMC2160_GSTAT
TMC2160_IOIN___OUTPUT
TMC2160_X_COMPARE
TMC2160_OTP_PROG
TMC2160_OTP_READ
TMC2160_FACTORY_CONF
TMC2160_SHORT_CONF
TMC2160_DRV_CONF
TMC2160_GLOBAL_SCALER
TMC2160_OFFSET_READ
TMC2160_IHOLD_IRUN
TMC2160_TPOWERDOWN
TMC2160_TSTEP
TMC2160_TPWMTHRS
TMC2160_TCOOLTHRS
TMC2160_THIGH
TMC2160_XDIRECT
TMC2160_VDCMIN
TMC2160_MSLUT__
TMC2160_MSLUTSEL
TMC2160_MSLUTSTART
TMC2160_MSCNT
TMC2160_MSCURACT
TMC2160_CHOPCONF
TMC2160_COOLCONF
TMC2160_DCCTRL
TMC2160_DRV_STATUS
TMC2160_PWMCONF
TMC2160_PWM_SCALE
TMC2160_PWM_AUTO
TMC2160_LOST_STEPS
file TMC2208.c
#include “TMC2208.h”

Functions

void tmc2208_readWriteArray(uint8_t channel, uint8_t *data, size_t writeLength, size_t readLength)
uint8_t tmc2208_CRC8(uint8_t *data, size_t length)
void tmc2208_writeInt(TMC2208TypeDef *tmc2208, uint8_t address, int32_t value)
int32_t tmc2208_readInt(TMC2208TypeDef *tmc2208, uint8_t address)
void tmc2208_init(TMC2208TypeDef *tmc2208, uint8_t channel, ConfigurationTypeDef *tmc2208_config, const int32_t *registerResetState)
static void writeConfiguration(TMC2208TypeDef *tmc2208)
void tmc2208_periodicJob(TMC2208TypeDef *tmc2208, uint32_t tick)
void tmc2208_setRegisterResetState(TMC2208TypeDef *tmc2208, const int32_t *resetState)
void tmc2208_setCallback(TMC2208TypeDef *tmc2208, tmc2208_callback callback)
uint8_t tmc2208_reset(TMC2208TypeDef *tmc2208)
uint8_t tmc2208_restore(TMC2208TypeDef *tmc2208)
uint8_t tmc2208_get_slave(TMC2208TypeDef *tmc2208)
file TMC2208.h
#include “tmc/helpers/API_Header.h”
#include “TMC2208_Register.h”
#include “TMC2208_Constants.h”

Defines

R00
R10
R11
R6C
R70

Typedefs

typedef void (*tmc2208_callback)(TMC2208TypeDef*, ConfigState)

Functions

void tmc2208_writeInt(TMC2208TypeDef *tmc2208, uint8_t address, int32_t value)
int32_t tmc2208_readInt(TMC2208TypeDef *tmc2208, uint8_t address)
void tmc2208_init(TMC2208TypeDef *tmc2208, uint8_t channel, ConfigurationTypeDef *tmc2208_config, const int32_t *registerResetState)
uint8_t tmc2208_reset(TMC2208TypeDef *tmc2208)
uint8_t tmc2208_restore(TMC2208TypeDef *tmc2208)
void tmc2208_setRegisterResetState(TMC2208TypeDef *tmc2208, const int32_t *resetState)
void tmc2208_setCallback(TMC2208TypeDef *tmc2208, tmc2208_callback callback)
void tmc2208_periodicJob(TMC2208TypeDef *tmc2208, uint32_t tick)
uint8_t tmc2208_get_slave(TMC2208TypeDef *tmc2208)
void tmc2208_set_slave(TMC2208TypeDef *tmc2208, uint8_t slave)

Variables

static const uint8_t tmc2208_defaultRegisterAccess[TMC2208_REGISTER_COUNT] = {0x03, 0x23, 0x01, 0x02, 0x02, 0x01, 0x01, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x02, 0x01, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x01, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x01, 0x01, 0x03, ____, ____, 0x01, 0x03, 0x01, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const int32_t tmc2208_defaultRegisterResetState[TMC2208_REGISTER_COUNT] = {R00, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R10, R11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R6C, 0, 0, 0, R70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
file TMC2208_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC2208_MOTORS
TMC2208_REGISTER_COUNT
TMC2208_WRITE_BIT
TMC2208_ADDRESS_MASK
TMC2208_MAX_VELOCITY
TMC2208_MAX_ACCELERATION
file TMC2208_Fields.h

Defines

TMC2208_I_SCALE_ANALOG_MASK
TMC2208_I_SCALE_ANALOG_SHIFT
TMC2208_INTERNAL_RSENSE_MASK
TMC2208_INTERNAL_RSENSE_SHIFT
TMC2208_EN_SPREADCYCLE_MASK
TMC2208_EN_SPREADCYCLE_SHIFT
TMC2208_SHAFT_MASK
TMC2208_SHAFT_SHIFT
TMC2208_INDEX_OTPW_MASK
TMC2208_INDEX_OTPW_SHIFT
TMC2208_INDEX_STEP_MASK
TMC2208_INDEX_STEP_SHIFT
TMC2208_PDN_DISABLE_MASK
TMC2208_PDN_DISABLE_SHIFT
TMC2208_MSTEP_REG_SELECT_MASK
TMC2208_MSTEP_REG_SELECT_SHIFT
TMC2208_MULTISTEP_FILT_MASK
TMC2208_MULTISTEP_FILT_SHIFT
TMC2208_TEST_MODE_MASK
TMC2208_TEST_MODE_SHIFT
TMC2208_RESET_MASK
TMC2208_RESET_SHIFT
TMC2208_DRV_ERR_MASK
TMC2208_DRV_ERR_SHIFT
TMC2208_UV_CP_MASK
TMC2208_UV_CP_SHIFT
TMC2208_IFCNT_MASK
TMC2208_IFCNT_SHIFT
TMC2208_SLAVECONF_MASK
TMC2208_SLAVECONF_SHIFT
TMC2208_OTPBIT_MASK
TMC2208_OTPBIT_SHIFT
TMC2208_OTPBYTE_MASK
TMC2208_OTPBYTE_SHIFT
TMC2208_OTPMAGIC_MASK
TMC2208_OTPMAGIC_SHIFT
TMC2208_OTP0_BYTE_0_READ_DATA_MASK
TMC2208_OTP0_BYTE_0_READ_DATA_SHIFT
TMC2208_OTP1_BYTE_1_READ_DATA_MASK
TMC2208_OTP1_BYTE_1_READ_DATA_SHIFT
TMC2208_OTP2_BYTE_2_READ_DATA_MASK
TMC2208_OTP2_BYTE_2_READ_DATA_SHIFT
TMC2208_ENN_MASK
TMC2208_ENN_SHIFT
TMC2208_MS1_MASK
TMC2208_MS1_SHIFT
TMC2208_MS2_MASK
TMC2208_MS2_SHIFT
TMC2208_DIAG_MASK
TMC2208_DIAG_SHIFT
TMC2208_PDN_UART_MASK
TMC2208_PDN_UART_SHIFT
TMC2208_STEP_MASK
TMC2208_STEP_SHIFT
TMC2208_SEL_A_MASK
TMC2208_SEL_A_SHIFT
TMC2208_DIR_MASK
TMC2208_DIR_SHIFT
TMC2208_VERSION_MASK
TMC2208_VERSION_SHIFT
TMC2208_FCLKTRIM_MASK
TMC2208_FCLKTRIM_SHIFT
TMC2208_OTTRIM_MASK
TMC2208_OTTRIM_SHIFT
TMC2208_IHOLD_MASK
TMC2208_IHOLD_SHIFT
TMC2208_IRUN_MASK
TMC2208_IRUN_SHIFT
TMC2208_IHOLDDELAY_MASK
TMC2208_IHOLDDELAY_SHIFT
TMC2208_TPOWERDOWN_MASK
TMC2208_TPOWERDOWN_SHIFT
TMC2208_TSTEP_MASK
TMC2208_TSTEP_SHIFT
TMC2208_TPWMTHRS_MASK
TMC2208_TPWMTHRS_SHIFT
TMC2208_VACTUAL_MASK
TMC2208_VACTUAL_SHIFT
TMC2208_MSCNT_MASK
TMC2208_MSCNT_SHIFT
TMC2208_CUR_A_MASK
TMC2208_CUR_A_SHIFT
TMC2208_CUR_B_MASK
TMC2208_CUR_B_SHIFT
TMC2208_TOFF_MASK
TMC2208_TOFF_SHIFT
TMC2208_HSTRT_MASK
TMC2208_HSTRT_SHIFT
TMC2208_HEND_MASK
TMC2208_HEND_SHIFT
TMC2208_TBL_MASK
TMC2208_TBL_SHIFT
TMC2208_VSENSE_MASK
TMC2208_VSENSE_SHIFT
TMC2208_MRES_MASK
TMC2208_MRES_SHIFT
TMC2208_INTPOL_MASK
TMC2208_INTPOL_SHIFT
TMC2208_DEDGE_MASK
TMC2208_DEDGE_SHIFT
TMC2208_DISS2G_MASK
TMC2208_DISS2G_SHIFT
TMC2208_DISS2VS_MASK
TMC2208_DISS2VS_SHIFT
TMC2208_OTPW_MASK
TMC2208_OTPW_SHIFT
TMC2208_OT_MASK
TMC2208_OT_SHIFT
TMC2208_S2GA_MASK
TMC2208_S2GA_SHIFT
TMC2208_S2GB_MASK
TMC2208_S2GB_SHIFT
TMC2208_S2VSA_MASK
TMC2208_S2VSA_SHIFT
TMC2208_S2VSB_MASK
TMC2208_S2VSB_SHIFT
TMC2208_OLA_MASK
TMC2208_OLA_SHIFT
TMC2208_OLB_MASK
TMC2208_OLB_SHIFT
TMC2208_T120_MASK
TMC2208_T120_SHIFT
TMC2208_T143_MASK
TMC2208_T143_SHIFT
TMC2208_T150_MASK
TMC2208_T150_SHIFT
TMC2208_T157_MASK
TMC2208_T157_SHIFT
TMC2208_CS_ACTUAL_MASK
TMC2208_CS_ACTUAL_SHIFT
TMC2208_STEALTH_MASK
TMC2208_STEALTH_SHIFT
TMC2208_STST_MASK
TMC2208_STST_SHIFT
TMC2208_PWM_OFS_MASK
TMC2208_PWM_OFS_SHIFT
TMC2208_PWM_GRAD_MASK
TMC2208_PWM_GRAD_SHIFT
TMC2208_PWM_FREQ_MASK
TMC2208_PWM_FREQ_SHIFT
TMC2208_PWM_AUTOSCALE_MASK
TMC2208_PWM_AUTOSCALE_SHIFT
TMC2208_PWM_AUTOGRAD_MASK
TMC2208_PWM_AUTOGRAD_SHIFT
TMC2208_FREEWHEEL_MASK
TMC2208_FREEWHEEL_SHIFT
TMC2208_PWM_REG_MASK
TMC2208_PWM_REG_SHIFT
TMC2208_PWM_LIM_MASK
TMC2208_PWM_LIM_SHIFT
TMC2208_PWM_SCALE_SUM_MASK
TMC2208_PWM_SCALE_SUM_SHIFT
TMC2208_PWM_SCALE_AUTO_MASK
TMC2208_PWM_SCALE_AUTO_SHIFT
TMC2208_PWM_OFS_AUTO_MASK
TMC2208_PWM_OFS_AUTO_SHIFT
TMC2208_PWM_GRAD_AUTO_MASK
TMC2208_PWM_GRAD_AUTO_SHIFT
file TMC2208_Register.h

Defines

TMC2208_GCONF
TMC2208_GSTAT
TMC2208_IFCNT
TMC2208_SLAVECONF
TMC2208_OTP_PROG
TMC2208_OTP_READ
TMC2208_IOIN
TMC2208_FACTORY_CONF
TMC2208_IHOLD_IRUN
TMC2208_TPOWERDOWN
TMC2208_TSTEP
TMC2208_TPWMTHRS
TMC2208_VACTUAL
TMC2208_MSCNT
TMC2208_MSCURACT
TMC2208_CHOPCONF
TMC2208_DRVSTATUS
TMC2208_PWMCONF
TMC2208_PWMSCALE
TMC2208_PWM_AUTO
file TMC2209.c
#include “TMC2209.h”

Functions

void tmc2209_readWriteArray(uint8_t channel, uint8_t *data, size_t writeLength, size_t readLength)
uint8_t tmc2209_CRC8(uint8_t *data, size_t length)
void tmc2209_writeInt(TMC2209TypeDef *tmc2209, uint8_t address, int32_t value)
int32_t tmc2209_readInt(TMC2209TypeDef *tmc2209, uint8_t address)
void tmc2209_init(TMC2209TypeDef *tmc2209, uint8_t channel, uint8_t slaveAddress, ConfigurationTypeDef *tmc2209_config, const int32_t *registerResetState)
static void writeConfiguration(TMC2209TypeDef *tmc2209)
void tmc2209_periodicJob(TMC2209TypeDef *tmc2209, uint32_t tick)
void tmc2209_setRegisterResetState(TMC2209TypeDef *tmc2209, const int32_t *resetState)
void tmc2209_setCallback(TMC2209TypeDef *tmc2209, tmc2209_callback callback)
uint8_t tmc2209_reset(TMC2209TypeDef *tmc2209)
uint8_t tmc2209_restore(TMC2209TypeDef *tmc2209)
uint8_t tmc2209_get_slave(TMC2209TypeDef *tmc2209)
void tmc2209_set_slave(TMC2209TypeDef *tmc2209, uint8_t slaveAddress)
file TMC2209.h
#include “tmc/helpers/Constants.h”
#include “tmc/helpers/API_Header.h”
#include “TMC2209_Register.h”
#include “TMC2209_Constants.h”
#include “TMC2209_Fields.h”

Defines

TMC2209_FIELD_READ(tdef, address, mask, shift)
TMC2209_FIELD_UPDATE(tdef, address, mask, shift, value)
R00
R10
R11
R6C
R70

Typedefs

typedef void (*tmc2209_callback)(TMC2209TypeDef*, ConfigState)

Functions

void tmc2209_writeInt(TMC2209TypeDef *tmc2209, uint8_t address, int32_t value)
int32_t tmc2209_readInt(TMC2209TypeDef *tmc2209, uint8_t address)
void tmc2209_init(TMC2209TypeDef *tmc2209, uint8_t channel, uint8_t slaveAddress, ConfigurationTypeDef *tmc2209_config, const int32_t *registerResetState)
uint8_t tmc2209_reset(TMC2209TypeDef *tmc2209)
uint8_t tmc2209_restore(TMC2209TypeDef *tmc2209)
void tmc2209_setRegisterResetState(TMC2209TypeDef *tmc2209, const int32_t *resetState)
void tmc2209_setCallback(TMC2209TypeDef *tmc2209, tmc2209_callback callback)
void tmc2209_periodicJob(TMC2209TypeDef *tmc2209, uint32_t tick)
uint8_t tmc2209_get_slave(TMC2209TypeDef *tmc2209)
void tmc2209_set_slave(TMC2209TypeDef *tmc2209, uint8_t slaveAddress)

Variables

static const uint8_t tmc2209_defaultRegisterAccess[TMC2209_REGISTER_COUNT] = {0x03, 0x23, 0x01, 0x02, 0x02, 0x01, 0x01, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x02, 0x01, 0x02, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x01, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x01, 0x01, 0x03, ____, ____, 0x01, 0x03, 0x01, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const int32_t tmc2209_defaultRegisterResetState[TMC2209_REGISTER_COUNT] = {R00, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R10, R11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R6C, 0, 0, 0, R70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
file TMC2209_Constants.h

Defines

TMC2209_MOTORS
TMC2209_REGISTER_COUNT
TMC2209_WRITE_BIT
TMC2209_ADDRESS_MASK
TMC2209_MAX_VELOCITY
TMC2209_MAX_ACCELERATION
file TMC2209_Fields.h

Defines

TMC2209_I_SCALE_ANALOG_MASK
TMC2209_I_SCALE_ANALOG_SHIFT
TMC2209_INTERNAL_RSENSE_MASK
TMC2209_INTERNAL_RSENSE_SHIFT
TMC2209_EN_SPREADCYCLE_MASK
TMC2209_EN_SPREADCYCLE_SHIFT
TMC2209_SHAFT_MASK
TMC2209_SHAFT_SHIFT
TMC2209_INDEX_OTPW_MASK
TMC2209_INDEX_OTPW_SHIFT
TMC2209_INDEX_STEP_MASK
TMC2209_INDEX_STEP_SHIFT
TMC2209_PDN_DISABLE_MASK
TMC2209_PDN_DISABLE_SHIFT
TMC2209_MSTEP_REG_SELECT_MASK
TMC2209_MSTEP_REG_SELECT_SHIFT
TMC2209_MULTISTEP_FILT_MASK
TMC2209_MULTISTEP_FILT_SHIFT
TMC2209_TEST_MODE_MASK
TMC2209_TEST_MODE_SHIFT
TMC2209_RESET_MASK
TMC2209_RESET_SHIFT
TMC2209_DRV_ERR_MASK
TMC2209_DRV_ERR_SHIFT
TMC2209_UV_CP_MASK
TMC2209_UV_CP_SHIFT
TMC2209_IFCNT_MASK
TMC2209_IFCNT_SHIFT
TMC2209_SLAVECONF_MASK
TMC2209_SLAVECONF_SHIFT
TMC2209_OTPBIT_MASK
TMC2209_OTPBIT_SHIFT
TMC2209_OTPBYTE_MASK
TMC2209_OTPBYTE_SHIFT
TMC2209_OTPMAGIC_MASK
TMC2209_OTPMAGIC_SHIFT
TMC2209_OTP0_BYTE_0_READ_DATA_MASK
TMC2209_OTP0_BYTE_0_READ_DATA_SHIFT
TMC2209_OTP1_BYTE_1_READ_DATA_MASK
TMC2209_OTP1_BYTE_1_READ_DATA_SHIFT
TMC2209_OTP2_BYTE_2_READ_DATA_MASK
TMC2209_OTP2_BYTE_2_READ_DATA_SHIFT
TMC2209_ENN_MASK
TMC2209_ENN_SHIFT
TMC2209_MS1_MASK
TMC2209_MS1_SHIFT
TMC2209_MS2_MASK
TMC2209_MS2_SHIFT
TMC2209_DIAG_MASK
TMC2209_DIAG_SHIFT
TMC2209_PDN_UART_MASK
TMC2209_PDN_UART_SHIFT
TMC2209_STEP_MASK
TMC2209_STEP_SHIFT
TMC2209_SEL_A_MASK
TMC2209_SEL_A_SHIFT
TMC2209_DIR_MASK
TMC2209_DIR_SHIFT
TMC2209_VERSION_MASK
TMC2209_VERSION_SHIFT
TMC2209_FCLKTRIM_MASK
TMC2209_FCLKTRIM_SHIFT
TMC2209_OTTRIM_MASK
TMC2209_OTTRIM_SHIFT
TMC2209_IHOLD_MASK
TMC2209_IHOLD_SHIFT
TMC2209_IRUN_MASK
TMC2209_IRUN_SHIFT
TMC2209_IHOLDDELAY_MASK
TMC2209_IHOLDDELAY_SHIFT
TMC2209_TPOWERDOWN_MASK
TMC2209_TPOWERDOWN_SHIFT
TMC2209_TSTEP_MASK
TMC2209_TSTEP_SHIFT
TMC2209_TPWMTHRS_MASK
TMC2209_TPWMTHRS_SHIFT
TMC2209_VACTUAL_MASK
TMC2209_VACTUAL_SHIFT
TMC2209_SEMIN_MASK
TMC2209_SEMIN_SHIFT
TMC2209_SEUP_MASK
TMC2209_SEUP_SHIFT
TMC2209_SEMAX_MASK
TMC2209_SEMAX_SHIFT
TMC2209_SEDN_MASK
TMC2209_SEDN_SHIFT
TMC2209_SEIMIN_MASK
TMC2209_SEIMIN_SHIFT
TMC2209_MSCNT_MASK
TMC2209_MSCNT_SHIFT
TMC2209_CUR_A_MASK
TMC2209_CUR_A_SHIFT
TMC2209_CUR_B_MASK
TMC2209_CUR_B_SHIFT
TMC2209_TOFF_MASK
TMC2209_TOFF_SHIFT
TMC2209_HSTRT_MASK
TMC2209_HSTRT_SHIFT
TMC2209_HEND_MASK
TMC2209_HEND_SHIFT
TMC2209_TBL_MASK
TMC2209_TBL_SHIFT
TMC2209_VSENSE_MASK
TMC2209_VSENSE_SHIFT
TMC2209_MRES_MASK
TMC2209_MRES_SHIFT
TMC2209_INTPOL_MASK
TMC2209_INTPOL_SHIFT
TMC2209_DEDGE_MASK
TMC2209_DEDGE_SHIFT
TMC2209_DISS2G_MASK
TMC2209_DISS2G_SHIFT
TMC2209_DISS2VS_MASK
TMC2209_DISS2VS_SHIFT
TMC2209_OTPW_MASK
TMC2209_OTPW_SHIFT
TMC2209_OT_MASK
TMC2209_OT_SHIFT
TMC2209_S2GA_MASK
TMC2209_S2GA_SHIFT
TMC2209_S2GB_MASK
TMC2209_S2GB_SHIFT
TMC2209_S2VSA_MASK
TMC2209_S2VSA_SHIFT
TMC2209_S2VSB_MASK
TMC2209_S2VSB_SHIFT
TMC2209_OLA_MASK
TMC2209_OLA_SHIFT
TMC2209_OLB_MASK
TMC2209_OLB_SHIFT
TMC2209_T120_MASK
TMC2209_T120_SHIFT
TMC2209_T143_MASK
TMC2209_T143_SHIFT
TMC2209_T150_MASK
TMC2209_T150_SHIFT
TMC2209_T157_MASK
TMC2209_T157_SHIFT
TMC2209_CS_ACTUAL_MASK
TMC2209_CS_ACTUAL_SHIFT
TMC2209_STEALTH_MASK
TMC2209_STEALTH_SHIFT
TMC2209_STST_MASK
TMC2209_STST_SHIFT
TMC2209_PWM_OFS_MASK
TMC2209_PWM_OFS_SHIFT
TMC2209_PWM_GRAD_MASK
TMC2209_PWM_GRAD_SHIFT
TMC2209_PWM_FREQ_MASK
TMC2209_PWM_FREQ_SHIFT
TMC2209_PWM_AUTOSCALE_MASK
TMC2209_PWM_AUTOSCALE_SHIFT
TMC2209_PWM_AUTOGRAD_MASK
TMC2209_PWM_AUTOGRAD_SHIFT
TMC2209_FREEWHEEL_MASK
TMC2209_FREEWHEEL_SHIFT
TMC2209_PWM_REG_MASK
TMC2209_PWM_REG_SHIFT
TMC2209_PWM_LIM_MASK
TMC2209_PWM_LIM_SHIFT
TMC2209_PWM_SCALE_SUM_MASK
TMC2209_PWM_SCALE_SUM_SHIFT
TMC2209_PWM_SCALE_AUTO_MASK
TMC2209_PWM_SCALE_AUTO_SHIFT
TMC2209_PWM_OFS_AUTO_MASK
TMC2209_PWM_OFS_AUTO_SHIFT
TMC2209_PWM_GRAD_AUTO_MASK
TMC2209_PWM_GRAD_AUTO_SHIFT
file TMC2209_Register.h

Defines

TMC2209_GCONF
TMC2209_GSTAT
TMC2209_IFCNT
TMC2209_SLAVECONF
TMC2209_OTP_PROG
TMC2209_OTP_READ
TMC2209_IOIN
TMC2209_FACTORY_CONF
TMC2209_IHOLD_IRUN
TMC2209_TPOWERDOWN
TMC2209_TSTEP
TMC2209_TPWMTHRS
TMC2209_TCOOLTHRS
TMC2209_VACTUAL
TMC2209_SGTHRS
TMC2209_SG_RESULT
TMC2209_COOLCONF
TMC2209_MSCNT
TMC2209_MSCURACT
TMC2209_CHOPCONF
TMC2209_DRVSTATUS
TMC2209_PWMCONF
TMC2209_PWMSCALE
TMC2209_PWM_AUTO
file TMC2224.c
#include “TMC2224.h”

Defines

R00
R10
R11
R6C
R70

Functions

void tmc2224_writeRegister(uint8_t motor, uint8_t address, int32_t value)
void tmc2224_readRegister(uint8_t motor, uint8_t address, int32_t *value)
void tmc2224_initConfig(TMC2224TypeDef *tmc2224)
void tmc2224_writeConfiguration(TMC2224TypeDef *tmc2224, ConfigurationTypeDef *TMC2224_config)
void tmc2224_periodicJob(uint8_t motor, uint32_t tick, TMC2224TypeDef *tmc2224, ConfigurationTypeDef *TMC2224_config)
uint8_t tmc2224_reset(TMC2224TypeDef *tmc2224, ConfigurationTypeDef *TMC2224_config)
uint8_t tmc2224_restore(ConfigurationTypeDef *TMC2224_config)
uint8_t tmc2224_get_slave(TMC2224TypeDef *tmc2224)
void tmc2224_set_slave(TMC2224TypeDef *tmc2224, uint8_t slave)

Variables

const uint8_t tmc2224_defaultRegisterAccess[TMC2224_REGISTER_COUNT] = {3, 3, 1, 2, 2, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 3, 0, 0, 1, 3, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
const int32_t tmc2224_defaultRegisterResetState[TMC2224_REGISTER_COUNT] = {R00, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R10, R11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R6C, 0, 0, 0, R70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
file TMC2224.h
#include “tmc/helpers/API_Header.h”
#include “TMC2224_Register.h”

Defines

TMC2224_MOTORS
TMC2224_REGISTER_COUNT
TMC2224_WRITE_BIT
TMC2224_ADDRESS_MASK
TMC2224_MAX_VELOCITY
TMC2224_MAX_ACCELERATION

Functions

void tmc2224_initConfig(TMC2224TypeDef *TMC2224)
void tmc2224_periodicJob(uint8_t motor, uint32_t tick, TMC2224TypeDef *TMC2224, ConfigurationTypeDef *TMC2224_config)
uint8_t tmc2224_reset(TMC2224TypeDef *tmc2224, ConfigurationTypeDef *TMC2224_config)
uint8_t tmc2224_restore(ConfigurationTypeDef *TMC2224_config)
uint8_t tmc2224_get_slave(TMC2224TypeDef *tmc2224)
void tmc2224_set_slave(TMC2224TypeDef *tmc2224, uint8_t slave)
file TMC2224_Mask_Shift.h

Defines

TMC2224_I_SCALE_ANALOG_MASK
TMC2224_I_SCALE_ANALOG_SHIFT
TMC2224_INTERNAL_RSENSE_MASK
TMC2224_INTERNAL_RSENSE_SHIFT
TMC2224_EN_SPREADCYCLE_MASK
TMC2224_EN_SPREADCYCLE_SHIFT
TMC2224_SHAFT_MASK
TMC2224_SHAFT_SHIFT
TMC2224_INDEX_OTPW_MASK
TMC2224_INDEX_OTPW_SHIFT
TMC2224_INDEX_STEP_MASK
TMC2224_INDEX_STEP_SHIFT
TMC2224_PDN_DISABLE_MASK
TMC2224_PDN_DISABLE_SHIFT
TMC2224_MSTEP_REG_SELECT_MASK
TMC2224_MSTEP_REG_SELECT_SHIFT
TMC2224_MULTISTEP_FILT_MASK
TMC2224_MULTISTEP_FILT_SHIFT
TMC2224_TEST_MODE_MASK
TMC2224_TEST_MODE_SHIFT
TMC2224_RESET_MASK
TMC2224_RESET_SHIFT
TMC2224_DRV_ERR_MASK
TMC2224_DRV_ERR_SHIFT
TMC2224_UV_CP_MASK
TMC2224_UV_CP_SHIFT
TMC2224_IFCNT_MASK
TMC2224_IFCNT_SHIFT
TMC2224_SLAVECONF_MASK
TMC2224_SLAVECONF_SHIFT
TMC2224_OTPBIT_MASK
TMC2224_OTPBIT_SHIFT
TMC2224_OTPBYTE_MASK
TMC2224_OTPBYTE_SHIFT
TMC2224_OTPMAGIC_MASK
TMC2224_OTPMAGIC_SHIFT
TMC2224_OTP0_BYTE_0_READ_DATA_MASK
TMC2224_OTP0_BYTE_0_READ_DATA_SHIFT
TMC2224_OTP1_BYTE_1_READ_DATA_MASK
TMC2224_OTP1_BYTE_1_READ_DATA_SHIFT
TMC2224_OTP2_BYTE_2_READ_DATA_MASK
TMC2224_OTP2_BYTE_2_READ_DATA_SHIFT
TMC2224_PDN_UART_MASK
TMC2224_PDN_UART_SHIFT
TMC2224_SPREAD_MASK
TMC2224_SPREAD_SHIFT
TMC2224_DIR_MASK
TMC2224_DIR_SHIFT
TMC2224_ENN_MASK
TMC2224_ENN_SHIFT
TMC2224_STEP_MASK
TMC2224_STEP_SHIFT
TMC2224_MS1_MASK
TMC2224_MS1_SHIFT
TMC2224_MS2_MASK
TMC2224_MS2_SHIFT
TMC2224_SEL_A_MASK
TMC2224_SEL_A_SHIFT
TMC2224_VERSION_MASK
TMC2224_VERSION_SHIFT
TMC2224_FCLKTRIM_MASK
TMC2224_FCLKTRIM_SHIFT
TMC2224_OTTRIM_MASK
TMC2224_OTTRIM_SHIFT
TMC2224_IHOLD_MASK
TMC2224_IHOLD_SHIFT
TMC2224_IRUN_MASK
TMC2224_IRUN_SHIFT
TMC2224_IHOLDDELAY_MASK
TMC2224_IHOLDDELAY_SHIFT
TMC2224_TPOWERDOWN_MASK
TMC2224_TPOWERDOWN_SHIFT
TMC2224_TSTEP_MASK
TMC2224_TSTEP_SHIFT
TMC2224_TPWMTHRS_MASK
TMC2224_TPWMTHRS_SHIFT
TMC2224_VACTUAL_MASK
TMC2224_VACTUAL_SHIFT
TMC2224_MSCNT_MASK
TMC2224_MSCNT_SHIFT
TMC2224_CUR_A_MASK
TMC2224_CUR_A_SHIFT
TMC2224_CUR_B_MASK
TMC2224_CUR_B_SHIFT
TMC2224_TOFF_MASK
TMC2224_TOFF_SHIFT
TMC2224_HSTRT_MASK
TMC2224_HSTRT_SHIFT
TMC2224_HEND_MASK
TMC2224_HEND_SHIFT
TMC2224_TBL_MASK
TMC2224_TBL_SHIFT
TMC2224_VSENSE_MASK
TMC2224_VSENSE_SHIFT
TMC2224_MRES_MASK
TMC2224_MRES_SHIFT
TMC2224_INTPOL_MASK
TMC2224_INTPOL_SHIFT
TMC2224_DEDGE_MASK
TMC2224_DEDGE_SHIFT
TMC2224_DISS2G_MASK
TMC2224_DISS2G_SHIFT
TMC2224_DISS2VS_MASK
TMC2224_DISS2VS_SHIFT
TMC2224_OTPW_MASK
TMC2224_OTPW_SHIFT
TMC2224_OT_MASK
TMC2224_OT_SHIFT
TMC2224_S2GA_MASK
TMC2224_S2GA_SHIFT
TMC2224_S2GB_MASK
TMC2224_S2GB_SHIFT
TMC2224_S2VSA_MASK
TMC2224_S2VSA_SHIFT
TMC2224_S2VSB_MASK
TMC2224_S2VSB_SHIFT
TMC2224_OLA_MASK
TMC2224_OLA_SHIFT
TMC2224_OLB_MASK
TMC2224_OLB_SHIFT
TMC2224_T120_MASK
TMC2224_T120_SHIFT
TMC2224_T143_MASK
TMC2224_T143_SHIFT
TMC2224_T150_MASK
TMC2224_T150_SHIFT
TMC2224_T157_MASK
TMC2224_T157_SHIFT
TMC2224_CS_ACTUAL_MASK
TMC2224_CS_ACTUAL_SHIFT
TMC2224_STEALTH_MASK
TMC2224_STEALTH_SHIFT
TMC2224_STST_MASK
TMC2224_STST_SHIFT
TMC2224_PWM_OFS_MASK
TMC2224_PWM_OFS_SHIFT
TMC2224_PWM_GRAD_MASK
TMC2224_PWM_GRAD_SHIFT
TMC2224_PWM_FREQ_MASK
TMC2224_PWM_FREQ_SHIFT
TMC2224_PWM_AUTOSCALE_MASK
TMC2224_PWM_AUTOSCALE_SHIFT
TMC2224_PWM_AUTOGRAD_MASK
TMC2224_PWM_AUTOGRAD_SHIFT
TMC2224_FREEWHEEL_MASK
TMC2224_FREEWHEEL_SHIFT
TMC2224_PWM_REG_MASK
TMC2224_PWM_REG_SHIFT
TMC2224_PWM_LIM_MASK
TMC2224_PWM_LIM_SHIFT
TMC2224_PWM_SCALE_SUM_MASK
TMC2224_PWM_SCALE_SUM_SHIFT
TMC2224_PWM_SCALE_AUTO_MASK
TMC2224_PWM_SCALE_AUTO_SHIFT
TMC2224_PWM_OFS_AUTO_MASK
TMC2224_PWM_OFS_AUTO_SHIFT
TMC2224_PWM_GRAD_AUTO_MASK
TMC2224_PWM_GRAD_AUTO_SHIFT
file TMC2224_Register.h

Defines

TMC2224_GCONF
TMC2224_GSTAT
TMC2224_IFCNT
TMC2224_SLAVECONF
TMC2224_OTP_PROG
TMC2224_OTP_READ
TMC2224_IOIN
TMC2224_FACTORY_CONF
TMC2224_IHOLD_IRUN
TMC2224_TPOWERDOWN
TMC2224_TSTEP
TMC2224_TPWMTHRS
TMC2224_VACTUAL
TMC2224_MSCNT
TMC2224_MSCURACT
TMC2224_CHOPCONF
TMC2224_DRVSTATUS
TMC2224_PWMCONF
TMC2224_PWMSCALE
TMC2224_PWM_AUTO
file TMC2225.c
#include “TMC2225.h”

Functions

void tmc2225_readWriteArray(uint8_t channel, uint8_t *data, size_t writeLength, size_t readLength)
uint8_t tmc2225_CRC8(uint8_t *data, size_t length)
void tmc2225_writeInt(TMC2225TypeDef *tmc2225, uint8_t address, int32_t value)
int32_t tmc2225_readInt(TMC2225TypeDef *tmc2225, uint8_t address)
void tmc2225_init(TMC2225TypeDef *tmc2225, uint8_t channel, ConfigurationTypeDef *tmc2225_config, const int32_t *registerResetState)
static void writeConfiguration(TMC2225TypeDef *tmc2225)
void tmc2225_periodicJob(TMC2225TypeDef *tmc2225, uint32_t tick)
void tmc2225_setRegisterResetState(TMC2225TypeDef *tmc2225, const int32_t *resetState)
void tmc2225_setCallback(TMC2225TypeDef *tmc2225, tmc2225_callback callback)
uint8_t tmc2225_reset(TMC2225TypeDef *tmc2225)
uint8_t tmc2225_restore(TMC2225TypeDef *tmc2225)
void tmc2225_set_slave(TMC2225TypeDef *tmc2225, uint8_t slave)
uint8_t tmc2225_get_slave(TMC2225TypeDef *tmc2225)
file TMC2225.h
#include “tmc/helpers/API_Header.h”
#include “TMC2225_Constants.h”
#include “TMC2225_Register.h”
#include “TMC2225_Fields.h”

Defines

TMC2225_FIELD_READ(tdef, address, mask, shift)
TMC2225_FIELD_UPDATE(tdef, address, mask, shift, value)
R00
R10
R11
R6C
R70

Typedefs

typedef void (*tmc2225_callback)(TMC2225TypeDef*, ConfigState)

Functions

void tmc2225_writeInt(TMC2225TypeDef *tmc2225, uint8_t address, int32_t value)
int32_t tmc2225_readInt(TMC2225TypeDef *tmc2225, uint8_t address)
void tmc2225_init(TMC2225TypeDef *tmc2225, uint8_t channel, ConfigurationTypeDef *tmc2225_config, const int32_t *registerResetState)
uint8_t tmc2225_reset(TMC2225TypeDef *tmc2225)
uint8_t tmc2225_restore(TMC2225TypeDef *tmc2225)
void tmc2225_setRegisterResetState(TMC2225TypeDef *tmc2225, const int32_t *resetState)
void tmc2225_setCallback(TMC2225TypeDef *tmc2225, tmc2225_callback callback)
void tmc2225_periodicJob(TMC2225TypeDef *tmc2225, uint32_t tick)
uint8_t tmc2225_get_slave(TMC2225TypeDef *tmc2225)
void tmc2225_set_slave(TMC2225TypeDef *tmc2225, uint8_t slave)

Variables

static const uint8_t tmc2225_defaultRegisterAccess[TMC2225_REGISTER_COUNT] = {0x03, 0x23, 0x01, 0x02, 0x02, 0x01, 0x01, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x02, 0x01, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x01, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x01, 0x01, 0x03, ____, ____, 0x01, 0x03, 0x01, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const int32_t tmc2225_defaultRegisterResetState[TMC2225_REGISTER_COUNT] = {R00, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R10, R11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R6C, 0, 0, 0, R70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
file TMC2225_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC2225_MOTORS
TMC2225_REGISTER_COUNT
TMC2225_WRITE_BIT
TMC2225_ADDRESS_MASK
TMC2225_MAX_VELOCITY
TMC2225_MAX_ACCELERATION
file TMC2225_Fields.h

Defines

TMC2225_I_SCALE_ANALOG_MASK
TMC2225_I_SCALE_ANALOG_SHIFT
TMC2225_INTERNAL_RSENSE_MASK
TMC2225_INTERNAL_RSENSE_SHIFT
TMC2225_EN_SPREADCYCLE_MASK
TMC2225_EN_SPREADCYCLE_SHIFT
TMC2225_SHAFT_MASK
TMC2225_SHAFT_SHIFT
TMC2225_INDEX_OTPW_MASK
TMC2225_INDEX_OTPW_SHIFT
TMC2225_INDEX_STEP_MASK
TMC2225_INDEX_STEP_SHIFT
TMC2225_PDN_DISABLE_MASK
TMC2225_PDN_DISABLE_SHIFT
TMC2225_MSTEP_REG_SELECT_MASK
TMC2225_MSTEP_REG_SELECT_SHIFT
TMC2225_MULTISTEP_FILT_MASK
TMC2225_MULTISTEP_FILT_SHIFT
TMC2225_TEST_MODE_MASK
TMC2225_TEST_MODE_SHIFT
TMC2225_RESET_MASK
TMC2225_RESET_SHIFT
TMC2225_DRV_ERR_MASK
TMC2225_DRV_ERR_SHIFT
TMC2225_UV_CP_MASK
TMC2225_UV_CP_SHIFT
TMC2225_IFCNT_MASK
TMC2225_IFCNT_SHIFT
TMC2225_SLAVECONF_MASK
TMC2225_SLAVECONF_SHIFT
TMC2225_OTPBIT_MASK
TMC2225_OTPBIT_SHIFT
TMC2225_OTPBYTE_MASK
TMC2225_OTPBYTE_SHIFT
TMC2225_OTPMAGIC_MASK
TMC2225_OTPMAGIC_SHIFT
TMC2225_OTP0_BYTE_0_READ_DATA_MASK
TMC2225_OTP0_BYTE_0_READ_DATA_SHIFT
TMC2225_OTP1_BYTE_1_READ_DATA_MASK
TMC2225_OTP1_BYTE_1_READ_DATA_SHIFT
TMC2225_OTP2_BYTE_2_READ_DATA_MASK
TMC2225_OTP2_BYTE_2_READ_DATA_SHIFT
TMC2225_ENN_MASK
TMC2225_ENN_SHIFT
TMC2225_MS1_MASK
TMC2225_MS1_SHIFT
TMC2225_MS2_MASK
TMC2225_MS2_SHIFT
TMC2225_DIAG_MASK
TMC2225_DIAG_SHIFT
TMC2225_PDN_UART_MASK
TMC2225_PDN_UART_SHIFT
TMC2225_STEP_MASK
TMC2225_STEP_SHIFT
TMC2225_SEL_A_MASK
TMC2225_SEL_A_SHIFT
TMC2225_DIR_MASK
TMC2225_DIR_SHIFT
TMC2225_VERSION_MASK
TMC2225_VERSION_SHIFT
TMC2225_FCLKTRIM_MASK
TMC2225_FCLKTRIM_SHIFT
TMC2225_OTTRIM_MASK
TMC2225_OTTRIM_SHIFT
TMC2225_IHOLD_MASK
TMC2225_IHOLD_SHIFT
TMC2225_IRUN_MASK
TMC2225_IRUN_SHIFT
TMC2225_IHOLDDELAY_MASK
TMC2225_IHOLDDELAY_SHIFT
TMC2225_TPOWERDOWN_MASK
TMC2225_TPOWERDOWN_SHIFT
TMC2225_TSTEP_MASK
TMC2225_TSTEP_SHIFT
TMC2225_TPWMTHRS_MASK
TMC2225_TPWMTHRS_SHIFT
TMC2225_VACTUAL_MASK
TMC2225_VACTUAL_SHIFT
TMC2225_MSCNT_MASK
TMC2225_MSCNT_SHIFT
TMC2225_CUR_A_MASK
TMC2225_CUR_A_SHIFT
TMC2225_CUR_B_MASK
TMC2225_CUR_B_SHIFT
TMC2225_TOFF_MASK
TMC2225_TOFF_SHIFT
TMC2225_HSTRT_MASK
TMC2225_HSTRT_SHIFT
TMC2225_HEND_MASK
TMC2225_HEND_SHIFT
TMC2225_TBL_MASK
TMC2225_TBL_SHIFT
TMC2225_VSENSE_MASK
TMC2225_VSENSE_SHIFT
TMC2225_MRES_MASK
TMC2225_MRES_SHIFT
TMC2225_INTPOL_MASK
TMC2225_INTPOL_SHIFT
TMC2225_DEDGE_MASK
TMC2225_DEDGE_SHIFT
TMC2225_DISS2G_MASK
TMC2225_DISS2G_SHIFT
TMC2225_DISS2VS_MASK
TMC2225_DISS2VS_SHIFT
TMC2225_OTPW_MASK
TMC2225_OTPW_SHIFT
TMC2225_OT_MASK
TMC2225_OT_SHIFT
TMC2225_S2GA_MASK
TMC2225_S2GA_SHIFT
TMC2225_S2GB_MASK
TMC2225_S2GB_SHIFT
TMC2225_S2VSA_MASK
TMC2225_S2VSA_SHIFT
TMC2225_S2VSB_MASK
TMC2225_S2VSB_SHIFT
TMC2225_OLA_MASK
TMC2225_OLA_SHIFT
TMC2225_OLB_MASK
TMC2225_OLB_SHIFT
TMC2225_T120_MASK
TMC2225_T120_SHIFT
TMC2225_T143_MASK
TMC2225_T143_SHIFT
TMC2225_T150_MASK
TMC2225_T150_SHIFT
TMC2225_T157_MASK
TMC2225_T157_SHIFT
TMC2225_CS_ACTUAL_MASK
TMC2225_CS_ACTUAL_SHIFT
TMC2225_STEALTH_MASK
TMC2225_STEALTH_SHIFT
TMC2225_STST_MASK
TMC2225_STST_SHIFT
TMC2225_PWM_OFS_MASK
TMC2225_PWM_OFS_SHIFT
TMC2225_PWM_GRAD_MASK
TMC2225_PWM_GRAD_SHIFT
TMC2225_PWM_FREQ_MASK
TMC2225_PWM_FREQ_SHIFT
TMC2225_PWM_AUTOSCALE_MASK
TMC2225_PWM_AUTOSCALE_SHIFT
TMC2225_PWM_AUTOGRAD_MASK
TMC2225_PWM_AUTOGRAD_SHIFT
TMC2225_FREEWHEEL_MASK
TMC2225_FREEWHEEL_SHIFT
TMC2225_PWM_REG_MASK
TMC2225_PWM_REG_SHIFT
TMC2225_PWM_LIM_MASK
TMC2225_PWM_LIM_SHIFT
TMC2225_PWM_SCALE_SUM_MASK
TMC2225_PWM_SCALE_SUM_SHIFT
TMC2225_PWM_SCALE_AUTO_MASK
TMC2225_PWM_SCALE_AUTO_SHIFT
TMC2225_PWM_OFS_AUTO_MASK
TMC2225_PWM_OFS_AUTO_SHIFT
TMC2225_PWM_GRAD_AUTO_MASK
TMC2225_PWM_GRAD_AUTO_SHIFT
file TMC2225_Register.h

Defines

TMC2225_GCONF
TMC2225_GSTAT
TMC2225_IFCNT
TMC2225_SLAVECONF
TMC2225_OTP_PROG
TMC2225_OTP_READ
TMC2225_IOIN
TMC2225_FACTORY_CONF
TMC2225_IHOLD_IRUN
TMC2225_TPOWERDOWN
TMC2225_TSTEP
TMC2225_TPWMTHRS
TMC2225_VACTUAL
TMC2225_MSCNT
TMC2225_MSCURACT
TMC2225_CHOPCONF
TMC2225_DRVSTATUS
TMC2225_PWMCONF
TMC2225_PWMSCALE
TMC2225_PWM_AUTO
file TMC2226.c
#include “TMC2226.h”

Functions

void tmc2226_readWriteArray(uint8_t channel, uint8_t *data, size_t writeLength, size_t readLength)
uint8_t tmc2226_CRC8(uint8_t *data, size_t length)
void tmc2226_writeInt(TMC2226TypeDef *tmc2226, uint8_t address, int32_t value)
int32_t tmc2226_readInt(TMC2226TypeDef *tmc2226, uint8_t address)
void tmc2226_init(TMC2226TypeDef *tmc2226, uint8_t channel, uint8_t slaveAddress, ConfigurationTypeDef *tmc2226_config, const int32_t *registerResetState)
static void writeConfiguration(TMC2226TypeDef *tmc2226)
void tmc2226_periodicJob(TMC2226TypeDef *tmc2226, uint32_t tick)
void tmc2226_setRegisterResetState(TMC2226TypeDef *tmc2226, const int32_t *resetState)
void tmc2226_setCallback(TMC2226TypeDef *tmc2226, tmc2226_callback callback)
uint8_t tmc2226_reset(TMC2226TypeDef *tmc2226)
uint8_t tmc2226_restore(TMC2226TypeDef *tmc2226)
uint8_t tmc2226_getSlaveAddress(TMC2226TypeDef *tmc2226)
void tmc2226_setSlaveAddress(TMC2226TypeDef *tmc2226, uint8_t slaveAddress)
file TMC2226.h
#include “tmc/helpers/Constants.h”
#include “tmc/helpers/API_Header.h”
#include “TMC2226_Register.h”
#include “TMC2226_Constants.h”
#include “TMC2226_Fields.h”

Defines

TMC2226_FIELD_READ(tdef, address, mask, shift)
TMC2226_FIELD_UPDATE(tdef, address, mask, shift, value)
R00
R10
R6C
R70

Typedefs

typedef void (*tmc2226_callback)(TMC2226TypeDef*, ConfigState)

Functions

void tmc2226_writeInt(TMC2226TypeDef *tmc2226, uint8_t address, int32_t value)
int32_t tmc2226_readInt(TMC2226TypeDef *tmc2226, uint8_t address)
void tmc2226_init(TMC2226TypeDef *tmc2226, uint8_t channel, uint8_t slaveAddress, ConfigurationTypeDef *tmc2226_config, const int32_t *registerResetState)
uint8_t tmc2226_reset(TMC2226TypeDef *tmc2226)
uint8_t tmc2226_restore(TMC2226TypeDef *tmc2226)
void tmc2226_setRegisterResetState(TMC2226TypeDef *tmc2226, const int32_t *resetState)
void tmc2226_setCallback(TMC2226TypeDef *tmc2226, tmc2226_callback callback)
void tmc2226_periodicJob(TMC2226TypeDef *tmc2226, uint32_t tick)
uint8_t tmc2226_getSlaveAddress(TMC2226TypeDef *tmc2226)
void tmc2226_setSlaveAddress(TMC2226TypeDef *tmc2226, uint8_t slaveAddress)

Variables

static const uint8_t tmc2226_defaultRegisterAccess[TMC2226_REGISTER_COUNT] = {0x03, 0x23, 0x01, 0x02, 0x02, 0x01, 0x01, 0x43, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x42, 0x01, 0x42, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x01, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x01, 0x01, 0x43, ____, ____, 0x01, 0x03, 0x01, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const int32_t tmc2226_defaultRegisterResetState[TMC2226_REGISTER_COUNT] = {R00, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R6C, 0, 0, 0, R70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
static const TMCRegisterConstant tmc2226_RegisterConstants[] = {{0x11, 0x00000014},}
file TMC2226_Constants.h

Defines

TMC2226_MOTORS
TMC2226_REGISTER_COUNT
TMC2226_WRITE_BIT
TMC2226_ADDRESS_MASK
TMC2226_MAX_VELOCITY
TMC2226_MAX_ACCELERATION
file TMC2226_Fields.h

Defines

TMC2226_I_SCALE_ANALOG_MASK
TMC2226_I_SCALE_ANALOG_SHIFT
TMC2226_INTERNAL_RSENSE_MASK
TMC2226_INTERNAL_RSENSE_SHIFT
TMC2226_EN_SPREADCYCLE_MASK
TMC2226_EN_SPREADCYCLE_SHIFT
TMC2226_SHAFT_MASK
TMC2226_SHAFT_SHIFT
TMC2226_INDEX_OTPW_MASK
TMC2226_INDEX_OTPW_SHIFT
TMC2226_INDEX_STEP_MASK
TMC2226_INDEX_STEP_SHIFT
TMC2226_PDN_DISABLE_MASK
TMC2226_PDN_DISABLE_SHIFT
TMC2226_MSTEP_REG_SELECT_MASK
TMC2226_MSTEP_REG_SELECT_SHIFT
TMC2226_MULTISTEP_FILT_MASK
TMC2226_MULTISTEP_FILT_SHIFT
TMC2226_TEST_MODE_MASK
TMC2226_TEST_MODE_SHIFT
TMC2226_RESET_MASK
TMC2226_RESET_SHIFT
TMC2226_DRV_ERR_MASK
TMC2226_DRV_ERR_SHIFT
TMC2226_UV_CP_MASK
TMC2226_UV_CP_SHIFT
TMC2226_IFCNT_MASK
TMC2226_IFCNT_SHIFT
TMC2226_SLAVECONF_MASK
TMC2226_SLAVECONF_SHIFT
TMC2226_OTPBIT_MASK
TMC2226_OTPBIT_SHIFT
TMC2226_OTPBYTE_MASK
TMC2226_OTPBYTE_SHIFT
TMC2226_OTPMAGIC_MASK
TMC2226_OTPMAGIC_SHIFT
TMC2226_OTP0_BYTE_0_READ_DATA_MASK
TMC2226_OTP0_BYTE_0_READ_DATA_SHIFT
TMC2226_OTP1_BYTE_1_READ_DATA_MASK
TMC2226_OTP1_BYTE_1_READ_DATA_SHIFT
TMC2226_OTP2_BYTE_2_READ_DATA_MASK
TMC2226_OTP2_BYTE_2_READ_DATA_SHIFT
TMC2226_ENN_MASK
TMC2226_ENN_SHIFT
TMC2226_MS1_MASK
TMC2226_MS1_SHIFT
TMC2226_MS2_MASK
TMC2226_MS2_SHIFT
TMC2226_DIAG_MASK
TMC2226_DIAG_SHIFT
TMC2226_PDN_UART_MASK
TMC2226_PDN_UART_SHIFT
TMC2226_STEP_MASK
TMC2226_STEP_SHIFT
TMC2226_SEL_A_MASK
TMC2226_SEL_A_SHIFT
TMC2226_DIR_MASK
TMC2226_DIR_SHIFT
TMC2226_VERSION_MASK
TMC2226_VERSION_SHIFT
TMC2226_FCLKTRIM_MASK
TMC2226_FCLKTRIM_SHIFT
TMC2226_OTTRIM_MASK
TMC2226_OTTRIM_SHIFT
TMC2226_IHOLD_MASK
TMC2226_IHOLD_SHIFT
TMC2226_IRUN_MASK
TMC2226_IRUN_SHIFT
TMC2226_IHOLDDELAY_MASK
TMC2226_IHOLDDELAY_SHIFT
TMC2226_TPOWERDOWN_MASK
TMC2226_TPOWERDOWN_SHIFT
TMC2226_TSTEP_MASK
TMC2226_TSTEP_SHIFT
TMC2226_TPWMTHRS_MASK
TMC2226_TPWMTHRS_SHIFT
TMC2226_VACTUAL_MASK
TMC2226_VACTUAL_SHIFT
TMC2226_SEMIN_MASK
TMC2226_SEMIN_SHIFT
TMC2226_SEUP_MASK
TMC2226_SEUP_SHIFT
TMC2226_SEMAX_MASK
TMC2226_SEMAX_SHIFT
TMC2226_SEDN_MASK
TMC2226_SEDN_SHIFT
TMC2226_SEIMIN_MASK
TMC2226_SEIMIN_SHIFT
TMC2226_MSCNT_MASK
TMC2226_MSCNT_SHIFT
TMC2226_CUR_A_MASK
TMC2226_CUR_A_SHIFT
TMC2226_CUR_B_MASK
TMC2226_CUR_B_SHIFT
TMC2226_TOFF_MASK
TMC2226_TOFF_SHIFT
TMC2226_HSTRT_MASK
TMC2226_HSTRT_SHIFT
TMC2226_HEND_MASK
TMC2226_HEND_SHIFT
TMC2226_TBL_MASK
TMC2226_TBL_SHIFT
TMC2226_VSENSE_MASK
TMC2226_VSENSE_SHIFT
TMC2226_MRES_MASK
TMC2226_MRES_SHIFT
TMC2226_INTPOL_MASK
TMC2226_INTPOL_SHIFT
TMC2226_DEDGE_MASK
TMC2226_DEDGE_SHIFT
TMC2226_DISS2G_MASK
TMC2226_DISS2G_SHIFT
TMC2226_DISS2VS_MASK
TMC2226_DISS2VS_SHIFT
TMC2226_OTPW_MASK
TMC2226_OTPW_SHIFT
TMC2226_OT_MASK
TMC2226_OT_SHIFT
TMC2226_S2GA_MASK
TMC2226_S2GA_SHIFT
TMC2226_S2GB_MASK
TMC2226_S2GB_SHIFT
TMC2226_S2VSA_MASK
TMC2226_S2VSA_SHIFT
TMC2226_S2VSB_MASK
TMC2226_S2VSB_SHIFT
TMC2226_OLA_MASK
TMC2226_OLA_SHIFT
TMC2226_OLB_MASK
TMC2226_OLB_SHIFT
TMC2226_T120_MASK
TMC2226_T120_SHIFT
TMC2226_T143_MASK
TMC2226_T143_SHIFT
TMC2226_T150_MASK
TMC2226_T150_SHIFT
TMC2226_T157_MASK
TMC2226_T157_SHIFT
TMC2226_CS_ACTUAL_MASK
TMC2226_CS_ACTUAL_SHIFT
TMC2226_STEALTH_MASK
TMC2226_STEALTH_SHIFT
TMC2226_STST_MASK
TMC2226_STST_SHIFT
TMC2226_PWM_OFS_MASK
TMC2226_PWM_OFS_SHIFT
TMC2226_PWM_GRAD_MASK
TMC2226_PWM_GRAD_SHIFT
TMC2226_PWM_FREQ_MASK
TMC2226_PWM_FREQ_SHIFT
TMC2226_PWM_AUTOSCALE_MASK
TMC2226_PWM_AUTOSCALE_SHIFT
TMC2226_PWM_AUTOGRAD_MASK
TMC2226_PWM_AUTOGRAD_SHIFT
TMC2226_FREEWHEEL_MASK
TMC2226_FREEWHEEL_SHIFT
TMC2226_PWM_REG_MASK
TMC2226_PWM_REG_SHIFT
TMC2226_PWM_LIM_MASK
TMC2226_PWM_LIM_SHIFT
TMC2226_PWM_SCALE_SUM_MASK
TMC2226_PWM_SCALE_SUM_SHIFT
TMC2226_PWM_SCALE_AUTO_MASK
TMC2226_PWM_SCALE_AUTO_SHIFT
TMC2226_PWM_OFS_AUTO_MASK
TMC2226_PWM_OFS_AUTO_SHIFT
TMC2226_PWM_GRAD_AUTO_MASK
TMC2226_PWM_GRAD_AUTO_SHIFT
file TMC2226_Register.h

Defines

TMC2226_GCONF
TMC2226_GSTAT
TMC2226_IFCNT
TMC2226_SLAVECONF
TMC2226_OTP_PROG
TMC2226_OTP_READ
TMC2226_IOIN
TMC2226_FACTORY_CONF
TMC2226_IHOLD_IRUN
TMC2226_TPOWERDOWN
TMC2226_TSTEP
TMC2226_TPWMTHRS
TMC2226_TCOOLTHRS
TMC2226_VACTUAL
TMC2226_SGTHRS
TMC2226_SG_RESULT
TMC2226_COOLCONF
TMC2226_MSCNT
TMC2226_MSCURACT
TMC2226_CHOPCONF
TMC2226_DRVSTATUS
TMC2226_PWMCONF
TMC2226_PWMSCALE
TMC2226_PWM_AUTO
file TMC2240.c
#include “TMC2240.h”

Functions

void tmc2240_writeInt(TMC2240TypeDef *tmc2240, uint8_t address, int32_t value)
void tmc2240_init(TMC2240TypeDef *tmc2240, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
uint8_t tmc2240_reset(TMC2240TypeDef *tmc2240)
uint8_t tmc2240_restore(TMC2240TypeDef *tmc2240)
void tmc2240_setRegisterResetState(TMC2240TypeDef *tmc2240, const int32_t *resetState)
void tmc2240_setCallback(TMC2240TypeDef *tmc2240, tmc2240_callback callback)
uint8_t tmc2240_getSlaveAddress(TMC2240TypeDef *tmc2240)
void tmc2240_setSlaveAddress(TMC2240TypeDef *tmc2240, uint8_t slaveAddress)
static void writeConfiguration(TMC2240TypeDef *tmc2240)
void tmc2240_periodicJob(TMC2240TypeDef *tmc2240, uint32_t tick)
file TMC2240.h
#include “tmc/helpers/API_Header.h”
#include “../TMC2240/TMC2240_Register.h”
#include “TMC2240_Constants.h”
#include “../TMC2240/TMC2240_Fields.h”

Defines

TMC2240_FIELD_READ(tdef, address, mask, shift)
TMC2240_FIELD_WRITE(tdef, address, mask, shift, value)
R00
R0A
R10
R11
R2B
R3A
R52
R60
R61
R62
R63
R64
R65
R66
R67
R68
R69
R6C
R70

Typedefs

typedef void (*tmc2240_callback)(TMC2240TypeDef*, ConfigState)

Functions

void tmc2240_init(TMC2240TypeDef *tmc2240, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
uint8_t tmc2240_reset(TMC2240TypeDef *tmc2240)
uint8_t tmc2240_restore(TMC2240TypeDef *tmc2240)
uint8_t tmc2240_getSlaveAddress(TMC2240TypeDef *tmc2240)
void tmc2240_setSlaveAddress(TMC2240TypeDef *tmc2240, uint8_t slaveAddress)
void tmc2240_setRegisterResetState(TMC2240TypeDef *tmc2240, const int32_t *resetState)
void tmc2240_setCallback(TMC2240TypeDef *tmc2240, tmc2240_callback callback)
void tmc2240_periodicJob(TMC2240TypeDef *tmc2240, uint32_t tick)
uint8_t tmc2240_consistencyCheck(TMC2240TypeDef *tmc2240)

Variables

static const int32_t tmc2240_defaultRegisterResetState[TMC2240_REGISTER_COUNT] = {R00, 0, 0, 0, 0, 0, 0, 0, 0, 0, R0A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R3A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R52, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R60, R61, R62, R63, R64, R65, R66, R67, R68, R69, 0, 0, R6C, 0, 0, 0, R70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,}
static const uint8_t tmc2240_defaultRegisterAccess[TMC2240_REGISTER_COUNT] = {0x03, 0x23, 0x01, 0x03, 0x03, ____, ____, ____, ____, ____, 0x03, 0x03, ____, ____, ____, ____, 0x03, 0x03, 0x01, 0x03, 0x03, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x03, 0x03, 0x03, 0x23, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x01, 0x01, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x01, 0x01, 0x03, 0x03, ____, 0x01, 0x03, 0x01, 0x01, ____, 0x03, 0x01, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const TMCRegisterConstant tmc2240_RegisterConstants[] = {}
file TMC2240_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC2240_REGISTER_COUNT
TMC2240_MOTORS
TMC2240_WRITE_BIT
TMC2240_ADDRESS_MASK
TMC2240_MAX_VELOCITY
TMC2240_MAX_ACCELERATION
TMC2240_MODE_POSITION
TMC2240_MODE_VELPOS
TMC2240_MODE_VELNEG
TMC2240_MODE_HOLD
TMC2240_SW_STOPL_ENABLE
TMC2240_SW_STOPR_ENABLE
TMC2240_SW_STOPL_POLARITY
TMC2240_SW_STOPR_POLARITY
TMC2240_SW_SWAP_LR
TMC2240_SW_LATCH_L_ACT
TMC2240_SW_LATCH_L_INACT
TMC2240_SW_LATCH_R_ACT
TMC2240_SW_LATCH_R_INACT
TMC2240_SW_LATCH_ENC
TMC2240_SW_SG_STOP
TMC2240_SW_SOFTSTOP
TMC2240_RS_STOPL
TMC2240_RS_STOPR
TMC2240_RS_LATCHL
TMC2240_RS_LATCHR
TMC2240_RS_EV_STOPL
TMC2240_RS_EV_STOPR
TMC2240_RS_EV_STOP_SG
TMC2240_RS_EV_POSREACHED
TMC2240_RS_VELREACHED
TMC2240_RS_POSREACHED
TMC2240_RS_VZERO
TMC2240_RS_ZEROWAIT
TMC2240_RS_SECONDMOVE
TMC2240_RS_SG
TMC2240_EM_DECIMAL
TMC2240_EM_LATCH_XACT
TMC2240_EM_CLR_XENC
TMC2240_EM_NEG_EDGE
TMC2240_EM_POS_EDGE
TMC2240_EM_CLR_ONCE
TMC2240_EM_CLR_CONT
TMC2240_EM_IGNORE_AB
TMC2240_EM_POL_N
TMC2240_EM_POL_B
TMC2240_EM_POL_A
file TMC2240_Fields.h

Defines

TMC2240_SPI_STATUS_RESET_FLAG_MASK
TMC2240_SPI_STATUS_RESET_FLAG_SHIFT
TMC2240_SPI_STATUS_DRIVER_ERROR_MASK
TMC2240_SPI_STATUS_DRIVER_ERROR_SHIFT
TMC2240_SPI_STATUS_SG2_MASK
TMC2240_SPI_STATUS_SG2_SHIFT
TMC2240_SPI_STATUS_STANDSTILL_MASK
TMC2240_SPI_STATUS_STANDSTILL_SHIFT
TMC2240_SPI_STATUS_VELOCITY_REACHED_MASK
TMC2240_SPI_STATUS_VELOCITY_REACHED_SHIFT
TMC2240_SPI_STATUS_POSITION_REACHED_MASK
TMC2240_SPI_STATUS_POSITION_REACHED_SHIFT
TMC2240_SPI_STATUS_STATUS_STOP_L_MASK
TMC2240_SPI_STATUS_STATUS_STOP_L_SHIFT
TMC2240_SPI_STATUS_STATUS_STOP_R_MASK
TMC2240_SPI_STATUS_STATUS_STOP_R_SHIFT
TMC2240_FAST_STANDSTILL_MASK
TMC2240_FAST_STANDSTILL_SHIFT
TMC2240_EN_PWM_MODE_MASK
TMC2240_EN_PWM_MODE_SHIFT
TMC2240_MULTISTEP_FILT_MASK
TMC2240_MULTISTEP_FILT_SHIFT
TMC2240_SHAFT_MASK
TMC2240_SHAFT_SHIFT
TMC2240_DIAG0_ERROR_MASK
TMC2240_DIAG0_ERROR_SHIFT
TMC2240_DIAG0_OTPW_MASK
TMC2240_DIAG0_OTPW_SHIFT
TMC2240_DIAG0_STALL_MASK
TMC2240_DIAG0_STALL_SHIFT
TMC2240_DIAG1_STALL_MASK
TMC2240_DIAG1_STALL_SHIFT
TMC2240_DIAG1_INDEX_MASK
TMC2240_DIAG1_INDEX_SHIFT
TMC2240_DIAG1_ONSTATE_MASK
TMC2240_DIAG1_ONSTATE_SHIFT
TMC2240_DIAG0_PUSHPULL_MASK
TMC2240_DIAG0_PUSHPULL_SHIFT
TMC2240_DIAG1_PUSHPULL_MASK
TMC2240_DIAG1_PUSHPULL_SHIFT
TMC2240_SMALL_HYSTERESIS_MASK
TMC2240_SMALL_HYSTERESIS_SHIFT
TMC2240_STOP_ENABLE_MASK
TMC2240_STOP_ENABLE_SHIFT
TMC2240_DIRECT_MODE_MASK
TMC2240_DIRECT_MODE_SHIFT
TMC2240_RESET_MASK
TMC2240_RESET_SHIFT
TMC2240_DRV_ERR_MASK
TMC2240_DRV_ERR_SHIFT
TMC2240_UV_CP_MASK
TMC2240_UV_CP_SHIFT
TMC2240_REGISTER_RESET_MASK
TMC2240_REGISTER_RESET_SHIFT
TMC2240_VM_UVLO_MASK
TMC2240_VM_UVLO_SHIFT
TMC2240_IFCNT_MASK
TMC2240_IFCNT_SHIFT
TMC2240_SLAVEADDR_MASK
TMC2240_SLAVEADDR_SHIFT
TMC2240_SENDDELAY_MASK
TMC2240_SENDDELAY_SHIFT
TMC2240_REFL_STEP_MASK
TMC2240_REFL_STEP_SHIFT
TMC2240_REFR_DIR_MASK
TMC2240_REFR_DIR_SHIFT
TMC2240_ENCB_CFG4_MASK
TMC2240_ENCB_CFG4_SHIFT
TMC2240_ENCA_CFG5_MASK
TMC2240_ENCA_CFG5_SHIFT
TMC2240_DRV_ENN_MASK
TMC2240_DRV_ENN_SHIFT
TMC2240_ENCN_CFG6_MASK
TMC2240_ENCN_CFG6_SHIFT
TMC2240_UART_EN_MASK
TMC2240_UART_EN_SHIFT
TMC2240_COMP_A_MASK
TMC2240_COMP_A_SHIFT
TMC2240_COMP_B_MASK
TMC2240_COMP_B_SHIFT
TMC2240_COMP_A1_A2_MASK
TMC2240_COMP_A1_A2_SHIFT
TMC2240_COMP_B1_B2_MASK
TMC2240_COMP_B1_B2_SHIFT
TMC2240_OUTPUT_MASK
TMC2240_OUTPUT_SHIFT
TMC2240_EXT_RES_DET_MASK
TMC2240_EXT_RES_DET_SHIFT
TMC2240_EXT_CLK_MASK
TMC2240_EXT_CLK_SHIFT
TMC2240_ADC_ERR_MASK
TMC2240_ADC_ERR_SHIFT
TMC2240_SILICON_RV_MASK
TMC2240_SILICON_RV_SHIFT
TMC2240_VERSION_MASK
TMC2240_VERSION_SHIFT
TMC2240_CURRENT_RANGE_MASK
TMC2240_CURRENT_RANGE_SHIFT
TMC2240_SLOPE_CONTROL_MASK
TMC2240_SLOPE_CONTROL_SHIFT
TMC2240_GLOBALSCALER_MASK
TMC2240_GLOBALSCALER_SHIFT
TMC2240_IHOLD_MASK
TMC2240_IHOLD_SHIFT
TMC2240_IRUN_MASK
TMC2240_IRUN_SHIFT
TMC2240_IHOLDDELAY_MASK
TMC2240_IHOLDDELAY_SHIFT
TMC2240_IRUNDELAY_MASK
TMC2240_IRUNDELAY_SHIFT
TMC2240_TPOWERDOWN_MASK
TMC2240_TPOWERDOWN_SHIFT
TMC2240_TSTEP_MASK
TMC2240_TSTEP_SHIFT
TMC2240_TPWMTHRS_MASK
TMC2240_TPWMTHRS_SHIFT
TMC2240_TCOOLTHRS_MASK
TMC2240_TCOOLTHRS_SHIFT
TMC2240_THIGH_MASK
TMC2240_THIGH_SHIFT
TMC2240_DIRECT_COIL_A_MASK
TMC2240_DIRECT_COIL_A_SHIFT
TMC2240_DIRECT_COIL_B_MASK
TMC2240_DIRECT_COIL_B_SHIFT
TMC2240_POL_A_MASK
TMC2240_POL_A_SHIFT
TMC2240_POL_B_MASK
TMC2240_POL_B_SHIFT
TMC2240_POL_N_MASK
TMC2240_POL_N_SHIFT
TMC2240_IGNORE_AB_MASK
TMC2240_IGNORE_AB_SHIFT
TMC2240_CLR_CONT_MASK
TMC2240_CLR_CONT_SHIFT
TMC2240_CLR_ONCE_MASK
TMC2240_CLR_ONCE_SHIFT
TMC2240_POS_NEG_EDGE_MASK
TMC2240_POS_NEG_EDGE_SHIFT
TMC2240_CLR_ENC_X_MASK
TMC2240_CLR_ENC_X_SHIFT
TMC2240_LATCH_X_ACT_MASK
TMC2240_LATCH_X_ACT_SHIFT
TMC2240_ENC_SEL_DECIMAL_MASK
TMC2240_ENC_SEL_DECIMAL_SHIFT
TMC2240_X_ENC_MASK
TMC2240_X_ENC_SHIFT
TMC2240_ENC_CONST_MASK
TMC2240_ENC_CONST_SHIFT
TMC2240_N_EVENT_MASK
TMC2240_N_EVENT_SHIFT
TMC2240_DEVIATION_WARN_MASK
TMC2240_DEVIATION_WARN_SHIFT
TMC2240_ENC_LATCH_MASK
TMC2240_ENC_LATCH_SHIFT
TMC2240_ADC_VSUPPLY_MASK
TMC2240_ADC_VSUPPLY_SHIFT
TMC2240_ADC_AIN_MASK
TMC2240_ADC_AIN_SHIFT
TMC2240_ADC_TEMP_MASK
TMC2240_ADC_TEMP_SHIFT
TMC2240_OVERVOLTAGE_VTH_MASK
TMC2240_OVERVOLTAGE_VTH_SHIFT
TMC2240_OVERTEMPPREWARNING_VTH_MASK
TMC2240_OVERTEMPPREWARNING_VTH_SHIFT
TMC2240_MSLUT_0_MASK
TMC2240_MSLUT_0_SHIFT
TMC2240_MSLUT_1_MASK
TMC2240_MSLUT_1_SHIFT
TMC2240_MSLUT_2_MASK
TMC2240_MSLUT_2_SHIFT
TMC2240_MSLUT_3_MASK
TMC2240_MSLUT_3_SHIFT
TMC2240_MSLUT_4_MASK
TMC2240_MSLUT_4_SHIFT
TMC2240_MSLUT_5_MASK
TMC2240_MSLUT_5_SHIFT
TMC2240_MSLUT_6_MASK
TMC2240_MSLUT_6_SHIFT
TMC2240_MSLUT_7_MASK
TMC2240_MSLUT_7_SHIFT
TMC2240_W0_MASK
TMC2240_W0_SHIFT
TMC2240_W1_MASK
TMC2240_W1_SHIFT
TMC2240_W2_MASK
TMC2240_W2_SHIFT
TMC2240_W3_MASK
TMC2240_W3_SHIFT
TMC2240_X1_MASK
TMC2240_X1_SHIFT
TMC2240_X2_MASK
TMC2240_X2_SHIFT
TMC2240_X3_MASK
TMC2240_X3_SHIFT
TMC2240_START_SIN_MASK
TMC2240_START_SIN_SHIFT
TMC2240_START_SIN90_MASK
TMC2240_START_SIN90_SHIFT
TMC2240_OFFSET_SIN90_MASK
TMC2240_OFFSET_SIN90_SHIFT
TMC2240_MSCNT_MASK
TMC2240_MSCNT_SHIFT
TMC2240_CUR_B_MASK
TMC2240_CUR_B_SHIFT
TMC2240_CUR_A_MASK
TMC2240_CUR_A_SHIFT
TMC2240_TOFF_MASK
TMC2240_TOFF_SHIFT
TMC2240_HSTRT_TFD210_MASK
TMC2240_HSTRT_TFD210_SHIFT
TMC2240_HEND_OFFSET_MASK
TMC2240_HEND_OFFSET_SHIFT
TMC2240_FD3_MASK
TMC2240_FD3_SHIFT
TMC2240_DISFDCC_MASK
TMC2240_DISFDCC_SHIFT
TMC2240_CHM_MASK
TMC2240_CHM_SHIFT
TMC2240_TBL_MASK
TMC2240_TBL_SHIFT
TMC2240_VHIGHFS_MASK
TMC2240_VHIGHFS_SHIFT
TMC2240_VHIGHCHM_MASK
TMC2240_VHIGHCHM_SHIFT
TMC2240_TPFD_MASK
TMC2240_TPFD_SHIFT
TMC2240_MRES_MASK
TMC2240_MRES_SHIFT
TMC2240_INTPOL_MASK
TMC2240_INTPOL_SHIFT
TMC2240_DEDGE_MASK
TMC2240_DEDGE_SHIFT
TMC2240_DISS2G_MASK
TMC2240_DISS2G_SHIFT
TMC2240_DISS2VS_MASK
TMC2240_DISS2VS_SHIFT
TMC2240_SEMIN_MASK
TMC2240_SEMIN_SHIFT
TMC2240_SEUP_MASK
TMC2240_SEUP_SHIFT
TMC2240_SEMAX_MASK
TMC2240_SEMAX_SHIFT
TMC2240_SEDN_MASK
TMC2240_SEDN_SHIFT
TMC2240_SEIMIN_MASK
TMC2240_SEIMIN_SHIFT
TMC2240_SGT_MASK
TMC2240_SGT_SHIFT
TMC2240_SFILT_MASK
TMC2240_SFILT_SHIFT
TMC2240_DC_TIME_MASK
TMC2240_DC_TIME_SHIFT
TMC2240_DC_SG_MASK
TMC2240_DC_SG_SHIFT
TMC2240_SG_RESULT_MASK
TMC2240_SG_RESULT_SHIFT
TMC2240_S2VSA_MASK
TMC2240_S2VSA_SHIFT
TMC2240_S2VSB_MASK
TMC2240_S2VSB_SHIFT
TMC2240_STEALTH_MASK
TMC2240_STEALTH_SHIFT
TMC2240_FSACTIVE_MASK
TMC2240_FSACTIVE_SHIFT
TMC2240_CS_ACTUAL_MASK
TMC2240_CS_ACTUAL_SHIFT
TMC2240_STALLGUARD_MASK
TMC2240_STALLGUARD_SHIFT
TMC2240_OT_MASK
TMC2240_OT_SHIFT
TMC2240_OTPW_MASK
TMC2240_OTPW_SHIFT
TMC2240_S2GA_MASK
TMC2240_S2GA_SHIFT
TMC2240_S2GB_MASK
TMC2240_S2GB_SHIFT
TMC2240_OLA_MASK
TMC2240_OLA_SHIFT
TMC2240_OLB_MASK
TMC2240_OLB_SHIFT
TMC2240_STST_MASK
TMC2240_STST_SHIFT
TMC2240_PWM_OFS_MASK
TMC2240_PWM_OFS_SHIFT
TMC2240_PWM_GRAD_MASK
TMC2240_PWM_GRAD_SHIFT
TMC2240_PWM_FREQ_MASK
TMC2240_PWM_FREQ_SHIFT
TMC2240_PWM_AUTOSCALE_MASK
TMC2240_PWM_AUTOSCALE_SHIFT
TMC2240_PWM_AUTOGRAD_MASK
TMC2240_PWM_AUTOGRAD_SHIFT
TMC2240_FREEWHEEL_MASK
TMC2240_FREEWHEEL_SHIFT
TMC2240_PWM_MEAS_SD_ENABLE_MASK
TMC2240_PWM_MEAS_SD_ENABLE_SHIFT
TMC2240_PWM_DIS_REG_STST_MASK
TMC2240_PWM_DIS_REG_STST_SHIFT
TMC2240_PWM_REG_MASK
TMC2240_PWM_REG_SHIFT
TMC2240_PWM_LIM_MASK
TMC2240_PWM_LIM_SHIFT
TMC2240_PWM_SCALE_SUM_MASK
TMC2240_PWM_SCALE_SUM_SHIFT
TMC2240_PWM_SCALE_AUTO_MASK
TMC2240_PWM_SCALE_AUTO_SHIFT
TMC2240_PWM_OFS_AUTO_MASK
TMC2240_PWM_OFS_AUTO_SHIFT
TMC2240_PWM_GRAD_AUTO_MASK
TMC2240_PWM_GRAD_AUTO_SHIFT
TMC2240_SG4_THRS_MASK
TMC2240_SG4_THRS_SHIFT
TMC2240_SG4_FILT_EN_MASK
TMC2240_SG4_FILT_EN_SHIFT
TMC2240_SG_ANGLE_OFFSET_MASK
TMC2240_SG_ANGLE_OFFSET_SHIFT
TMC2240_SG4_RESULT_MASK
TMC2240_SG4_RESULT_SHIFT
TMC2240_SG4_IND_0_MASK
TMC2240_SG4_IND_0_SHIFT
TMC2240_SG4_IND_1_MASK
TMC2240_SG4_IND_1_SHIFT
TMC2240_SG4_IND_2_MASK
TMC2240_SG4_IND_2_SHIFT
TMC2240_SG4_IND_3_MASK
TMC2240_SG4_IND_3_SHIFT
file TMC2240_Register.h

Defines

TMC2240_GCONF
TMC2240_GSTAT
TMC2240_IFCNT
TMC2240_SLAVECONF
TMC2240_IOIN
TMC2240_DRV_CONF
TMC2240_GLOBAL_SCALER
TMC2240_IHOLD_IRUN
TMC2240_TPOWERDOWN
TMC2240_TSTEP
TMC2240_TPWMTHRS
TMC2240_TCOOLTHRS
TMC2240_THIGH
TMC2240_DIRECT_MODE
TMC2240_ENCMODE
TMC2240_XENC
TMC2240_ENC_CONST
TMC2240_ENC_STATUS
TMC2240_ENC_LATCH
TMC2240_ADC_VSUPPLY_AIN
TMC2240_ADC_TEMP
TMC2240_OTW_OV_VTH
TMC2240_MSLUT0
TMC2240_MSLUT1
TMC2240_MSLUT2
TMC2240_MSLUT3
TMC2240_MSLUT4
TMC2240_MSLUT5
TMC2240_MSLUT6
TMC2240_MSLUT7
TMC2240_MSLUTSEL
TMC2240_MSLUTSTART
TMC2240_MSCNT
TMC2240_MSCURACT
TMC2240_CHOPCONF
TMC2240_COOLCONF
TMC2240_DCCTRL
TMC2240_DRVSTATUS
TMC2240_PWMCONF
TMC2240_PWMSCALE
TMC2240_PWM_AUTO
TMC2240_SG4_THRS
TMC2240_SG4_RESULT
TMC2240_SG4_IND
file TMC2300.c
#include “TMC2300.h”

Functions

void tmc2300_readWriteArray(uint8_t channel, uint8_t *data, size_t writeLength, size_t readLength)
uint8_t tmc2300_CRC8(uint8_t *data, size_t length)
void tmc2300_writeInt(TMC2300TypeDef *tmc2300, uint8_t address, int32_t value)
int32_t tmc2300_readInt(TMC2300TypeDef *tmc2300, uint8_t address)
void tmc2300_init(TMC2300TypeDef *tmc2300, uint8_t channel, ConfigurationTypeDef *tmc2300_config, const int32_t *registerResetState)
static void fillShadowRegisters(TMC2300TypeDef *tmc2300)
void writeConfiguration(TMC2300TypeDef *tmc2300)
void tmc2300_setRegisterResetState(TMC2300TypeDef *tmc2300, const int32_t *resetState)
void tmc2300_setCallback(TMC2300TypeDef *tmc2300, tmc2300_callback callback)
void tmc2300_periodicJob(TMC2300TypeDef *tmc2300, uint32_t tick)
uint8_t tmc2300_reset(TMC2300TypeDef *tmc2300)
uint8_t tmc2300_restore(TMC2300TypeDef *tmc2300)
uint8_t tmc2300_getSlaveAddress(TMC2300TypeDef *tmc2300)
void tmc2300_setSlaveAddress(TMC2300TypeDef *tmc2300, uint8_t slaveAddress)
uint8_t tmc2300_getStandby(TMC2300TypeDef *tmc2300)
void tmc2300_setStandby(TMC2300TypeDef *tmc2300, uint8_t standbyState)
file TMC2300.h
#include “tmc/helpers/Constants.h”
#include “tmc/helpers/API_Header.h”
#include “TMC2300_Constants.h”
#include “TMC2300_Register.h”
#include “TMC2300_Fields.h”

Defines

TMC2300_FIELD_READ(tdef, address, mask, shift)
TMC2300_FIELD_WRITE(tdef, address, mask, shift, value)

Typedefs

typedef void (*tmc2300_callback)(TMC2300TypeDef*, ConfigState)

Functions

void writeConfiguration(TMC2300TypeDef *tmc2300)
void tmc2300_writeInt(TMC2300TypeDef *tmc2300, uint8_t address, int32_t value)
int32_t tmc2300_readInt(TMC2300TypeDef *tmc2300, uint8_t address)
void tmc2300_init(TMC2300TypeDef *tmc2300, uint8_t channel, ConfigurationTypeDef *tmc2300_config, const int32_t *registerResetState)
uint8_t tmc2300_reset(TMC2300TypeDef *tmc2300)
uint8_t tmc2300_restore(TMC2300TypeDef *tmc2300)
void tmc2300_setRegisterResetState(TMC2300TypeDef *tmc2300, const int32_t *resetState)
void tmc2300_setCallback(TMC2300TypeDef *tmc2300, tmc2300_callback callback)
void tmc2300_periodicJob(TMC2300TypeDef *tmc2300, uint32_t tick)
uint8_t tmc2300_getSlaveAddress(TMC2300TypeDef *tmc2300)
void tmc2300_setSlaveAddress(TMC2300TypeDef *tmc2300, uint8_t slaveAddress)
uint8_t tmc2300_getStandby(TMC2300TypeDef *tmc2300)
void tmc2300_setStandby(TMC2300TypeDef *tmc2300, uint8_t standbyState)

Variables

static const uint8_t tmc2300_defaultRegisterAccess[TMC2300_REGISTER_COUNT] = {0x43, 0x23, 0x01, 0x02, ____, ____, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x42, 0x42, 0x01, ____, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x01, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x01, ____, 0x43, ____, ____, 0x01, 0x43, 0x01, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const int32_t tmc2300_defaultRegisterResetState[TMC2300_REGISTER_COUNT] = {N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
static const TMCRegisterConstant tmc2300_RegisterConstants[] = {{0x00, 0x00000040}, {0x10, 0x00011F08}, {0x11, 0x00000014}, {0x6C, 0x13008001}, {0x70, 0xC40D1024},}
file TMC2300_Constants.h

Defines

TMC2300_MOTORS
TMC2300_REGISTER_COUNT
TMC2300_WRITE_BIT
TMC2300_ADDRESS_MASK
TMC2300_MAX_VELOCITY
TMC2300_MAX_ACCELERATION
file TMC2300_Fields.h

Defines

TMC2300_PWM_DIRECT_MASK
TMC2300_PWM_DIRECT_SHIFT
TMC2300_EXTCAP_MASK
TMC2300_EXTCAP_SHIFT
TMC2300_EN_SPREADCYCLE_MASK
TMC2300_EN_SPREADCYCLE_SHIFT
TMC2300_SHAFT_MASK
TMC2300_SHAFT_SHIFT
TMC2300_DIAG_INDEX_MASK
TMC2300_DIAG_INDEX_SHIFT
TMC2300_DIAG_STEP_MASK
TMC2300_DIAG_STEP_SHIFT
TMC2300_PDN_DISABLE_MASK
TMC2300_PDN_DISABLE_SHIFT
TMC2300_MSTEP_REG_SELECT_MASK
TMC2300_MSTEP_REG_SELECT_SHIFT
TMC2300_MULTISTEP_FILT_MASK
TMC2300_MULTISTEP_FILT_SHIFT
TMC2300_TEST_MODE_MASK
TMC2300_TEST_MODE_SHIFT
TMC2300_RESET_MASK
TMC2300_RESET_SHIFT
TMC2300_DRV_ERR_MASK
TMC2300_DRV_ERR_SHIFT
TMC2300_U3V5_MASK
TMC2300_U3V5_SHIFT
TMC2300_IFCNT_MASK
TMC2300_IFCNT_SHIFT
TMC2300_SLAVECONF_MASK
TMC2300_SLAVECONF_SHIFT
TMC2300_EN_MASK
TMC2300_EN_SHIFT
TMC2300_NSTDBY_MASK
TMC2300_NSTDBY_SHIFT
TMC2300_MS1_MASK
TMC2300_MS1_SHIFT
TMC2300_MS2_MASK
TMC2300_MS2_SHIFT
TMC2300_DIAG_MASK
TMC2300_DIAG_SHIFT
TMC2300_STEPPERCLK_INPUT_MASK
TMC2300_STEPPERCLK_INPUT_SHIFT
TMC2300_PDN_UART_MASK
TMC2300_PDN_UART_SHIFT
TMC2300_MODE_INPUT_MASK
TMC2300_MODE_INPUT_SHIFT
TMC2300_STEP_MASK
TMC2300_STEP_SHIFT
TMC2300_DIR_MASK
TMC2300_DIR_SHIFT
TMC2300_COMP_A1A2_MASK
TMC2300_COMP_A1A2_SHIFT
TMC2300_COMP_B1B2_MASK
TMC2300_COMP_B1B2_SHIFT
TMC2300_VERSION_MASK
TMC2300_VERSION_SHIFT
TMC2300_IHOLD_MASK
TMC2300_IHOLD_SHIFT
TMC2300_IRUN_MASK
TMC2300_IRUN_SHIFT
TMC2300_IHOLDDELAY_MASK
TMC2300_IHOLDDELAY_SHIFT
TMC2300_TPOWERDOWN_MASK
TMC2300_TPOWERDOWN_SHIFT
TMC2300_TSTEP_MASK
TMC2300_TSTEP_SHIFT
TMC2300_TCOOLTHRS_MASK
TMC2300_TCOOLTHRS_SHIFT
TMC2300_VACTUAL_MASK
TMC2300_VACTUAL_SHIFT
TMC2300_SGTHRS_MASK
TMC2300_SGTHRS_SHIFT
TMC2300_SG_VALUE_MASK
TMC2300_SG_VALUE_SHIFT
TMC2300_SEMIN_MASK
TMC2300_SEMIN_SHIFT
TMC2300_SEUP_MASK
TMC2300_SEUP_SHIFT
TMC2300_SEMAX_MASK
TMC2300_SEMAX_SHIFT
TMC2300_SEDN_MASK
TMC2300_SEDN_SHIFT
TMC2300_SEIMIN_MASK
TMC2300_SEIMIN_SHIFT
TMC2300_MSCNT_MASK
TMC2300_MSCNT_SHIFT
TMC2300_CUR_A_MASK
TMC2300_CUR_A_SHIFT
TMC2300_CUR_B_MASK
TMC2300_CUR_B_SHIFT
TMC2300_ENABLEDRV_MASK
TMC2300_ENABLEDRV_SHIFT
TMC2300_TBL_MASK
TMC2300_TBL_SHIFT
TMC2300_MRES_MASK
TMC2300_MRES_SHIFT
TMC2300_INTPOL_MASK
TMC2300_INTPOL_SHIFT
TMC2300_DEDGE_MASK
TMC2300_DEDGE_SHIFT
TMC2300_DISS2G_MASK
TMC2300_DISS2G_SHIFT
TMC2300_DISS2VS_MASK
TMC2300_DISS2VS_SHIFT
TMC2300_OTPW_MASK
TMC2300_OTPW_SHIFT
TMC2300_OT_MASK
TMC2300_OT_SHIFT
TMC2300_S2GA_MASK
TMC2300_S2GA_SHIFT
TMC2300_S2GB_MASK
TMC2300_S2GB_SHIFT
TMC2300_S2VSA_MASK
TMC2300_S2VSA_SHIFT
TMC2300_S2VSB_MASK
TMC2300_S2VSB_SHIFT
TMC2300_OLA_MASK
TMC2300_OLA_SHIFT
TMC2300_OLB_MASK
TMC2300_OLB_SHIFT
TMC2300_T120_MASK
TMC2300_T120_SHIFT
TMC2300_T143_MASK
TMC2300_T143_SHIFT
TMC2300_T150_MASK
TMC2300_T150_SHIFT
TMC2300_T157_MASK
TMC2300_T157_SHIFT
TMC2300_CS_ACTUAL_MASK
TMC2300_CS_ACTUAL_SHIFT
TMC2300_STST_MASK
TMC2300_STST_SHIFT
TMC2300_PWM_OFS_MASK
TMC2300_PWM_OFS_SHIFT
TMC2300_PWM_GRAD_MASK
TMC2300_PWM_GRAD_SHIFT
TMC2300_PWM_FREQ_MASK
TMC2300_PWM_FREQ_SHIFT
TMC2300_PWM_AUTOSCALE_MASK
TMC2300_PWM_AUTOSCALE_SHIFT
TMC2300_PWM_AUTOGRAD_MASK
TMC2300_PWM_AUTOGRAD_SHIFT
TMC2300_FREEWHEEL_MASK
TMC2300_FREEWHEEL_SHIFT
TMC2300_PWM_REG_MASK
TMC2300_PWM_REG_SHIFT
TMC2300_PWM_LIM_MASK
TMC2300_PWM_LIM_SHIFT
TMC2300_PWM_SCALE_SUM_MASK
TMC2300_PWM_SCALE_SUM_SHIFT
TMC2300_PWM_SCALE_AUTO_MASK
TMC2300_PWM_SCALE_AUTO_SHIFT
TMC2300_PWM_OFS_AUTO_MASK
TMC2300_PWM_OFS_AUTO_SHIFT
TMC2300_PWM_GRAD_AUTO_MASK
TMC2300_PWM_GRAD_AUTO_SHIFT
file TMC2300_Register.h

Defines

TMC2300_GCONF
TMC2300_GSTAT
TMC2300_IFCNT
TMC2300_SLAVECONF
TMC2300_IOIN
TMC2300_IHOLD_IRUN
TMC2300_TPOWERDOWN
TMC2300_TSTEP
TMC2300_TCOOLTHRS
TMC2300_VACTUAL
TMC2300_XDIRECT
TMC2300_SGTHRS
TMC2300_SG_VALUE
TMC2300_COOLCONF
TMC2300_MSCNT
TMC2300_CHOPCONF
TMC2300_DRVSTATUS
TMC2300_PWMCONF
TMC2300_PWMSCALE
TMC2300_PWM_AUTO
file TMC2590.c
#include “TMC2590.h”

Functions

void tmc2590_readWriteArray(uint8_t channel, uint8_t *data, size_t length)
static void continousSync(TMC2590TypeDef *tmc2590)
static void readWrite(TMC2590TypeDef *tmc2590, uint32_t value)
static void readImmediately(TMC2590TypeDef *tmc2590, uint8_t rdsel)
static void standStillCurrentLimitation(TMC2590TypeDef *tmc2590, uint32_t tick)
void tmc2590_writeInt(TMC2590TypeDef *tmc2590, uint8_t address, int32_t value)
uint32_t tmc2590_readInt(TMC2590TypeDef *tmc2590, uint8_t address)
void tmc2590_init(TMC2590TypeDef *tmc2590, uint8_t channel, ConfigurationTypeDef *tmc2590_config, const int32_t *registerResetState)
void tmc2590_periodicJob(TMC2590TypeDef *tmc2590, uint32_t tick)
uint8_t tmc2590_reset(TMC2590TypeDef *tmc2590)
uint8_t tmc2590_restore(TMC2590TypeDef *tmc2590)
file TMC2590.h
#include “tmc/helpers/API_Header.h”
#include “TMC2590_Constants.h”
#include “TMC2590_Fields.h”
#include “TMC2590_Macros.h”
#include “TMC2590_Register.h”

Defines

TMC2590_FIELD_READ(tdef, address, mask, shift)
TMC2590_FIELD_WRITE(tdef, address, mask, shift, value)

Functions

void tmc2590_init(TMC2590TypeDef *tmc2590, uint8_t channel, ConfigurationTypeDef *tmc2590_config, const int32_t *registerResetState)
void tmc2590_periodicJob(TMC2590TypeDef *tmc2590, uint32_t tick)
void tmc2590_writeInt(TMC2590TypeDef *tmc2590, uint8_t address, int32_t value)
uint32_t tmc2590_readInt(TMC2590TypeDef *tmc2590, uint8_t address)
uint8_t tmc2590_reset(TMC2590TypeDef *tmc2590)
uint8_t tmc2590_restore(TMC2590TypeDef *tmc2590)

Variables

static const uint8_t tmc2590_defaultRegisterAccess[TMC2590_REGISTER_COUNT] = {0x02, 0x00, 0x00, 0x00, 0x02, 0x02, 0x02, 0x02}
static const int32_t tmc2590_defaultRegisterResetState[TMC2590_REGISTER_COUNT] = {0x10000000, 0x00000000, 0x00000000, 0x00000000, 0x00091935, 0x000A0000, 0x000D0505, 0x000EF040}
file TMC2590_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC2590_REGISTER_COUNT
TMC2590_MOTORS
TMC2590_WRITE_BIT
TMC2590_ADDRESS_MASK
TMC2590_ADDRESS_SHIFT
TMC2590_MAX_VELOCITY
TMC2590_MAX_ACCELERATION
TMC2590_RESPONSE0
TMC2590_RESPONSE1
TMC2590_RESPONSE2
TMC2590_RESPONSE_LATEST
file TMC2590_Fields.h

Defines

TMC2590_DRVCTRL_SDOFF_MASK
TMC2590_DRVCTRL_MASK
TMC2590_CHOPCONF_MASK
TMC2590_SMARTEN_MASK
TMC2590_SGCSCONF_MASK
TMC2590_DRVCONF_MASK
TMC2590_MSTEP_MASK
TMC2590_MSTEP_SHIFT
TMC2590_STATUS_MASK
TMC2590_STATUS_SHIFT
TMC2590_STST_MASK
TMC2590_STST_SHIFT
TMC2590_OLB_MASK
TMC2590_OLB_SHIFT
TMC2590_OLA_MASK
TMC2590_OLA_SHIFT
TMC2590_S2GB_MASK
TMC2590_S2GB_SHIFT
TMC2590_S2GA_MASK
TMC2590_S2GA_SHIFT
TMC2590_OTPW_MASK
TMC2590_OTPW_SHIFT
TMC2590_OT_MASK
TMC2590_OT_SHIFT
TMC2590_SG_MASK
TMC2590_SG_SHIFT
TMC2590_SG2_MASK
TMC2590_SG2_SHIFT
TMC2590_STST_MASK
TMC2590_STST_SHIFT
TMC2590_OLB_MASK
TMC2590_OLB_SHIFT
TMC2590_OLA_MASK
TMC2590_OLA_SHIFT
TMC2590_S2GB_MASK
TMC2590_S2GB_SHIFT
TMC2590_S2GA_MASK
TMC2590_S2GA_SHIFT
TMC2590_OTPW_MASK
TMC2590_OTPW_SHIFT
TMC2590_OT_MASK
TMC2590_OT_SHIFT
TMC2590_SG_MASK
TMC2590_SG_SHIFT
TMC2590_SGU_MASK
TMC2590_SGU_SHIFT
TMC2590_SE_MASK
TMC2590_SE_SHIFT
TMC2590_STST_MASK
TMC2590_STST_SHIFT
TMC2590_OLB_MASK
TMC2590_OLB_SHIFT
TMC2590_OLA_MASK
TMC2590_OLA_SHIFT
TMC2590_S2GB_MASK
TMC2590_S2GB_SHIFT
TMC2590_S2GA_MASK
TMC2590_S2GA_SHIFT
TMC2590_OTPW_MASK
TMC2590_OTPW_SHIFT
TMC2590_OT_MASK
TMC2590_OT_SHIFT
TMC2590_SG_MASK
TMC2590_SG_SHIFT
TMC2590_REGISTER_ADDRESS_BITS_MASK
TMC2590_REGISTER_ADDRESS_BITS_SHIFT
TMC2590_INTPOL_MASK
TMC2590_INTPOL_SHIFT
TMC2590_DEDGE_MASK
TMC2590_DEDGE_SHIFT
TMC2590_MRES_MASK
TMC2590_MRES_SHIFT
TMC2590_PHA_MASK
TMC2590_PHA_SHIFT
TMC2590_CA_MASK
TMC2590_CA_SHIFT
TMC2590_PHB_MASK
TMC2590_PHB_SHIFT
TMC2590_CB_MASK
TMC2590_CB_SHIFT
TMC2590_TBL_MASK
TMC2590_TBL_SHIFT
TMC2590_CHM_MASK
TMC2590_CHM_SHIFT
TMC2590_RNDTF_MASK
TMC2590_RNDTF_SHIFT
TMC2590_HDEC_MASK
TMC2590_HDEC_SHIFT
TMC2590_HEND_MASK
TMC2590_HEND_SHIFT
TMC2590_HSTRT_MASK
TMC2590_HSTRT_SHIFT
TMC2590_HDEC1_MASK
TMC2590_HDEC1_SHIFT
TMC2590_HEND_MASK
TMC2590_HEND_SHIFT
TMC2590_HDEC0_MASK
TMC2590_HDEC0_SHIFT
TMC2590_TOFF_MASK
TMC2590_TOFF_SHIFT
TMC2590_SEIMIN_MASK
TMC2590_SEIMIN_SHIFT
TMC2590_SEDN_MASK
TMC2590_SEDN_SHIFT
TMC2590_SEUP_MASK
TMC2590_SEUP_SHIFT
TMC2590_SEMAX_MASK
TMC2590_SEMAX_SHIFT
TMC2590_SEMIN_MASK
TMC2590_SEMIN_SHIFT
TMC2590_SFILT_MASK
TMC2590_SFILT_SHIFT
TMC2590_SGT_MASK
TMC2590_SGT_SHIFT
TMC2590_CS_MASK
TMC2590_CS_SHIFT
TMC2590_TST_MASK
TMC2590_TST_SHIFT
TMC2590_SLPH_MASK
TMC2590_SLPH_SHIFT
TMC2590_SLPL_MASK
TMC2590_SLPL_SHIFT
TMC2590_DISS2G_MASK
TMC2590_DISS2G_SHIFT
TMC2590_TS2G_MASK
TMC2590_TS2G_SHIFT
TMC2590_SDOFF_MASK
TMC2590_SDOFF_SHIFT
TMC2590_VSENSE_MASK
TMC2590_VSENSE_SHIFT
TMC2590_RDSEL_MASK
TMC2590_RDSEL_SHIFT
file TMC2590_Macros.h
#include “TMC2590_Constants.h”

Defines

TMC2590_VALUE(x)
TMC2590_GET_ADDRESS(X)
TMC2590_SET_CB(X)
TMC2590_SET_PHB(X)
TMC2590_SET_CA(X)
TMC2590_SET_PHA(X)
TMC2590_SET_MRES(X)
TMC2590_SET_DEDGE(X)
TMC2590_SET_INTERPOL(X)
TMC2590_SET_TOFF(X)
TMC2590_SET_HSTRT(X)
TMC2590_SET_HEND(X)
TMC2590_SET_HDEC(X)
TMC2590_SET_RNDTF(X)
TMC2590_SET_CHM(X)
TMC2590_SET_TBL(X)
TMC2590_SET_SEMIN(X)
TMC2590_SET_SEUP(X)
TMC2590_SET_SEMAX(X)
TMC2590_SET_SEDN(X)
TMC2590_SET_SEIMIN(X)
TMC2590_SET_CS(X)
TMC2590_SET_SGT(X)
TMC2590_SET_SFILT(X)
TMC2590_SET_RDSEL(X)
TMC2590_SET_VSENSE(X)
TMC2590_SET_SDOFF(X)
TMC2590_SET_TS2G(X)
TMC2590_SET_DISS2G(X)
TMC2590_SET_SLPL(X)
TMC2590_SET_SLPH(X)
TMC2590_SET_TST(X)
TMC2590_GET_CB(X)
TMC2590_GET_PHB(X)
TMC2590_GET_CA(X)
TMC2590_GET_PHA(X)
TMC2590_GET_MRES(X)
TMC2590_GET_DEDGE(X)
TMC2590_GET_INTERPOL(X)
TMC2590_GET_TOFF(X)
TMC2590_GET_HSTRT(X)
TMC2590_GET_HEND(X)
TMC2590_GET_HDEC(X)
TMC2590_GET_RNDTF(X)
TMC2590_GET_CHM(X)
TMC2590_GET_TBL(X)
TMC2590_GET_SEMIN(X)
TMC2590_GET_SEUP(X)
TMC2590_GET_SEMAX(X)
TMC2590_GET_SEDN(X)
TMC2590_GET_SEIMIN(X)
TMC2590_GET_CS(X)
TMC2590_GET_SGT(X)
TMC2590_GET_SFILT(X)
TMC2590_GET_RDSEL(X)
TMC2590_GET_VSENSE(X)
TMC2590_GET_SDOFF(X)
TMC2590_GET_TS2G(X)
TMC2590_GET_DISS2G(X)
TMC2590_GET_SLPL(X)
TMC2590_GET_SLPH(X)
TMC2590_GET_TST(X)
TMC2590_GET_MSTEP(X)
TMC2590_GET_SG(X)
TMC2590_GET_SGU(X)
TMC2590_GET_SE(X)
TMC2590_GET_STST(X)
TMC2590_GET_OLB(X)
TMC2590_GET_OLA(X)
TMC2590_GET_S2GB(X)
TMC2590_GET_S2GA(X)
TMC2590_GET_OTPW(X)
TMC2590_GET_OT(X)
TMC2590_GET_SGF(X)
file TMC2590_Register.h

Defines

TMC2590_DRVCTRL
TMC2590_CHOPCONF
TMC2590_SMARTEN
TMC2590_SGCSCONF
TMC2590_DRVCONF
file TMC262.c
#include “TMC262.h”

Defines

DEVTYPE_TMC428

Enums

enum TReadBackDatagram

Values:

enumerator RB_CHOPPER
enumerator RB_DRIVER
enumerator RB_SMART_ENERGY
enumerator RB_STALL_GUARD
enumerator RB_STEP_DIR

Functions

uint8_t tmc5130_spi_readWrite(uint8_t data, uint8_t lastTransfer)
static void ReadWrite262(uint32_t *ReadInt, uint32_t WriteInt)
static void WriteStepDirConfig()
static void WriteChopperConfig()
static void WriteSmartEnergyControl()
static void WriteStallGuardConfig()
static void WriteDriverConfig()
void tmc262_initMotorDrivers(void)
void tmc262_setStepDirMStepRes(uint8_t MicrostepResolution)
void tmc262_setStepDirInterpolation(uint8_t Interpolation)
void tmc262_setStepDirDoubleEdge(uint8_t DoubleEdge)
uint8_t tmc262_getStepDirMStepRes()
uint8_t tmc262_getStepDirInterpolation()
uint8_t tmc262_getStepDirDoubleEdge()
void tmc262_setChopperBlankTime(uint8_t BlankTime)
void tmc262_setChopperMode(uint8_t Mode)
void tmc262_setChopperRandomTOff(uint8_t RandomTOff)
void tmc262_setChopperHysteresisDecay(uint8_t HysteresisDecay)
void tmc262_setChopperHysteresisEnd(uint8_t HysteresisEnd)
void tmc262_setChopperHysteresisStart(uint8_t HysteresisStart)
void tmc262_setChopperTOff(uint8_t TOff)
uint8_t tmc262_getChopperBlankTime()
uint8_t tmc262_getChopperMode()
uint8_t tmc262_getChopperRandomTOff()
uint8_t tmc262_getChopperHysteresisDecay()
uint8_t tmc262_getChopperHysteresisEnd()
uint8_t tmc262_getChopperHysteresisStart()
uint8_t tmc262_getChopperTOff()
void tmc262_setSmartEnergyIMin(uint8_t SmartIMin)
void tmc262_setSmartEnergyDownStep(uint8_t SmartDownStep)
void tmc262_setSmartEnergyStallLevelMax(uint8_t StallLevelMax)
void tmc262_setSmartEnergyUpStep(uint8_t SmartUpStep)
void tmc262_setSmartEnergyStallLevelMin(uint8_t StallLevelMin)
uint8_t tmc262_getSmartEnergyIMin()
uint8_t tmc262_getSmartEnergyDownStep()
uint8_t tmc262_getSmartEnergyStallLevelMax()
uint8_t tmc262_getSmartEnergyUpStep()
uint8_t tmc262_getSmartEnergyStallLevelMin()
void tmc262_setStallGuardFilter(uint8_t Enable)
void tmc262_setStallGuardThreshold(int8_t Threshold)
void tmc262_setStallGuardCurrentScale(uint8_t CurrentScale)
uint8_t tmc262_getStallGuardFilter()
int8_t tmc262_getStallGuardThreshold()
uint8_t tmc262_getStallGuardCurrentScale()
void tmc262_setDriverSlopeHighSide(uint8_t SlopeHighSide)
void tmc262_setDriverSlopeLowSide(uint8_t SlopeLowSide)
void tmc262_setDriverDisableProtection(uint8_t DisableProtection)
void tmc262_setDriverProtectionTimer(uint8_t ProtectionTimer)
void tmc262_setDriverStepDirectionOff(uint8_t SDOff)
void tmc262_setDriverVSenseScale(uint8_t Scale)
void tmc262_setDriverReadSelect(uint8_t ReadSelect)
uint8_t tmc262_getDriverSlopeHighSide()
uint8_t tmc262_getDriverSlopeLowSide()
uint8_t tmc262_getDriverDisableProtection()
uint8_t tmc262_getDriverProtectionTimer()
uint8_t tmc262_getDriverStepDirectionOff()
uint8_t tmc262_getDriverVSenseScale()
uint8_t tmc262_getDriverReadSelect()
void tmc262_readState(uint8_t *Phases, uint8_t *MStep, uint32_t *StallGuard, uint8_t *SmartEnergy, uint8_t *Flags)
void tmc262_disable()
void tmc262_enable()
void tmc262_getSPIData(uint8_t Index, int32_t *Data)

Variables

static TStepDirConfig StepDirConfig
static TChopperConfig ChopperConfig
static TSmartEnergyControl SmartEnergyControl
static TStallGuardConfig StallGuardConfig
static TDriverConfig DriverConfig
static TReadBackDatagram ReadBackDatagram
static uint32_t SPIReadInt
static uint32_t SPIWriteInt
static uint32_t SPIStepDirConf
static uint32_t SPIChopperConf
static uint32_t SPISmartConf
static uint32_t SPISGConf
static uint32_t SPIDriverConf
file TMC262.h
#include “tmc/helpers/API_Header.h”
#include “TMC262_Register.h”

Defines

TMC262_RB_MSTEP
TMC262_RB_STALL_GUARD
TMC262_RB_SMART_ENERGY
TMC262_RB_ENCODER
TMC262_FLAG_STST
TMC262_FLAG_OLB
TMC262_FLAG_OLA
TMC262_FLAG_S2GB
TMC262_FLAG_S2GA
TMC262_FLAG_OTPW
TMC262_FLAG_OT
TMC262_FLAG_SG

Functions

void tmc262_initMotorDrivers(void)
void tmc262_setStepDirMStepRes(uint8_t MicrostepResolution)
void tmc262_setStepDirInterpolation(uint8_t Interpolation)
void tmc262_setStepDirDoubleEdge(uint8_t DoubleEdge)
uint8_t tmc262_getStepDirMStepRes()
uint8_t tmc262_getStepDirInterpolation()
uint8_t tmc262_getStepDirDoubleEdge()
void tmc262_setChopperBlankTime(uint8_t BlankTime)
void tmc262_setChopperMode(uint8_t Mode)
void tmc262_setChopperRandomTOff(uint8_t RandomTOff)
void tmc262_setChopperHysteresisDecay(uint8_t HysteresisDecay)
void tmc262_setChopperHysteresisEnd(uint8_t HysteresisEnd)
void tmc262_setChopperHysteresisStart(uint8_t HysteresisStart)
void tmc262_setChopperTOff(uint8_t TOff)
uint8_t tmc262_getChopperBlankTime()
uint8_t tmc262_getChopperMode()
uint8_t tmc262_getChopperRandomTOff()
uint8_t tmc262_getChopperHysteresisDecay()
uint8_t tmc262_getChopperHysteresisEnd()
uint8_t tmc262_getChopperHysteresisStart()
uint8_t tmc262_getChopperTOff()
void tmc262_setSmartEnergyIMin(uint8_t SmartIMin)
void tmc262_setSmartEnergyDownStep(uint8_t SmartDownStep)
void tmc262_setSmartEnergyStallLevelMax(uint8_t StallLevelMax)
void tmc262_setSmartEnergyUpStep(uint8_t SmartUpStep)
void tmc262_setSmartEnergyStallLevelMin(uint8_t StallLevelMin)
uint8_t tmc262_getSmartEnergyIMin()
uint8_t tmc262_getSmartEnergyDownStep()
uint8_t tmc262_getSmartEnergyStallLevelMax()
uint8_t tmc262_getSmartEnergyUpStep()
uint8_t tmc262_getSmartEnergyStallLevelMin()
void tmc262_setStallGuardFilter(uint8_t Enable)
void tmc262_setStallGuardThreshold(signed char Threshold)
void tmc262_setStallGuardCurrentScale(uint8_t CurrentScale)
uint8_t tmc262_getStallGuardFilter()
signed char tmc262_getStallGuardThreshold()
uint8_t tmc262_getStallGuardCurrentScale()
void tmc262_setDriverSlopeHighSide(uint8_t SlopeHighSide)
void tmc262_setDriverSlopeLowSide(uint8_t SlopeLowSide)
void tmc262_setDriverDisableProtection(uint8_t DisableProtection)
void tmc262_setDriverProtectionTimer(uint8_t ProtectionTimer)
void tmc262_setDriverStepDirectionOff(uint8_t SDOff)
void tmc262_setDriverVSenseScale(uint8_t Scale)
void tmc262_setDriverReadSelect(uint8_t ReadSelect)
uint8_t tmc262_getDriverSlopeHighSide()
uint8_t tmc262_getDriverSlopeLowSide()
uint8_t tmc262_getDriverDisableProtection()
uint8_t tmc262_getDriverProtectionTimer()
uint8_t tmc262_getDriverStepDirectionOff()
uint8_t tmc262_getDriverVSenseScale()
uint8_t tmc262_getDriverReadSelect()
void tmc262_disable()
void tmc262_enable()
void tmc262_readState(uint8_t *Phases, uint8_t *MStep, uint32_t *StallGuard, uint8_t *SmartEnergy, uint8_t *Flags)
void tmc262_getSPIData(uint8_t Index, int32_t *Data)
file TMC262_Register.h

Defines

TMC262_DRVCTRL
TMC262_CHOPCONF
TMC262_SMARTEN
TMC262_SGCSCONF
TMC262_DRVCONF
TMC262_DRVCTRL_SDOFF_MASK
TMC262_DRVCTRL_MASK
TMC262_CHOPCONF_MASK
TMC262_SMARTEN_MASK
TMC262_SGCSCONF_MASK
TMC262_DRVCONF_MASK
TMC262_GET_ADDRESS(X)
TMC262_WRITE
TMC262_SET_CB(X)
TMC262_SET_PHB(X)
TMC262_SET_CA(X)
TMC262_SET_PHA(X)
TMC262_SET_MRES(X)
TMC262_SET_DEDGE(X)
TMC262_SET_INTERPOL(X)
TMC262_SET_TOFF(X)
TMC262_SET_HSTRT(X)
TMC262_SET_HEND(X)
TMC262_SET_HDEC(X)
TMC262_SET_RNDTF(X)
TMC262_SET_CHM(X)
TMC262_SET_TBL(X)
TMC262_SET_SEMIN(X)
TMC262_SET_SEUP(X)
TMC262_SET_SEMAX(X)
TMC262_SET_SEDN(X)
TMC262_SET_SEIMIN(X)
TMC262_SET_CS(X)
TMC262_SET_SGT(X)
TMC262_SET_SFILT(X)
TMC262_SET_RDSEL(X)
TMC262_SET_VSENSE(X)
TMC262_SET_SDOFF(X)
TMC262_SET_TS2G(X)
TMC262_SET_DISS2G(X)
TMC262_SET_SLPL(X)
TMC262_SET_SLPH(X)
TMC262_SET_TST(X)
TMC262_GET_CB(X)
TMC262_GET_PHB(X)
TMC262_GET_CA(X)
TMC262_GET_PHA(X)
TMC262_GET_MRES(X)
TMC262_GET_DEDGE(X)
TMC262_GET_INTERPOL(X)
TMC262_GET_TOFF(X)
TMC262_GET_HSTRT(X)
TMC262_GET_HEND(X)
TMC262_GET_HDEC(X)
TMC262_GET_RNDTF(X)
TMC262_GET_CHM(X)
TMC262_GET_TBL(X)
TMC262_GET_SEMIN(X)
TMC262_GET_SEUP(X)
TMC262_GET_SEMAX(X)
TMC262_GET_SEDN(X)
TMC262_GET_SEIMIN(X)
TMC262_GET_CS(X)
TMC262_GET_SGT(X)
TMC262_GET_SFILT(X)
TMC262_GET_RDSEL(X)
TMC262_GET_VSENSE(X)
TMC262_GET_SDOFF(X)
TMC262_GET_TS2G(X)
TMC262_GET_DISS2G(X)
TMC262_GET_SLPL(X)
TMC262_GET_SLPH(X)
TMC262_GET_TST(X)
TMC262_RESPONSE0
TMC262_RESPONSE1
TMC262_RESPONSE2
TMC262_RESPONSE_LATEST
TMC262_GET_MSTEP(X)
TMC262_GET_SG(X)
TMC262_GET_SGU(X)
TMC262_GET_SE(X)
TMC262_GET_STST(X)
TMC262_GET_OLB(X)
TMC262_GET_OLA(X)
TMC262_GET_S2GB(X)
TMC262_GET_S2GA(X)
TMC262_GET_OTPW(X)
TMC262_GET_OT(X)
TMC262_GET_SGF(X)
file TMC2660.c
#include “TMC2660.h”

Functions

void tmc2660_writeInt(uint8_t motor, uint8_t address, int32_t value)
uint32_t tmc2660_readInt(uint8_t motor, uint8_t address)
void tmc2660_readWrite(uint8_t motor, uint32_t value)
static void standStillCurrentLimitation(TMC2660TypeDef *TMC2660)
static void continousSync(ConfigurationTypeDef *TMC2660_config)
void tmc2660_initConfig(TMC2660TypeDef *tmc2660)
void tmc2660_writeConfiguration(TMC2660TypeDef *tmc2660, ConfigurationTypeDef *TMC2660_config)
void tmc2660_periodicJob(uint8_t motor, uint32_t tick, TMC2660TypeDef *tmc2660, ConfigurationTypeDef *TMC2660_config)
uint8_t tmc2660_reset(TMC2660TypeDef *TMC2660, ConfigurationTypeDef *TMC2660_config)
uint8_t tmc2660_restore(ConfigurationTypeDef *TMC2660_config)

Variables

const uint8_t tmc2660_defaultRegisterAccess[TMC2660_REGISTER_COUNT] = {TMC_ACCESS_WRITE, TMC_ACCESS_NONE, TMC_ACCESS_NONE, TMC_ACCESS_NONE, TMC_ACCESS_WRITE, TMC_ACCESS_WRITE, TMC_ACCESS_WRITE, TMC_ACCESS_WRITE}
const int32_t tmc2660_defaultRegisterResetState[TMC2660_REGISTER_COUNT] = {0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00091935, 0x000A0000, 0x000D0505, 0x000EF040}
file TMC2660.h
#include “tmc/helpers/API_Header.h”
#include “TMC2660_Register.h”
#include “TMC2660_Constants.h”
#include “TMC2660_Fields.h”

Defines

TMC2660_FIELD_READ(motor, address, mask, shift)
TMC2660_FIELD_WRITE(motor, address, mask, shift, value)
TMC2660_FIELD_UPDATE(motor, address, mask, shift, value)

Functions

void tmc2660_initConfig(TMC2660TypeDef *TMC2660)
void tmc2660_periodicJob(uint8_t motor, uint32_t tick, TMC2660TypeDef *TMC2660, ConfigurationTypeDef *TMC2660_config)
uint8_t tmc2660_reset(TMC2660TypeDef *TMC2660, ConfigurationTypeDef *TMC2660_config)
uint8_t tmc2660_restore(ConfigurationTypeDef *TMC2660_config)
file TMC2660_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC2660_REGISTER_COUNT
TMC2660_MOTORS
TMC2660_WRITE_BIT
TMC2660_ADDRESS_MASK
TMC2660_ADDRESS_SHIFT
TMC2660_VALUE_MASK
TMC2660_VALUE_SHIFT
TMC2660_MAX_VELOCITY
TMC2660_MAX_ACCELERATION
TMC2660_RESPONSE0
TMC2660_RESPONSE1
TMC2660_RESPONSE2
TMC2660_RESPONSE_LATEST
file TMC2660_Fields.h

Defines

TMC2660_MSTEP_MASK
TMC2660_MSTEP_SHIFT
TMC2660_STATUS_MASK
TMC2660_STATUS_SHIFT
TMC2660_STST_MASK
TMC2660_STST_SHIFT
TMC2660_OLB_MASK
TMC2660_OLB_SHIFT
TMC2660_OLA_MASK
TMC2660_OLA_SHIFT
TMC2660_S2GB_MASK
TMC2660_S2GB_SHIFT
TMC2660_S2GA_MASK
TMC2660_S2GA_SHIFT
TMC2660_OTPW_MASK
TMC2660_OTPW_SHIFT
TMC2660_OT_MASK
TMC2660_OT_SHIFT
TMC2660_SG_MASK
TMC2660_SG_SHIFT
TMC2660_SG2_MASK
TMC2660_SG2_SHIFT
TMC2660_STST_MASK
TMC2660_STST_SHIFT
TMC2660_OLB_MASK
TMC2660_OLB_SHIFT
TMC2660_OLA_MASK
TMC2660_OLA_SHIFT
TMC2660_S2GB_MASK
TMC2660_S2GB_SHIFT
TMC2660_S2GA_MASK
TMC2660_S2GA_SHIFT
TMC2660_OTPW_MASK
TMC2660_OTPW_SHIFT
TMC2660_OT_MASK
TMC2660_OT_SHIFT
TMC2660_SG_MASK
TMC2660_SG_SHIFT
TMC2660_SGU_MASK
TMC2660_SGU_SHIFT
TMC2660_SE_MASK
TMC2660_SE_SHIFT
TMC2660_STST_MASK
TMC2660_STST_SHIFT
TMC2660_OLB_MASK
TMC2660_OLB_SHIFT
TMC2660_OLA_MASK
TMC2660_OLA_SHIFT
TMC2660_S2GB_MASK
TMC2660_S2GB_SHIFT
TMC2660_S2GA_MASK
TMC2660_S2GA_SHIFT
TMC2660_OTPW_MASK
TMC2660_OTPW_SHIFT
TMC2660_OT_MASK
TMC2660_OT_SHIFT
TMC2660_SG_MASK
TMC2660_SG_SHIFT
TMC2660_REGISTER_ADDRESS_BITS_MASK
TMC2660_REGISTER_ADDRESS_BITS_SHIFT
TMC2660_INTPOL_MASK
TMC2660_INTPOL_SHIFT
TMC2660_DEDGE_MASK
TMC2660_DEDGE_SHIFT
TMC2660_MRES_MASK
TMC2660_MRES_SHIFT
TMC2660_PHA_MASK
TMC2660_PHA_SHIFT
TMC2660_CA_MASK
TMC2660_CA_SHIFT
TMC2660_PHB_MASK
TMC2660_PHB_SHIFT
TMC2660_CB_MASK
TMC2660_CB_SHIFT
TMC2660_TBL_MASK
TMC2660_TBL_SHIFT
TMC2660_CHM_MASK
TMC2660_CHM_SHIFT
TMC2660_RNDTF_MASK
TMC2660_RNDTF_SHIFT
TMC2660_HDEC_MASK
TMC2660_HDEC_SHIFT
TMC2660_HEND_MASK
TMC2660_HEND_SHIFT
TMC2660_HSTRT_MASK
TMC2660_HSTRT_SHIFT
TMC2660_HDEC1_MASK
TMC2660_HDEC1_SHIFT
TMC2660_HEND_MASK
TMC2660_HEND_SHIFT
TMC2660_HDEC0_MASK
TMC2660_HDEC0_SHIFT
TMC2660_TOFF_MASK
TMC2660_TOFF_SHIFT
TMC2660_SEIMIN_MASK
TMC2660_SEIMIN_SHIFT
TMC2660_SEDN_MASK
TMC2660_SEDN_SHIFT
TMC2660_SEUP_MASK
TMC2660_SEUP_SHIFT
TMC2660_SEMAX_MASK
TMC2660_SEMAX_SHIFT
TMC2660_SEMIN_MASK
TMC2660_SEMIN_SHIFT
TMC2660_SFILT_MASK
TMC2660_SFILT_SHIFT
TMC2660_SGT_MASK
TMC2660_SGT_SHIFT
TMC2660_CS_MASK
TMC2660_CS_SHIFT
TMC2660_TST_MASK
TMC2660_TST_SHIFT
TMC2660_SLPH_MASK
TMC2660_SLPH_SHIFT
TMC2660_SLPL_MASK
TMC2660_SLPL_SHIFT
TMC2660_DISS2G_MASK
TMC2660_DISS2G_SHIFT
TMC2660_TS2G_MASK
TMC2660_TS2G_SHIFT
TMC2660_SDOFF_MASK
TMC2660_SDOFF_SHIFT
TMC2660_VSENSE_MASK
TMC2660_VSENSE_SHIFT
TMC2660_RDSEL_MASK
TMC2660_RDSEL_SHIFT
file TMC2660_Macros.h
#include “TMC2660_Constants.h”

Defines

TMC2660_IS_WRITE(datagram)
TMC2660_ADDRESS(datagram)
TMC2660_VALUE(datagram)
file TMC2660_Register.h

Defines

TMC2660_DRVCTRL
TMC2660_CHOPCONF
TMC2660_SMARTEN
TMC2660_SGCSCONF
TMC2660_DRVCONF
TMC2660_DRVCTRL_SDOFF_MASK
TMC2660_DRVCTRL_MASK
TMC2660_CHOPCONF_MASK
TMC2660_SMARTEN_MASK
TMC2660_SGCSCONF_MASK
TMC2660_DRVCONF_MASK
TMC2660_GET_ADDRESS(datagram)
TMC2660_DATAGRAM(addr, value)
TMC2660_SET_CB(X)
TMC2660_SET_PHB(X)
TMC2660_SET_CA(X)
TMC2660_SET_PHA(X)
TMC2660_SET_MRES(X)
TMC2660_SET_DEDGE(X)
TMC2660_SET_INTERPOL(X)
TMC2660_SET_TOFF(X)
TMC2660_SET_HSTRT(X)
TMC2660_SET_HEND(X)
TMC2660_SET_HDEC(X)
TMC2660_SET_RNDTF(X)
TMC2660_SET_CHM(X)
TMC2660_SET_TBL(X)
TMC2660_SET_SEMIN(X)
TMC2660_SET_SEUP(X)
TMC2660_SET_SEMAX(X)
TMC2660_SET_SEDN(X)
TMC2660_SET_SEIMIN(X)
TMC2660_SET_CS(X)
TMC2660_SET_SGT(X)
TMC2660_SET_SFILT(X)
TMC2660_SET_RDSEL(X)
TMC2660_SET_VSENSE(X)
TMC2660_SET_SDOFF(X)
TMC2660_SET_TS2G(X)
TMC2660_SET_DISS2G(X)
TMC2660_SET_SLPL(X)
TMC2660_SET_SLPH(X)
TMC2660_SET_TST(X)
TMC2660_GET_CB(X)
TMC2660_GET_PHB(X)
TMC2660_GET_CA(X)
TMC2660_GET_PHA(X)
TMC2660_GET_MRES(X)
TMC2660_GET_DEDGE(X)
TMC2660_GET_INTERPOL(X)
TMC2660_GET_TOFF(X)
TMC2660_GET_HSTRT(X)
TMC2660_GET_HEND(X)
TMC2660_GET_HDEC(X)
TMC2660_GET_RNDTF(X)
TMC2660_GET_CHM(X)
TMC2660_GET_TBL(X)
TMC2660_GET_SEMIN(X)
TMC2660_GET_SEUP(X)
TMC2660_GET_SEMAX(X)
TMC2660_GET_SEDN(X)
TMC2660_GET_SEIMIN(X)
TMC2660_GET_CS(X)
TMC2660_GET_SGT(X)
TMC2660_GET_SFILT(X)
TMC2660_GET_RDSEL(X)
TMC2660_GET_VSENSE(X)
TMC2660_GET_SDOFF(X)
TMC2660_GET_TS2G(X)
TMC2660_GET_DISS2G(X)
TMC2660_GET_SLPL(X)
TMC2660_GET_SLPH(X)
TMC2660_GET_TST(X)
TMC2660_GET_MSTEP(X)
TMC2660_GET_SG(X)
TMC2660_GET_SGU(X)
TMC2660_GET_SE(X)
TMC2660_GET_STST(X)
TMC2660_GET_OLB(X)
TMC2660_GET_OLA(X)
TMC2660_GET_S2GB(X)
TMC2660_GET_S2GA(X)
TMC2660_GET_OTPW(X)
TMC2660_GET_OT(X)
TMC2660_GET_SGF(X)
file TMC389_Register.h

Defines

TMC389_DRVCTRL
TMC389_CHOPCONF
TMC389_SMARTEN
TMC389_SGCSCONF
TMC389_DRVCONF
TMC389_DRVCTRL_SDOFF_MASK
TMC389_DRVCTRL_MASK
TMC389_CHOPCONF_MASK
TMC389_SMARTEN_MASK
TMC389_SGCSCONF_MASK
TMC389_DRVCONF_MASK
TMC389_GET_ADDRESS(X)
TMC389_WRITE
TMC389_SET_CV(X)
TMC389_SET_PHV(X)
TMC389_SET_CU(X)
TMC389_SET_PHU(X)
TMC389_SET_MRES(X)
TMC389_SET_DEDGE(X)
TMC389_SET_INTERPOL(X)
TMC389_SET_TOFF(X)
TMC389_SET_HYST(X)
TMC389_SET_NOSD(X)
TMC389_SET_CDIR(X)
TMC389_SET_CSYNC(X)
TMC389_SET_RNDTF(X)
TMC389_SET_TBL(X)
TMC389_SET_SEMIN(X)
TMC389_SET_SEUP(X)
TMC389_SET_SEMAX(X)
TMC389_SET_SEDN(X)
TMC389_SET_SEIMIN(X)
TMC389_SET_CS(X)
TMC389_SET_SGT(X)
TMC389_SET_SSPD(X)
TMC389_SET_SFILT(X)
TMC389_SET_RDSEL(X)
TMC389_SET_VSENSE(X)
TMC389_SET_SDOFF(X)
TMC389_SET_TS2G(X)
TMC389_SET_DISS2G(X)
TMC389_SET_SLPL(X)
TMC389_SET_SLPH(X)
TMC389_SET_TST(X)
TMC389_GET_CV(X)
TMC389_GET_PHV(X)
TMC389_GET_CU(X)
TMC389_GET_PHU(X)
TMC389_GET_MRES(X)
TMC389_GET_DEDGE(X)
TMC389_GET_INTERPOL(X)
TMC389_GET_TOFF(X)
TMC389_GET_HYST(X)
TMC389_GET_NOSD(X)
TMC389_GET_CDIR(X)
TMC389_GET_CSYNC(X)
TMC389_GET_RNDTF(X)
TMC389_GET_TBL(X)
TMC389_GET_SEMIN(X)
TMC389_GET_SEUP(X)
TMC389_GET_SEMAX(X)
TMC389_GET_SEDN(X)
TMC389_GET_SEIMIN(X)
TMC389_GET_CS(X)
TMC389_GET_SGT(X)
TMC389_GET_SSPD(X)
TMC389_GET_SFILT(X)
TMC389_GET_RDSEL(X)
TMC389_GET_VSENSE(X)
TMC389_GET_SDOFF(X)
TMC389_GET_TS2G(X)
TMC389_GET_DISS2G(X)
TMC389_GET_SLPL(X)
TMC389_GET_SLPH(X)
TMC389_GET_TST(X)
TMC389_RESPONSE0
TMC389_RESPONSE1
TMC389_RESPONSE2
TMC389_RESPONSE_LATEST
TMC389_GET_MSTEP(X)
TMC389_GET_SG(X)
TMC389_GET_SGU(X)
TMC389_GET_SE(X)
TMC389_GET_STST(X)
TMC389_GET_OL(X)
TMC389_GET_S2G(X)
TMC389_GET_OTPW(X)
TMC389_GET_OT(X)
TMC389_GET_SG(X)
file TMC4210.c
#include “TMC4210.h”

Functions

void ReadWrite4210(uint8_t *Read, uint8_t *Write)

32 bit SPI communication with TMC4210

This is the low-level function that does all SPI communication with the TMC4210. It sends a 32 bit SPI telegramme to the TMC4210 and receives the 32 bit answer telegramme from the TMC4210.

Parameters:

  • Read – four byte array holding the data read from the TMC428

  • Write – four byte array holding the data to write to the TMC428

void Write4210Bytes(uint8_t Address, uint8_t *Bytes)

TMC4210 write access.

This function writes an array of three bytes to a TMC4210 register.

Parameters:

  • Address – TMC4210 register address (see also TMC4210.h)

  • Bytes – Array holding three bytes to be written to the TMC4210 register.

void Write4210Datagram(uint8_t Address, uint8_t HighByte, uint8_t MidByte, uint8_t LowByte)

TMC4210 write access.

This function write three bytes to a TMC4210 register.

Parameters:

  • Address – TMC4210 register address

  • HighByte – MSB of the TMC4210 register

  • MidByte – mid byte of the TMC4210 register

  • LowByte – LSB of the TMC4210 register

void Write4210Zero(uint8_t Address)

Write zero to a TMC4210 register.

This function sets a TMC4210 register to zero. This can be useful e.g. to stop a motor quickly.

Parameters:

Address – TMC4210 register address

void Write4210Short(uint8_t Address, int32_t Value)

Write 16 bit value to a TMC4210 register.

This function writes a 16 bit value to a TMC4210 register.

Parameters:

  • Address – TMC4210 register address

  • Value – Value to be written

void Write4210Int(uint8_t Address, int32_t Value)

Write 24 bit value to a TMC4210 register.

This function writes a 24 bit value to a TMC4210 register.

Parameters:

  • Address – TMC4210 register address

  • Value – Value to be written

uint8_t Read4210Status(void)

Read TMC4210 status byte.

This functions reads just the status byte of the TMC4210 using a single byte SPI access which makes this a little bit faster.

Returns:

TMC4210 status byte

uint8_t Read4210Bytes(uint8_t Address, uint8_t *Bytes)

Read TMC4210 register.

This functions reads a TMC4210 register and puts the result into an array of bytes. It also returns the TMC4210 status bytes.

Parameters:

  • Address – TMC4210 register address (see TMC4210.h)

  • Bytes – Pointer at array of three bytes

Returns:

TMC4210 status byte

uint8_t Read4210SingleByte(uint8_t Address, uint8_t Index)

Read TMC4210 register.

This functions reads a TMC4210 register and returns the desired byte of that register.

Parameters:

  • Address – TMC4210 register address (see TMC4210.h)

  • Index – TMC4210 register byte to be returned (0..3)

Returns:

TM4210 register byte

int32_t Read4210Short(uint8_t Address)

Read TMC4210 register (12 bit)

This functions reads a TMC4210 12 bit register and sign-extends the register value to 32 bit.

Parameters:

Address – TMC4210 register address (see TMC4210.h)

Returns:

TMC4210 register value (sign extended)

int32_t Read4210Int(uint8_t Address)

Read TMC4210 register (24 bit)

This functions reads a TMC4210 24 bit register and sign-extends the register value to 32 bit.

Parameters:

Address – TMC4210 register address (see TMC4210.h)

Returns:

TMC4210 register value (sign extended)

void Set4210RampMode(uint8_t RampMode)
void Set4210SwitchMode(uint8_t SwitchMode)

Set the end switch mode.

This functions changes the end switch mode of a motor in the TMC4210. It is some TMC4210 register bit twiddling.

Parameters:

SwitchMode – end switch mode

uint8_t SetAMax(uint32_t AMax)

Set the maximum acceleration.

This function sets the maximum acceleration and also calculates the PMUL and PDIV value according to all other parameters (please see the TMC4210 data sheet for more info about PMUL and PDIV values).

Parameters:

AMax – maximum acceleration (1..2047)

void HardStop(void)

Stop the motor immediately.

Stop motor immediately.

This function stops the motor immediately (hard stop) by switching to velocity mode and then zeroing the V_TARGT and V_ACTUAL registers.

This function stops the motor immediately, without using the decelaration ramp.

void Init4210(void)

TMC4210 initialization.

This function does all necessary initializations of the TMC4210 to operate in step/direction mode.

file TMC4210.h
#include “tmc/helpers/API_Header.h”
#include “TMC4210_Registers.h”

Functions

void Init4210(void)

TMC4210 initialization.

This function does all necessary initializations of the TMC4210 to operate in step/direction mode.

void ReadWrite4210(uint8_t *Read, uint8_t *Write)

32 bit SPI communication with TMC4210

This is the low-level function that does all SPI communication with the TMC4210. It sends a 32 bit SPI telegramme to the TMC4210 and receives the 32 bit answer telegramme from the TMC4210.

Parameters:

  • Read – four byte array holding the data read from the TMC428

  • Write – four byte array holding the data to write to the TMC428

void Write4210Zero(uint8_t Address)

Write zero to a TMC4210 register.

This function sets a TMC4210 register to zero. This can be useful e.g. to stop a motor quickly.

Parameters:

Address – TMC4210 register address

void Write4210Bytes(uint8_t Address, uint8_t *Bytes)

TMC4210 write access.

This function writes an array of three bytes to a TMC4210 register.

Parameters:

  • Address – TMC4210 register address (see also TMC4210.h)

  • Bytes – Array holding three bytes to be written to the TMC4210 register.

void Write4210Datagram(uint8_t Address, uint8_t HighByte, uint8_t MidByte, uint8_t LowByte)

TMC4210 write access.

This function write three bytes to a TMC4210 register.

Parameters:

  • Address – TMC4210 register address

  • HighByte – MSB of the TMC4210 register

  • MidByte – mid byte of the TMC4210 register

  • LowByte – LSB of the TMC4210 register

void Write4210Short(uint8_t Address, int32_t Value)

Write 16 bit value to a TMC4210 register.

This function writes a 16 bit value to a TMC4210 register.

Parameters:

  • Address – TMC4210 register address

  • Value – Value to be written

void Write4210Int(uint8_t Address, int32_t Value)

Write 24 bit value to a TMC4210 register.

This function writes a 24 bit value to a TMC4210 register.

Parameters:

  • Address – TMC4210 register address

  • Value – Value to be written

uint8_t Read4210Status(void)

Read TMC4210 status byte.

This functions reads just the status byte of the TMC4210 using a single byte SPI access which makes this a little bit faster.

Returns:

TMC4210 status byte

uint8_t Read4210Bytes(uint8_t Address, uint8_t *Bytes)

Read TMC4210 register.

This functions reads a TMC4210 register and puts the result into an array of bytes. It also returns the TMC4210 status bytes.

Parameters:

  • Address – TMC4210 register address (see TMC4210.h)

  • Bytes – Pointer at array of three bytes

Returns:

TMC4210 status byte

uint8_t Read4210SingleByte(uint8_t Address, uint8_t Index)

Read TMC4210 register.

This functions reads a TMC4210 register and returns the desired byte of that register.

Parameters:

  • Address – TMC4210 register address (see TMC4210.h)

  • Index – TMC4210 register byte to be returned (0..3)

Returns:

TM4210 register byte

int32_t Read4210Short(uint8_t Address)

Read TMC4210 register (12 bit)

This functions reads a TMC4210 12 bit register and sign-extends the register value to 32 bit.

Parameters:

Address – TMC4210 register address (see TMC4210.h)

Returns:

TMC4210 register value (sign extended)

int32_t Read4210Int(uint8_t Address)

Read TMC4210 register (24 bit)

This functions reads a TMC4210 24 bit register and sign-extends the register value to 32 bit.

Parameters:

Address – TMC4210 register address (see TMC4210.h)

Returns:

TMC4210 register value (sign extended)

void Set4210RampMode(uint8_t RampMode)
void Set4210SwitchMode(uint8_t SwitchMode)

Set the end switch mode.

This functions changes the end switch mode of a motor in the TMC4210. It is some TMC4210 register bit twiddling.

Parameters:

SwitchMode – end switch mode

uint8_t SetAMax(uint32_t AMax)

Set the maximum acceleration.

This function sets the maximum acceleration and also calculates the PMUL and PDIV value according to all other parameters (please see the TMC4210 data sheet for more info about PMUL and PDIV values).

Parameters:

AMax – maximum acceleration (1..2047)

void HardStop(void)

Stop the motor immediately.

Stop motor immediately.

This function stops the motor immediately (hard stop) by switching to velocity mode and then zeroing the V_TARGT and V_ACTUAL registers.

This function stops the motor immediately, without using the decelaration ramp.

file TMC4210_Registers.h

Defines

TMC4210_IDX_XTARGET
TMC4210_IDX_XACTUAL
TMC4210_IDX_VMIN
TMC4210_IDX_VMAX
TMC4210_IDX_VTARGET
TMC4210_IDX_VACTUAL
TMC4210_IDX_AMAX
TMC4210_IDX_AACTUAL
TMC4210_IDX_AGTAT_ALEAT
TMC4210_IDX_PMUL_PDIV
TMC4210_IDX_REFCONF_RM
TMC4210_IDX_IMASK_IFLAGS
TMC4210_IDX_PULSEDIV_RAMPDIV
TMC4210_IDX_DX_REFTOLERANCE
TMC4210_IDX_XLATCHED
TMC4210_IDX_USTEP_COUNT_4210
TMC4210_IDX_LOW_WORD
TMC4210_IDX_HIGH_WORD
TMC4210_IDX_COVER_POS_LEN
TMC4210_IDX_COVER_DATA
TMC4210_IDX_IF_CONFIG_4210
TMC4210_IDX_POS_COMP_4210
TMC4210_IDX_POS_COMP_INT_4210
TMC4210_IDX_TYPE_VERSION_4210
TMC4210_IDX_REF_SWITCHES
TMC4210_IDX_SMGP
TMC4210_READ
TMC4210_RM_RAMP
TMC4210_RM_SOFT
TMC4210_RM_VELOCITY
TMC4210_RM_HOLD
TMC4210_NO_REF
TMC4210_SOFT_REF
TMC4210_NO_LIMIT
TMC4210_HARD_LIMIT
TMC4210_SOFT_LIMIT
TMC4210_REFSW_LEFT
TMC4210_REFSW_RIGHT
TMC4210_POS_REACHED
TMC4210_STATUS_CDGW
TMC4210_STATUS_INT
TMC4210_IFLAG_POS_REACHED
TMC4210_IFLAG_REF_WRONG
TMC4210_IFLAG_REF_MISS
TMC4210_IFLAG_STOP
TMC4210_IFLAG_STOP_LEFT_LOW
TMC4210_IFLAG_STOP_RIGHT_LOW
TMC4210_IFLAG_STOP_LEFT_HIGH
TMC4210_IFLAG_STOP_RIGHT_HIGH
TMC4210_IFCONF_INV_REF
TMC4210_IFCONF_SDO_INT
TMC4210_IFCONF_STEP_HALF
TMC4210_IFCONF_INV_STEP
TMC4210_IFCONF_INV_DIR
TMC4210_IFCONF_EN_SD
TMC4210_IFCONF_POS_COMP_0
TMC4210_IFCONF_POS_COMP_1
TMC4210_IFCONF_POS_COMP_2
TMC4210_IFCONF_POS_COMP_OFF
TMC4210_IFCONF_EN_REFR
file TMC424.c
#include “TMC424.h”

Functions

static void ReadWrite424(uint8_t *Read, uint8_t *Write)

32 bit SPI communication with TMC424

This is the low-level function that does all SPI communication with the TMC424. It sends a 32 bit SPI telegramme to the TMC424 and receives the 32 bit answer telegramme from the TMC424.

Parameters:

  • Read – four byte array holding the data read from the TMC424

  • Write – four byte array holding the data to write to the TMC424

static void Write424Bytes(uint8_t Address, uint8_t HiByte, uint8_t MidByte, uint8_t LoByte)

Write to TMC424 register.

Write to the three single bytes of a TMC424 register.

Parameters:

  • Address – TMC424 register address

  • HiByte – MSB to be written

  • MidByte – Middle byte to be written

  • LoByte – LSB to be writteb

void SetEncoderPrescaler(uint8_t Index, uint32_t Prescaler, uint8_t SpecialFunctionBits)

Index TMC424 encoder channel (0, 1 or 2)

This function sets the pre-scaler and the special functions of an encoder channel.

Parameters:

  • Prescaler – Encooder pre-scaler (see TMC424 data sheet)

  • SpecialFunctionBits – special encoder functions (see TMC424 data sheet)

int32_t ReadEncoder(uint8_t Index)

Read encoder counter.

This function reads an encoder counter and returns its value as a 32 bit signed value.

Parameters:

Index – Specifies the encoder (0, 1 or 2)

Returns:

Encoder positon counter value

void WriteEncoder(uint8_t Index, int32_t Value)

Change encoder counter.

Change an encoder counter register to the given value.

Parameters:

  • Index – specifies the encoder (0, 1 or 2)

  • Value – value to be written

uint8_t ReadEncoderNullChannel(uint8_t Index)

Check null channel of an encoder.

This function reads the state of the null channel input for an encoder.

Parameters:

Index – specifies the encoer (0, 1 or 2)

Returns:

State of the N input for the given encoder

void Init424(void)

Initialize the TMC424.

This function does the basic initialization of the TMC424. The encoder prescalers are set to some example values, and the encoder counters are cleared.

file TMC424.h
#include “tmc/helpers/API_Header.h”
#include “TMC424_Register.h”

Functions

void SetEncoderPrescaler(uint8_t Index, uint32_t Prescaler, uint8_t SpecialFunctionBits)

Index TMC424 encoder channel (0, 1 or 2)

This function sets the pre-scaler and the special functions of an encoder channel.

Parameters:

  • Prescaler – Encooder pre-scaler (see TMC424 data sheet)

  • SpecialFunctionBits – special encoder functions (see TMC424 data sheet)

int32_t ReadEncoder(uint8_t Which423, uint8_t Index)
void WriteEncoder(uint8_t Index, int32_t Value)

Change encoder counter.

Change an encoder counter register to the given value.

Parameters:

  • Index – specifies the encoder (0, 1 or 2)

  • Value – value to be written

uint8_t ReadEncoderNullChannel(uint8_t Which424, uint8_t Index)
void Init424(void)

Initialize the TMC424.

This function does the basic initialization of the TMC424. The encoder prescalers are set to some example values, and the encoder counters are cleared.

file TMC424_Register.h

Defines

TMC424_ENC_CONF_1
TMC424_ENC_CONF_2
TMC424_ENC_CONF_3
TMC424_ENC_CONF_ALL
TMC424_ENC_DATA_1
TMC424_ENC_DATA_2
TMC424_ENC_DATA_3
TMC424_STEP_PULSE_DELAY
TMC424_INT_CTRL
TMC424_WRITE
TMC424_POL_ACTHI
TMC424_HOLD_ON_N
TMC424_CLEAR_ON_N
TMC424_TRIG_ALWAYS
TMC424_ADD_CCW
TMC424_FREEZE
TMC424_INT_ON_N
TMC424_CLR_FLAGS
file TMC429.c
#include “TMC429.h”

Functions

void ReadWrite429(uint8_t *Read, uint8_t *Write)

32 bit SPI communication with TMC429

40 bit SPI communication with TMC457

This is the low-level function that does all SPI communication with the TMC429. It sends a 32 bit SPI telegramme to the TMC429 and receives the 32 bit answer telegramme from the TMC429.

This is the low-level function that does all SPI communication with the TMC457. It sends a 40 bit SPI telegramme to the TMC457 and receives the 40 bit answer telegramme from the TMC457.

Parameters:

  • Read – four byte array holding the data read from the TMC428

  • Write – four byte array holding the data to write to the TMC428

  • Read – five byte array holding the data read from the TMC457

  • Write – five byte array holding the data to write to the TMC457

void Write429Bytes(uint8_t Address, uint8_t *Bytes)

TMC429 write access.

This function writes an array of three bytes to a TMC429 register.

Parameters:

  • Address – TMC429 register address (see also TMC429.h)

  • Bytes – Array holding three bytes to be written to the TMC429 register.

void Write429Datagram(uint8_t Address, uint8_t HighByte, uint8_t MidByte, uint8_t LowByte)

TMC429 write access.

This function write three bytes to a TMC429 register.

Parameters:

  • Address – TMC429 register address

  • HighByte – MSB of the TMC429 register

  • MidByte – mid byte of the TMC429 register

  • LowByte – LSB of the TMC429 register

void Write429Zero(uint8_t Address)

Write zero to a TMC429 register.

This function sets a TMC429 register to zero. This can be useful e.g. to stop a motor quickly.

Parameters:

Address – TMC429 register address

void Write429Short(uint8_t Address, int32_t Value)

Write 16 bit value to a TMC429 register.

This function writes a 16 bit value to a TMC429 register.

Parameters:

  • Address – TMC429 register address

  • Value – Value to be written

void Write429Int(uint8_t Address, int32_t Value)

Write 24 bit value to a TMC429 register.

This function writes a 24 bit value to a TMC429 register.

Parameters:

  • Address – TMC429 register address

  • Value – Value to be written

uint8_t Read429Status(void)

Read TMC429 status byte.

This functions reads just the status byte of the TMC429 using a single byte SPI access which makes this a little bit faster.

Returns:

TMC429 status byte

uint8_t Read429Bytes(uint8_t Address, uint8_t *Bytes)

Read TMC429 register.

This functions reads a TMC429 register and puts the result into an array of bytes. It also returns the TMC429 status bytes.

Parameters:

  • Address – TMC429 register address (see TMC429.h)

  • Bytes – Pointer at array of three bytes

Returns:

TMC429 status byte

uint8_t Read429SingleByte(uint8_t Address, uint8_t Index)

Read TMC429 register.

This functions reads a TMC429 register and returns the desired byte of that register.

Parameters:

  • Address – TMC429 register address (see TMC429.h)

  • Index – TMC429 register byte to be returned (0..3)

Returns:

TM429 register byte

int32_t Read429Int12(uint8_t Address)

Read TMC429 register (12 bit)

This functions reads a TMC429 12 bit register and sign-extends the register value to 32 bit.

Parameters:

Address – TMC429 register address (see TMC429.h)

Returns:

TMC429 register value (sign extended)

int32_t Read429Int24(uint8_t Address)

Read TMC429 register (24 bit)

This functions reads a TMC429 24 bit register and sign-extends the register value to 32 bit.

Parameters:

Address – TMC429 register address (see TMC429.h)

Returns:

TMC429 register value (sign extended)

void Set429RampMode(uint8_t Axis, uint8_t RampMode)

Set the ramping mode of an axis.

This functions changes the ramping mode of a motor in the TMC429. It is some TMC429 register bit twiddling.

Parameters:

  • Axis – Motor number (0, 1 or 2)

  • RampMode – ramping mode (RM_RAMP/RM_SOFT/RM_VELOCITY/RM_HOLD)

void Set429SwitchMode(uint8_t Axis, uint8_t SwitchMode)

Set the end switch mode.

This functions changes the end switch mode of a motor in the TMC429. It is some TMC429 register bit twiddling.

Parameters:

  • Axis – Motor number (0, 1 or 2)

  • SwitchMode – end switch mode

uint8_t SetAMax(uint8_t Motor, uint32_t AMax)

Set the maximum acceleration.

This function sets the maximum acceleration and also calculates the PMUL and PDIV value according to all other parameters (please see the TMC429 data sheet for more info about PMUL and PDIV values).

Parameters:

  • Motor – motor number (0, 1, 2)

  • AMax – maximum acceleration (1..2047)

void HardStop(uint32_t Motor)

Stop a motor immediately.

This function stops a motor immediately (hard stop) by switching to velocity mode and then zeroing the V_TARGT and V_ACTUAL registers of that axis.

Parameters:

Motor – motor number (0, 1, 2)

void Init429(void)

TMC429 initialization.

This function does all necessary initializations of the TMC429 to operate in step/direction mode.

file TMC429.h
#include “tmc/helpers/API_Header.h”
#include “TMC429_Register.h”

Functions

uint8_t ReadWriteSPI(void *p_SPI_DeviceHandle, uint8_t data, bool endTransaction)
void Init429(void)

TMC429 initialization.

This function does all necessary initializations of the TMC429 to operate in step/direction mode.

void ReadWrite429(uint8_t *Read, uint8_t *Write)

32 bit SPI communication with TMC429

40 bit SPI communication with TMC457

This is the low-level function that does all SPI communication with the TMC429. It sends a 32 bit SPI telegramme to the TMC429 and receives the 32 bit answer telegramme from the TMC429.

This is the low-level function that does all SPI communication with the TMC457. It sends a 40 bit SPI telegramme to the TMC457 and receives the 40 bit answer telegramme from the TMC457.

Parameters:

  • Read – four byte array holding the data read from the TMC428

  • Write – four byte array holding the data to write to the TMC428

  • Read – five byte array holding the data read from the TMC457

  • Write – five byte array holding the data to write to the TMC457

void Write429Zero(uint8_t Address)

Write zero to a TMC429 register.

This function sets a TMC429 register to zero. This can be useful e.g. to stop a motor quickly.

Parameters:

Address – TMC429 register address

void Write429Bytes(uint8_t Address, uint8_t *Bytes)

TMC429 write access.

This function writes an array of three bytes to a TMC429 register.

Parameters:

  • Address – TMC429 register address (see also TMC429.h)

  • Bytes – Array holding three bytes to be written to the TMC429 register.

void Write429Datagram(uint8_t Address, uint8_t HighByte, uint8_t MidByte, uint8_t LowByte)

TMC429 write access.

This function write three bytes to a TMC429 register.

Parameters:

  • Address – TMC429 register address

  • HighByte – MSB of the TMC429 register

  • MidByte – mid byte of the TMC429 register

  • LowByte – LSB of the TMC429 register

void Write429U16(uint8_t Address, uint16_t Value)
void Write429U24(uint8_t Address, uint32_t Value)
uint8_t Read429Status(void)

Read TMC429 status byte.

This functions reads just the status byte of the TMC429 using a single byte SPI access which makes this a little bit faster.

Returns:

TMC429 status byte

uint8_t Read429Bytes(uint8_t Address, uint8_t *Bytes)

Read TMC429 register.

This functions reads a TMC429 register and puts the result into an array of bytes. It also returns the TMC429 status bytes.

Parameters:

  • Address – TMC429 register address (see TMC429.h)

  • Bytes – Pointer at array of three bytes

Returns:

TMC429 status byte

uint8_t Read429SingleByte(uint8_t Address, uint8_t Index)

Read TMC429 register.

This functions reads a TMC429 register and returns the desired byte of that register.

Parameters:

  • Address – TMC429 register address (see TMC429.h)

  • Index – TMC429 register byte to be returned (0..3)

Returns:

TM429 register byte

int32_t Read429Int12(uint8_t Address)

Read TMC429 register (12 bit)

This functions reads a TMC429 12 bit register and sign-extends the register value to 32 bit.

Parameters:

Address – TMC429 register address (see TMC429.h)

Returns:

TMC429 register value (sign extended)

int32_t Read429Int24(uint8_t Address)

Read TMC429 register (24 bit)

This functions reads a TMC429 24 bit register and sign-extends the register value to 32 bit.

Parameters:

Address – TMC429 register address (see TMC429.h)

Returns:

TMC429 register value (sign extended)

void Set429RampMode(uint8_t Axis, uint8_t RampMode)

Set the ramping mode of an axis.

This functions changes the ramping mode of a motor in the TMC429. It is some TMC429 register bit twiddling.

Parameters:

  • Axis – Motor number (0, 1 or 2)

  • RampMode – ramping mode (RM_RAMP/RM_SOFT/RM_VELOCITY/RM_HOLD)

void Set429SwitchMode(uint8_t Axis, uint8_t SwitchMode)

Set the end switch mode.

This functions changes the end switch mode of a motor in the TMC429. It is some TMC429 register bit twiddling.

Parameters:

  • Axis – Motor number (0, 1 or 2)

  • SwitchMode – end switch mode

uint8_t SetAMax(uint8_t Motor, uint32_t AMax)

Set the maximum acceleration.

This function sets the maximum acceleration and also calculates the PMUL and PDIV value according to all other parameters (please see the TMC429 data sheet for more info about PMUL and PDIV values).

Parameters:

  • Motor – motor number (0, 1, 2)

  • AMax – maximum acceleration (1..2047)

void HardStop(uint32_t Motor)

Stop a motor immediately.

This function stops a motor immediately (hard stop) by switching to velocity mode and then zeroing the V_TARGT and V_ACTUAL registers of that axis.

Parameters:

Motor – motor number (0, 1, 2)

file TMC429_Register.h

Defines

TMC429_MOTOR0
TMC429_MOTOR1
TMC429_MOTOR2
TMC429_MOTOR(motor)
TMC429_IDX_XTARGET(motor)
TMC429_IDX_XACTUAL(motor)
TMC429_IDX_VMIN(motor)
TMC429_IDX_VMAX(motor)
TMC429_IDX_VTARGET(motor)
TMC429_IDX_VACTUAL(motor)
TMC429_IDX_AMAX(motor)
TMC429_IDX_AACTUAL(motor)
TMC429_IDX_AGTAT_ALEAT(motor)
TMC429_IDX_PMUL_PDIV(motor)
TMC429_IDX_REFCONF_RM(motor)
TMC429_IDX_IMASK_IFLAGS(motor)
TMC429_IDX_PULSEDIV_RAMPDIV(motor)
TMC429_IDX_DX_REFTOLERANCE(motor)
TMC429_IDX_XLATCHED(motor)
TMC429_IDX_USTEP_COUNT_429(motor)
TMC429_IDX_LOW_WORD
TMC429_IDX_HIGH_WORD
TMC429_IDX_COVER_POS_LEN
TMC429_IDX_COVER_DATA
TMC429_IDX_IF_CONFIG_429
TMC429_IDX_POS_COMP_429
TMC429_IDX_POS_COMP_INT_429
TMC429_IDX_TYPE_VERSION_429
TMC429_IDX_REF_SWITCHES
TMC429_IDX_SMGP
TMC429_READ
TMC429_RM_RAMP
TMC429_RM_SOFT
TMC429_RM_VELOCITY
TMC429_RM_HOLD
TMC429_NO_REF
TMC429_SOFT_REF
TMC429_NO_LIMIT
TMC429_HARD_LIMIT
TMC429_SOFT_LIMIT
TMC429_REFSW_LEFT
TMC429_REFSW_RIGHT
TMC429_M0_POS_REACHED
TMC429_M1_POS_REACHED
TMC429_M2_POS_REACHED
TMC429_STATUS_CDGW
TMC429_STATUS_INT
TMC429_IFLAG_POS_REACHED
TMC429_IFLAG_REF_WRONG
TMC429_IFLAG_REF_MISS
TMC429_IFLAG_STOP
TMC429_IFLAG_STOP_LEFT_LOW
TMC429_IFLAG_STOP_RIGHT_LOW
TMC429_IFLAG_STOP_LEFT_HIGH
TMC429_IFLAG_STOP_RIGHT_HIGH
TMC429_IFCONF_INV_REF
TMC429_IFCONF_SDO_INT
TMC429_IFCONF_STEP_HALF
TMC429_IFCONF_INV_STEP
TMC429_IFCONF_INV_DIR
TMC429_IFCONF_EN_SD
TMC429_IFCONF_POS_COMP_0
TMC429_IFCONF_POS_COMP_1
TMC429_IFCONF_POS_COMP_2
TMC429_IFCONF_POS_COMP_OFF
TMC429_IFCONF_EN_REFR
file TMC4330.c
#include “TMC4330.h”

Functions

void tmc4330_readWriteArray(uint8_t channel, uint8_t *data, size_t length)
void tmc4330_writeDatagram(TMC4330TypeDef *tmc4330, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc4330_writeInt(TMC4330TypeDef *tmc4330, uint8_t address, int32_t value)
int32_t tmc4330_readInt(TMC4330TypeDef *tmc4330, uint8_t address)
void tmc4330_init(TMC4330TypeDef *tmc4330, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
uint8_t tmc4330_reset(TMC4330TypeDef *tmc4330)
uint8_t tmc4330_restore(TMC4330TypeDef *tmc4330)
void tmc4330_setRegisterResetState(TMC4330TypeDef *tmc4330, const int32_t *resetState)
void tmc4330_setCallback(TMC4330TypeDef *tmc4330, tmc4330_callback callback)
static void tmc4330_writeConfiguration(TMC4330TypeDef *tmc4330)
void tmc4330_periodicJob(TMC4330TypeDef *tmc4330, uint32_t tick)
void tmc4330_rotate(TMC4330TypeDef *tmc4330, int32_t velocity)
void tmc4330_right(TMC4330TypeDef *tmc4330, int32_t velocity)
void tmc4330_left(TMC4330TypeDef *tmc4330, int32_t velocity)
void tmc4330_stop(TMC4330TypeDef *tmc4330)
void tmc4330_moveTo(TMC4330TypeDef *tmc4330, int32_t position, uint32_t velocityMax)
void tmc4330_moveBy(TMC4330TypeDef *tmc4330, int32_t *ticks, uint32_t velocityMax)
int32_t tmc4330_discardVelocityDecimals(int32_t value)
static uint8_t tmc4330_moveToNextFullstep(TMC4330TypeDef *tmc4330)
uint8_t tmc4330_calibrateClosedLoop(TMC4330TypeDef *tmc4330, uint8_t worker0master1)
file TMC4330.h
#include “tmc/helpers/API_Header.h”
#include “TMC4330_Register.h”
#include “TMC4330_Constants.h”
#include “TMC4330_Fields.h”

Defines

TMC4330_FIELD_READ(tdef, address, mask, shift)
TMC4330_FIELD_UPDATE(tdef, address, mask, shift, value)
R10
R20

Typedefs

typedef void (*tmc4330_callback)(TMC4330TypeDef*, ConfigState)

Functions

void tmc4330_writeDatagram(TMC4330TypeDef *tmc4330, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc4330_writeInt(TMC4330TypeDef *tmc4330, uint8_t address, int32_t value)
int32_t tmc4330_readInt(TMC4330TypeDef *tmc4330, uint8_t address)
void tmc4330_readWriteCover(TMC4330TypeDef *tmc4330, uint8_t *data, size_t length)
void tmc4330_init(TMC4330TypeDef *tmc4330, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
uint8_t tmc4330_reset(TMC4330TypeDef *tmc4330)
uint8_t tmc4330_restore(TMC4330TypeDef *tmc4330)
void tmc4330_setRegisterResetState(TMC4330TypeDef *tmc4330, const int32_t *resetState)
void tmc4330_setCallback(TMC4330TypeDef *tmc4330, tmc4330_callback callback)
void tmc4330_periodicJob(TMC4330TypeDef *tmc4330, uint32_t tick)
void tmc4330_rotate(TMC4330TypeDef *tmc4330, int32_t velocity)
void tmc4330_right(TMC4330TypeDef *tmc4330, int32_t velocity)
void tmc4330_left(TMC4330TypeDef *tmc4330, int32_t velocity)
void tmc4330_stop(TMC4330TypeDef *tmc4330)
void tmc4330_moveTo(TMC4330TypeDef *tmc4330, int32_t position, uint32_t velocityMax)
void tmc4330_moveBy(TMC4330TypeDef *tmc4330, int32_t *ticks, uint32_t velocityMax)
int32_t tmc4330_discardVelocityDecimals(int32_t value)
uint8_t tmc4330_calibrateClosedLoop(TMC4330TypeDef *tmc4330, uint8_t worker0master1)

Variables

static const int32_t tmc4330_defaultRegisterResetState[TMC4330_REGISTER_COUNT] = {N_A, 0, 0, 0, 0, 0, 0, N_A, 0, 0, N_A, N_A, 0, 0, 0, 0, R10, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, N_A, R20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, N_A, N_A, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, 0, 0, 0, N_A, 0}
static const uint8_t tmc4330_defaultRegisterAccess[TMC4330_REGISTER_COUNT] = {0x43, 0x03, 0x03, 0x03, ____, 0x03, ____, 0x43, 0x03, ____, 0x43, 0x43, 0x03, 0x03, 0x13, 0x01, 0x03, 0x03, 0x43, 0x03, 0x03, 0x03, ____, 0x03, ____, ____, ____, ____, 0x43, ____, 0x03, 0x43, 0x03, 0x03, 0x01, 0x01, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x43, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, ____, 0x03, 0x03, 0x13, 0x13, 0x42, 0x13, ____, 0x42, 0x42, 0x42, 0x03, 0x13, 0x13, 0x02, 0x13, 0x02, 0x02, 0x02, 0x02, 0x42, 0x02, ____, 0x01, 0x01, ____, 0x02, 0x02, 0x01, 0x01, ____, ____, ____, ____, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x01, 0x01, 0x01, 0x02, 0x02, 0x42, 0x01}
file TMC4330_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC4330_REGISTER_COUNT
TMC4330_MOTORS
TMC4330_WRITE_BIT
TMC4330_ADDRESS_MASK
TMC4330_MAX_VELOCITY
TMC4330_MAX_ACCELERATION
TMC4330_RAMP_HOLD
TMC4330_RAMP_TRAPEZ
TMC4330_RAMP_SSHAPE
TMC4330_RAMP_POSITION
file TMC4330_Fields.h

Defines

TMC4330_USE_ASTART_AND_VSTART_MASK
TMC4330_USE_ASTART_AND_VSTART_SHIFT
TMC4330_DIRECT_ACC_VAL_EN_MASK
TMC4330_DIRECT_ACC_VAL_EN_SHIFT
TMC4330_DIRECT_BOW_VAL_EN_MASK
TMC4330_DIRECT_BOW_VAL_EN_SHIFT
TMC4330_STEP_INACTIVE_POL_MASK
TMC4330_STEP_INACTIVE_POL_SHIFT
TMC4330_TOGGLE_STEP_MASK
TMC4330_TOGGLE_STEP_SHIFT
TMC4330_POL_DIR_OUT_MASK
TMC4330_POL_DIR_OUT_SHIFT
TMC4330_SDIN_MODE_MASK
TMC4330_SDIN_MODE_SHIFT
TMC4330_POL_DIR_IN_MASK
TMC4330_POL_DIR_IN_SHIFT
TMC4330_SD_INDIRECT_CONTROL_MASK
TMC4330_SD_INDIRECT_CONTROL_SHIFT
TMC4330_SERIAL_ENC_IN_MODE_MASK
TMC4330_SERIAL_ENC_IN_MODE_SHIFT
TMC4330_DIFF_ENC_IN_DISABLE_MASK
TMC4330_DIFF_ENC_IN_DISABLE_SHIFT
TMC4330_INTR_POL_MASK
TMC4330_INTR_POL_SHIFT
TMC4330_INVERT_POL_TARGET_REACHED_MASK
TMC4330_INVERT_POL_TARGET_REACHED_SHIFT
TMC4330_PWM_OUT_EN_MASK
TMC4330_PWM_OUT_EN_SHIFT
TMC4330_AUTOMATIC_DIRECT_SDIN_SWITCH_OFF_MASK
TMC4330_AUTOMATIC_DIRECT_SDIN_SWITCH_OFF_SHIFT
TMC4330_CIRCULAR_CNT_AS_XLATCH_MASK
TMC4330_CIRCULAR_CNT_AS_XLATCH_SHIFT
TMC4330_REVERSE_MOTOR_DIR_MASK
TMC4330_REVERSE_MOTOR_DIR_SHIFT
TMC4330_INTR_TR_PU_PD_EN_MASK
TMC4330_INTR_TR_PU_PD_EN_SHIFT
TMC4330_INTR_AS_WIRED_AND_MASK
TMC4330_INTR_AS_WIRED_AND_SHIFT
TMC4330_TR_AS_WIRED_AND_MASK
TMC4330_TR_AS_WIRED_AND_SHIFT
TMC4330_STOP_LEFT_EN_MASK
TMC4330_STOP_LEFT_EN_SHIFT
TMC4330_STOP_RIGHT_EN_MASK
TMC4330_STOP_RIGHT_EN_SHIFT
TMC4330_POL_STOP_LEFT_MASK
TMC4330_POL_STOP_LEFT_SHIFT
TMC4330_POL_STOP_RIGHT_MASK
TMC4330_POL_STOP_RIGHT_SHIFT
TMC4330_INVERT_STOP_DIRECTION_MASK
TMC4330_INVERT_STOP_DIRECTION_SHIFT
TMC4330_SOFT_STOP_EN_MASK
TMC4330_SOFT_STOP_EN_SHIFT
TMC4330_VIRTUAL_LEFT_LIMIT_EN_MASK
TMC4330_VIRTUAL_LEFT_LIMIT_EN_SHIFT
TMC4330_VIRTUAL_RIGHT_LIMIT_EN_MASK
TMC4330_VIRTUAL_RIGHT_LIMIT_EN_SHIFT
TMC4330_VIRT_STOP_MODE_MASK
TMC4330_VIRT_STOP_MODE_SHIFT
TMC4330_LATCH_X_ON_INACTIVE_L_MASK
TMC4330_LATCH_X_ON_INACTIVE_L_SHIFT
TMC4330_LATCH_X_ON_ACTIVE_L_MASK
TMC4330_LATCH_X_ON_ACTIVE_L_SHIFT
TMC4330_LATCH_X_ON_INACTIVE_R_MASK
TMC4330_LATCH_X_ON_INACTIVE_R_SHIFT
TMC4330_LATCH_X_ON_ACTIVE_R_MASK
TMC4330_LATCH_X_ON_ACTIVE_R_SHIFT
TMC4330_STOP_LEFT_IS_HOME_MASK
TMC4330_STOP_LEFT_IS_HOME_SHIFT
TMC4330_HOME_EVENT_MASK
TMC4330_HOME_EVENT_SHIFT
TMC4330_START_HOME_TRACKING_MASK
TMC4330_START_HOME_TRACKING_SHIFT
TMC4330_CLR_POS_AT_TARGET_MASK
TMC4330_CLR_POS_AT_TARGET_SHIFT
TMC4330_CIRCULAR_MOVEMENT_EN_MASK
TMC4330_CIRCULAR_MOVEMENT_EN_SHIFT
TMC4330_POS_COMP_OUTPUT_MASK
TMC4330_POS_COMP_OUTPUT_SHIFT
TMC4330_POS_COMP_SOURCE_MASK
TMC4330_POS_COMP_SOURCE_SHIFT
TMC4330_MODIFIED_POS_COPARE_MASK
TMC4330_MODIFIED_POS_COPARE_SHIFT
TMC4330_CIRCULAR_ENC_EN_MASK
TMC4330_CIRCULAR_ENC_EN_SHIFT
TMC4330_START_EN0_MASK
TMC4330_START_EN0_SHIFT
TMC4330_START_EN1_MASK
TMC4330_START_EN1_SHIFT
TMC4330_START_EN2_MASK
TMC4330_START_EN2_SHIFT
TMC4330_START_EN3_MASK
TMC4330_START_EN3_SHIFT
TMC4330_START_EN4_MASK
TMC4330_START_EN4_SHIFT
TMC4330_TRIGGER_EVENTS0_MASK
TMC4330_TRIGGER_EVENTS0_SHIFT
TMC4330_TRIGGER_EVENTS1_MASK
TMC4330_TRIGGER_EVENTS1_SHIFT
TMC4330_TRIGGER_EVENTS2_MASK
TMC4330_TRIGGER_EVENTS2_SHIFT
TMC4330_TRIGGER_EVENTS3_MASK
TMC4330_TRIGGER_EVENTS3_SHIFT
TMC4330_POL_START_SIGNAL_MASK
TMC4330_POL_START_SIGNAL_SHIFT
TMC4330_IMMEDIATE_START_IN_MASK
TMC4330_IMMEDIATE_START_IN_SHIFT
TMC4330_BUSY_STATE_EN_MASK
TMC4330_BUSY_STATE_EN_SHIFT
TMC4330_PIPELINE_EN0_MASK
TMC4330_PIPELINE_EN0_SHIFT
TMC4330_PIPELINE_EN1_MASK
TMC4330_PIPELINE_EN1_SHIFT
TMC4330_PIPELINE_EN2_MASK
TMC4330_PIPELINE_EN2_SHIFT
TMC4330_PIPELINE_EN3_MASK
TMC4330_PIPELINE_EN3_SHIFT
TMC4330_SHADOW_OPTION_MASK
TMC4330_SHADOW_OPTION_SHIFT
TMC4330_CYCLIC_SHADOW_REGS_MASK
TMC4330_CYCLIC_SHADOW_REGS_SHIFT
TMC4330_SHADOW_MISS_CNT_MASK
TMC4330_SHADOW_MISS_CNT_SHIFT
TMC4330_XPIPE_REWRITE_REG0_MASK
TMC4330_XPIPE_REWRITE_REG0_SHIFT
TMC4330_XPIPE_REWRITE_REG1_MASK
TMC4330_XPIPE_REWRITE_REG1_SHIFT
TMC4330_XPIPE_REWRITE_REG2_MASK
TMC4330_XPIPE_REWRITE_REG2_SHIFT
TMC4330_XPIPE_REWRITE_REG3_MASK
TMC4330_XPIPE_REWRITE_REG3_SHIFT
TMC4330_XPIPE_REWRITE_REG4_MASK
TMC4330_XPIPE_REWRITE_REG4_SHIFT
TMC4330_XPIPE_REWRITE_REG5_MASK
TMC4330_XPIPE_REWRITE_REG5_SHIFT
TMC4330_XPIPE_REWRITE_REG6_MASK
TMC4330_XPIPE_REWRITE_REG6_SHIFT
TMC4330_XPIPE_REWRITE_REG7_MASK
TMC4330_XPIPE_REWRITE_REG7_SHIFT
TMC4330_SR_ENC_IN_MASK
TMC4330_SR_ENC_IN_SHIFT
TMC4330_FILT_L_ENC_IN_MASK
TMC4330_FILT_L_ENC_IN_SHIFT
TMC4330_SR_REF_MASK
TMC4330_SR_REF_SHIFT
TMC4330_FILT_L_REF_MASK
TMC4330_FILT_L_REF_SHIFT
TMC4330_SR_S_MASK
TMC4330_SR_S_SHIFT
TMC4330_FILT_L_S_MASK
TMC4330_FILT_L_S_SHIFT
TMC4330_SR_SD_IN_MASK
TMC4330_SR_SD_IN_SHIFT
TMC4330_FILT_L_SD_IN_MASK
TMC4330_FILT_L_SD_IN_SHIFT
TMC4330_SD_FILT_ON_MASK
TMC4330_SD_FILT_ON_SHIFT
TMC4330_STDBY_EN_MASK
TMC4330_STDBY_EN_SHIFT
TMC4330_PWM_SCALE_EN_MASK
TMC4330_PWM_SCALE_EN_SHIFT
TMC4330_PWM_AMPL_MASK
TMC4330_PWM_AMPL_SHIFT
TMC4330_ENC_SEL_DECIMAL_MASK
TMC4330_ENC_SEL_DECIMAL_SHIFT
TMC4330_CLEAR_ON_N_MASK
TMC4330_CLEAR_ON_N_SHIFT
TMC4330_CLR_LATCH_CONT_ON_N_MASK
TMC4330_CLR_LATCH_CONT_ON_N_SHIFT
TMC4330_CLR_LATCH_ONCE_ON_N_MASK
TMC4330_CLR_LATCH_ONCE_ON_N_SHIFT
TMC4330_POL_N_MASK
TMC4330_POL_N_SHIFT
TMC4330_N_CHAN_SENSITIVITY_MASK
TMC4330_N_CHAN_SENSITIVITY_SHIFT
TMC4330_POL_A_FOR_N_MASK
TMC4330_POL_A_FOR_N_SHIFT
TMC4330_POL_B_FOR_N_MASK
TMC4330_POL_B_FOR_N_SHIFT
TMC4330_IGNORE_AB_MASK
TMC4330_IGNORE_AB_SHIFT
TMC4330_LATCH_ENC_ON_N_MASK
TMC4330_LATCH_ENC_ON_N_SHIFT
TMC4330_LATCH_X_ON_N_MASK
TMC4330_LATCH_X_ON_N_SHIFT
TMC4330_MULTI_TURN_IN_EN_MASK
TMC4330_MULTI_TURN_IN_EN_SHIFT
TMC4330_MULTI_TURN_IN_SIGNED_MASK
TMC4330_MULTI_TURN_IN_SIGNED_SHIFT
TMC4330_USE_USTEPS_INSTEAD_OF_XRANGE_MASK
TMC4330_USE_USTEPS_INSTEAD_OF_XRANGE_SHIFT
TMC4330_CALC_MULTI_TURN_BEHAV_MASK
TMC4330_CALC_MULTI_TURN_BEHAV_SHIFT
TMC4330_SSI_MULTI_CYCLE_DATA_MASK
TMC4330_SSI_MULTI_CYCLE_DATA_SHIFT
TMC4330_SSI_GRAY_CODE_EN_MASK
TMC4330_SSI_GRAY_CODE_EN_SHIFT
TMC4330_LEFT_ALIGNED_DATA_MASK
TMC4330_LEFT_ALIGNED_DATA_SHIFT
TMC4330_SPI_DATA_ON_CS_MASK
TMC4330_SPI_DATA_ON_CS_SHIFT
TMC4330_SPI_LOW_BEFORE_CS_MASK
TMC4330_SPI_LOW_BEFORE_CS_SHIFT
TMC4330_REGULATION_MODUS_MASK
TMC4330_REGULATION_MODUS_SHIFT
TMC4330_CL_CALIBRATION_EN_MASK
TMC4330_CL_CALIBRATION_EN_SHIFT
TMC4330_CL_EMF_EN_MASK
TMC4330_CL_EMF_EN_SHIFT
TMC4330_CL_CLR_XACT_MASK
TMC4330_CL_CLR_XACT_SHIFT
TMC4330_CL_VLIMIT_EN_MASK
TMC4330_CL_VLIMIT_EN_SHIFT
TMC4330_CL_VELOCITY_MODE_EN_MASK
TMC4330_CL_VELOCITY_MODE_EN_SHIFT
TMC4330_INVERT_ENC_DIR_MASK
TMC4330_INVERT_ENC_DIR_SHIFT
TMC4330_NO_ENC_VEL_PREPROC_MASK
TMC4330_NO_ENC_VEL_PREPROC_SHIFT
TMC4330_SERIAL_ENC_VARIATION_LIMIT_MASK
TMC4330_SERIAL_ENC_VARIATION_LIMIT_SHIFT
TMC4330_SINGLE_TURN_RES_MASK
TMC4330_SINGLE_TURN_RES_SHIFT
TMC4330_MULTI_TURN_RES_MASK
TMC4330_MULTI_TURN_RES_SHIFT
TMC4330_STATUS_BIT_CNT_MASK
TMC4330_STATUS_BIT_CNT_SHIFT
TMC4330_SERIAL_ADDR_BITS_MASK
TMC4330_SERIAL_ADDR_BITS_SHIFT
TMC4330_SERIAL_DATA_BITS_MASK
TMC4330_SERIAL_DATA_BITS_SHIFT
TMC4330_SINGLE_TURN_RES_MASK
TMC4330_SINGLE_TURN_RES_SHIFT
TMC4330_MULTI_TURN_RES_MASK
TMC4330_MULTI_TURN_RES_SHIFT
TMC4330_STATUS_BIT_CNT_MASK
TMC4330_STATUS_BIT_CNT_SHIFT
TMC4330_SINGLE_TURN_RES_MASK
TMC4330_SINGLE_TURN_RES_SHIFT
TMC4330_MULTI_TURN_RES_MASK
TMC4330_MULTI_TURN_RES_SHIFT
TMC4330_STATUS_BIT_CNT_MASK
TMC4330_STATUS_BIT_CNT_SHIFT
TMC4330_SERIAL_ADDR_BITS_MASK
TMC4330_SERIAL_ADDR_BITS_SHIFT
TMC4330_SERIAL_DATA_BITS_MASK
TMC4330_SERIAL_DATA_BITS_SHIFT
TMC4330_MSTEP_PER_FS_MASK
TMC4330_MSTEP_PER_FS_SHIFT
TMC4330_MSTEP_PER_FS_MASK
TMC4330_MSTEP_PER_FS_SHIFT
TMC4330_MSTEP_PER_FS_MASK
TMC4330_MSTEP_PER_FS_SHIFT
TMC4330_FS_PER_REV_MASK
TMC4330_FS_PER_REV_SHIFT
TMC4330_TARGET_REACHED_MASK
TMC4330_TARGET_REACHED_SHIFT
TMC4330_POS_COMP_REACHED_MASK
TMC4330_POS_COMP_REACHED_SHIFT
TMC4330_VEL_REACHED_MASK
TMC4330_VEL_REACHED_SHIFT
TMC4330_VEL_STATE_00_MASK
TMC4330_VEL_STATE_00_SHIFT
TMC4330_VEL_STATE_01_MASK
TMC4330_VEL_STATE_01_SHIFT
TMC4330_VEL_STATE_10_MASK
TMC4330_VEL_STATE_10_SHIFT
TMC4330_RAMP_STATE_00_MASK
TMC4330_RAMP_STATE_00_SHIFT
TMC4330_RAMP_STATE_01_MASK
TMC4330_RAMP_STATE_01_SHIFT
TMC4330_RAMP_STATE_10_MASK
TMC4330_RAMP_STATE_10_SHIFT
TMC4330_MAX_PHASE_TRAP_MASK
TMC4330_MAX_PHASE_TRAP_SHIFT
TMC4330_STOPL_EVENT_MASK
TMC4330_STOPL_EVENT_SHIFT
TMC4330_STOPR_EVENT_MASK
TMC4330_STOPR_EVENT_SHIFT
TMC4330_VSTOPL_ACTIVE_MASK
TMC4330_VSTOPL_ACTIVE_SHIFT
TMC4330_HOME_ERROR_MASK
TMC4330_HOME_ERROR_SHIFT
TMC4330_XLATCH_DONE_MASK
TMC4330_XLATCH_DONE_SHIFT
TMC4330_FS_ACTIVE_MASK
TMC4330_FS_ACTIVE_SHIFT
TMC4330_ENC_FAIL_MASK
TMC4330_ENC_FAIL_SHIFT
TMC4330_N_ACTIVE_MASK
TMC4330_N_ACTIVE_SHIFT
TMC4330_ENC_DONE_MASK
TMC4330_ENC_DONE_SHIFT
TMC4330_SER_ENC_DATA_FAIL_MASK
TMC4330_SER_ENC_DATA_FAIL_SHIFT
TMC4330_SER_DATA_DONE_MASK
TMC4330_SER_DATA_DONE_SHIFT
TMC4330_SERIAL_ENC_FLAGS_MASK
TMC4330_SERIAL_ENC_FLAGS_SHIFT
TMC4330_ENC_VEL0_MASK
TMC4330_ENC_VEL0_SHIFT
TMC4330_CL_MAX_MASK
TMC4330_CL_MAX_SHIFT
TMC4330_CL_FIT_MASK
TMC4330_CL_FIT_SHIFT
TMC4330_RST_EV_MASK
TMC4330_RST_EV_SHIFT
TMC4330_TARGET_REACHED_MASK
TMC4330_TARGET_REACHED_SHIFT
TMC4330_POS_COMP_REACHED_MASK
TMC4330_POS_COMP_REACHED_SHIFT
TMC4330_VEL_REACHED_MASK
TMC4330_VEL_REACHED_SHIFT
TMC4330_VEL_STATE_00_MASK
TMC4330_VEL_STATE_00_SHIFT
TMC4330_VEL_STATE_01_MASK
TMC4330_VEL_STATE_01_SHIFT
TMC4330_VEL_STATE_10_MASK
TMC4330_VEL_STATE_10_SHIFT
TMC4330_RAMP_STATE_00_MASK
TMC4330_RAMP_STATE_00_SHIFT
TMC4330_RAMP_STATE_01_MASK
TMC4330_RAMP_STATE_01_SHIFT
TMC4330_RAMP_STATE_10_MASK
TMC4330_RAMP_STATE_10_SHIFT
TMC4330_MAX_PHASE_TRAP_MASK
TMC4330_MAX_PHASE_TRAP_SHIFT
TMC4330_STOPL_EVENT_MASK
TMC4330_STOPL_EVENT_SHIFT
TMC4330_STOPR_EVENT_MASK
TMC4330_STOPR_EVENT_SHIFT
TMC4330_VSTOPL_ACTIVE_MASK
TMC4330_VSTOPL_ACTIVE_SHIFT
TMC4330_HOME_ERROR_MASK
TMC4330_HOME_ERROR_SHIFT
TMC4330_XLATCH_DONE_MASK
TMC4330_XLATCH_DONE_SHIFT
TMC4330_ENC_FAIL_MASK
TMC4330_ENC_FAIL_SHIFT
TMC4330_N_ACTIVE_MASK
TMC4330_N_ACTIVE_SHIFT
TMC4330_ENC_DONE_MASK
TMC4330_ENC_DONE_SHIFT
TMC4330_SER_ENC_DATA_FAIL_MASK
TMC4330_SER_ENC_DATA_FAIL_SHIFT
TMC4330_SER_DATA_DONE_MASK
TMC4330_SER_DATA_DONE_SHIFT
TMC4330_SERIAL_ENC_FLAGS_MASK
TMC4330_SERIAL_ENC_FLAGS_SHIFT
TMC4330_ENC_VEL0_MASK
TMC4330_ENC_VEL0_SHIFT
TMC4330_CL_MAX_MASK
TMC4330_CL_MAX_SHIFT
TMC4330_CL_FIT_MASK
TMC4330_CL_FIT_SHIFT
TMC4330_RST_EV_MASK
TMC4330_RST_EV_SHIFT
TMC4330_TARGET_REACHED_MASK
TMC4330_TARGET_REACHED_SHIFT
TMC4330_POS_COMP_REACHED_MASK
TMC4330_POS_COMP_REACHED_SHIFT
TMC4330_VEL_REACHED_MASK
TMC4330_VEL_REACHED_SHIFT
TMC4330_VEL_STATE_00_MASK
TMC4330_VEL_STATE_00_SHIFT
TMC4330_VEL_STATE_01_MASK
TMC4330_VEL_STATE_01_SHIFT
TMC4330_VEL_STATE_10_MASK
TMC4330_VEL_STATE_10_SHIFT
TMC4330_RAMP_STATE_00_MASK
TMC4330_RAMP_STATE_00_SHIFT
TMC4330_RAMP_STATE_01_MASK
TMC4330_RAMP_STATE_01_SHIFT
TMC4330_RAMP_STATE_10_MASK
TMC4330_RAMP_STATE_10_SHIFT
TMC4330_MAX_PHASE_TRAP_MASK
TMC4330_MAX_PHASE_TRAP_SHIFT
TMC4330_STOPL_EVENT_MASK
TMC4330_STOPL_EVENT_SHIFT
TMC4330_STOPR_EVENT_MASK
TMC4330_STOPR_EVENT_SHIFT
TMC4330_VSTOPL_ACTIVE_MASK
TMC4330_VSTOPL_ACTIVE_SHIFT
TMC4330_HOME_ERROR_MASK
TMC4330_HOME_ERROR_SHIFT
TMC4330_XLATCH_DONE_MASK
TMC4330_XLATCH_DONE_SHIFT
TMC4330_ENC_FAIL_MASK
TMC4330_ENC_FAIL_SHIFT
TMC4330_N_ACTIVE_MASK
TMC4330_N_ACTIVE_SHIFT
TMC4330_ENC_DONE_MASK
TMC4330_ENC_DONE_SHIFT
TMC4330_SER_ENC_DATA_FAIL_MASK
TMC4330_SER_ENC_DATA_FAIL_SHIFT
TMC4330_SER_DATA_DONE_MASK
TMC4330_SER_DATA_DONE_SHIFT
TMC4330_SERIAL_ENC_FLAGS_MASK
TMC4330_SERIAL_ENC_FLAGS_SHIFT
TMC4330_ENC_VEL0_MASK
TMC4330_ENC_VEL0_SHIFT
TMC4330_CL_MAX_MASK
TMC4330_CL_MAX_SHIFT
TMC4330_CL_FIT_MASK
TMC4330_CL_FIT_SHIFT
TMC4330_RST_EV_MASK
TMC4330_RST_EV_SHIFT
TMC4330_TARGET_REACHED_MASK
TMC4330_TARGET_REACHED_SHIFT
TMC4330_POS_COMP_REACHED_MASK
TMC4330_POS_COMP_REACHED_SHIFT
TMC4330_VEL_REACHED_MASK
TMC4330_VEL_REACHED_SHIFT
TMC4330_VEL_STATE_00_MASK
TMC4330_VEL_STATE_00_SHIFT
TMC4330_VEL_STATE_01_MASK
TMC4330_VEL_STATE_01_SHIFT
TMC4330_VEL_STATE_10_MASK
TMC4330_VEL_STATE_10_SHIFT
TMC4330_RAMP_STATE_00_MASK
TMC4330_RAMP_STATE_00_SHIFT
TMC4330_RAMP_STATE_01_MASK
TMC4330_RAMP_STATE_01_SHIFT
TMC4330_RAMP_STATE_10_MASK
TMC4330_RAMP_STATE_10_SHIFT
TMC4330_MAX_PHASE_TRAP_MASK
TMC4330_MAX_PHASE_TRAP_SHIFT
TMC4330_STOPL_EVENT_MASK
TMC4330_STOPL_EVENT_SHIFT
TMC4330_STOPR_EVENT_MASK
TMC4330_STOPR_EVENT_SHIFT
TMC4330_VSTOPL_ACTIVE_MASK
TMC4330_VSTOPL_ACTIVE_SHIFT
TMC4330_HOME_ERROR_MASK
TMC4330_HOME_ERROR_SHIFT
TMC4330_XLATCH_DONE_MASK
TMC4330_XLATCH_DONE_SHIFT
TMC4330_ENC_FAIL_MASK
TMC4330_ENC_FAIL_SHIFT
TMC4330_N_ACTIVE_MASK
TMC4330_N_ACTIVE_SHIFT
TMC4330_ENC_DONE_MASK
TMC4330_ENC_DONE_SHIFT
TMC4330_SER_ENC_DATA_FAIL_MASK
TMC4330_SER_ENC_DATA_FAIL_SHIFT
TMC4330_SER_DATA_DONE_MASK
TMC4330_SER_DATA_DONE_SHIFT
TMC4330_SERIAL_ENC_FLAGS_MASK
TMC4330_SERIAL_ENC_FLAGS_SHIFT
TMC4330_ENC_VEL0_MASK
TMC4330_ENC_VEL0_SHIFT
TMC4330_CL_MAX_MASK
TMC4330_CL_MAX_SHIFT
TMC4330_CL_FIT_MASK
TMC4330_CL_FIT_SHIFT
TMC4330_RST_EV_MASK
TMC4330_RST_EV_SHIFT
TMC4330_TARGET_REACHED_F_MASK
TMC4330_TARGET_REACHED_F_SHIFT
TMC4330_POS_COMP_REACHED_F_MASK
TMC4330_POS_COMP_REACHED_F_SHIFT
TMC4330_VEL_REACHED_F_MASK
TMC4330_VEL_REACHED_F_SHIFT
TMC4330_VEL_STATE_F_MASK
TMC4330_VEL_STATE_F_SHIFT
TMC4330_RAMP_STATE_F_MASK
TMC4330_RAMP_STATE_F_SHIFT
TMC4330_STOPL_ACTIVE_F_MASK
TMC4330_STOPL_ACTIVE_F_SHIFT
TMC4330_STOPR_ACTIVE_F_MASK
TMC4330_STOPR_ACTIVE_F_SHIFT
TMC4330_VSTOPL_ACTIVE_F_MASK
TMC4330_VSTOPL_ACTIVE_F_SHIFT
TMC4330_VSTOPR_ACTIVE_F_MASK
TMC4330_VSTOPR_ACTIVE_F_SHIFT
TMC4330_HOME_ERROR_F_MASK
TMC4330_HOME_ERROR_F_SHIFT
TMC4330_ENC_FAIL_F_MASK
TMC4330_ENC_FAIL_F_SHIFT
TMC4330_N_ACTIVE_F_MASK
TMC4330_N_ACTIVE_F_SHIFT
TMC4330_ENC_LATCH_F_MASK
TMC4330_ENC_LATCH_F_SHIFT
TMC4330_MULTI_CYCLE_FAIL_F__SER_ENC_VAR_F_MASK
TMC4330_MULTI_CYCLE_FAIL_F__SER_ENC_VAR_F_SHIFT
TMC4330_SERIAL_ENC_FLAG_0_MASK
TMC4330_SERIAL_ENC_FLAG_0_SHIFT
TMC4330_SERIAL_ENC_FLAG_1_MASK
TMC4330_SERIAL_ENC_FLAG_1_SHIFT
TMC4330_SERIAL_ENC_FLAG_2_MASK
TMC4330_SERIAL_ENC_FLAG_2_SHIFT
TMC4330_SERIAL_ENC_FLAG_3_MASK
TMC4330_SERIAL_ENC_FLAG_3_SHIFT
TMC4330_STP_LENGTH_ADD_MASK
TMC4330_STP_LENGTH_ADD_SHIFT
TMC4330_DIR_SETUP_TIME_MASK
TMC4330_DIR_SETUP_TIME_SHIFT
TMC4330_START_OUT_ADD_MASK
TMC4330_START_OUT_ADD_SHIFT
TMC4330_GEAR_RATIO_MASK
TMC4330_GEAR_RATIO_SHIFT
TMC4330_START_DELAY_MASK
TMC4330_START_DELAY_SHIFT
TMC4330_CLK_GATING_DELAY_MASK
TMC4330_CLK_GATING_DELAY_SHIFT
TMC4330_STDBY_DELAY_MASK
TMC4330_STDBY_DELAY_SHIFT
TMC4330_PWM_VMAX_MASK
TMC4330_PWM_VMAX_SHIFT
TMC4330_CL_BETA_MASK
TMC4330_CL_BETA_SHIFT
TMC4330_CL_BETA_MASK
TMC4330_CL_BETA_SHIFT
TMC4330_CL_GAMMA_MASK
TMC4330_CL_GAMMA_SHIFT
TMC4330_HOME_SAFETY_MARGIN_MASK
TMC4330_HOME_SAFETY_MARGIN_SHIFT
TMC4330_PWM_FREQ_MASK
TMC4330_PWM_FREQ_SHIFT
TMC4330_OPERATION_MODE_MASK
TMC4330_OPERATION_MODE_SHIFT
TMC4330_RAMP_PROFILE_MASK
TMC4330_RAMP_PROFILE_SHIFT
TMC4330_XACTUAL_MASK
TMC4330_XACTUAL_SHIFT
TMC4330_VACTUAL_MASK
TMC4330_VACTUAL_SHIFT
TMC4330_AACTUAL_MASK
TMC4330_AACTUAL_SHIFT
TMC4330_VMAX_MASK
TMC4330_VMAX_SHIFT
TMC4330_VMAX_MASK
TMC4330_VMAX_SHIFT
TMC4330_VSTART_MASK
TMC4330_VSTART_SHIFT
TMC4330_VSTOP_MASK
TMC4330_VSTOP_SHIFT
TMC4330_VSTOP_MASK
TMC4330_VSTOP_SHIFT
TMC4330_VBREAK_MASK
TMC4330_VBREAK_SHIFT
TMC4330_FREQUENCY_MODE_MASK
TMC4330_FREQUENCY_MODE_SHIFT
TMC4330_DIRECT_MODE_MASK
TMC4330_DIRECT_MODE_SHIFT
TMC4330_FREQUENCY_MODE_MASK
TMC4330_FREQUENCY_MODE_SHIFT
TMC4330_DIRECT_MODE_MASK
TMC4330_DIRECT_MODE_SHIFT
TMC4330_FREQUENCY_MODE_MASK
TMC4330_FREQUENCY_MODE_SHIFT
TMC4330_SIGN_AACT_MASK
TMC4330_SIGN_AACT_SHIFT
TMC4330_DIRECT_MODE_MASK
TMC4330_DIRECT_MODE_SHIFT
TMC4330_SIGN_AACT_MASK
TMC4330_SIGN_AACT_SHIFT
TMC4330_FREQUENCY_MODE_MASK
TMC4330_FREQUENCY_MODE_SHIFT
TMC4330_DIRECT_MODE_MASK
TMC4330_DIRECT_MODE_SHIFT
TMC4330_FREQUENCY_MODE_MASK
TMC4330_FREQUENCY_MODE_SHIFT
TMC4330_DIRECT_MODE_MASK
TMC4330_DIRECT_MODE_SHIFT
TMC4330_FREQUENCY_MODE_MASK
TMC4330_FREQUENCY_MODE_SHIFT
TMC4330_DIRECT_MODE_MASK
TMC4330_DIRECT_MODE_SHIFT
TMC4330_FREQUENCY_MODE_MASK
TMC4330_FREQUENCY_MODE_SHIFT
TMC4330_DIRECT_MODE_MASK
TMC4330_DIRECT_MODE_SHIFT
TMC4330_FREQUENCY_MODE_MASK
TMC4330_FREQUENCY_MODE_SHIFT
TMC4330_DIRECT_MODE_MASK
TMC4330_DIRECT_MODE_SHIFT
TMC4330_FREQUENCY_MODE_MASK
TMC4330_FREQUENCY_MODE_SHIFT
TMC4330_DIRECT_MODE_MASK
TMC4330_DIRECT_MODE_SHIFT
TMC4330_CLK_FREQ_MASK
TMC4330_CLK_FREQ_SHIFT
TMC4330_POS_COMP_MASK
TMC4330_POS_COMP_SHIFT
TMC4330_VIRT_STOP_LEFT_MASK
TMC4330_VIRT_STOP_LEFT_SHIFT
TMC4330_VIRT_STOP_RIGHT_MASK
TMC4330_VIRT_STOP_RIGHT_SHIFT
TMC4330_X_HOME_MASK
TMC4330_X_HOME_SHIFT
TMC4330_X_LATCH_MASK
TMC4330_X_LATCH_SHIFT
TMC4330_REV_CNT_MASK
TMC4330_REV_CNT_SHIFT
TMC4330_X_RANGE_MASK
TMC4330_X_RANGE_SHIFT
TMC4330_XTARGET_MASK
TMC4330_XTARGET_SHIFT
TMC4330_X_PIPE0_MASK
TMC4330_X_PIPE0_SHIFT
TMC4330_X_PIPE1_MASK
TMC4330_X_PIPE1_SHIFT
TMC4330_X_PIPE2_MASK
TMC4330_X_PIPE2_SHIFT
TMC4330_X_PIPE3_MASK
TMC4330_X_PIPE3_SHIFT
TMC4330_X_PIPE4_MASK
TMC4330_X_PIPE4_SHIFT
TMC4330_X_PIPE5_MASK
TMC4330_X_PIPE5_SHIFT
TMC4330_X_PIPE6_MASK
TMC4330_X_PIPE6_SHIFT
TMC4330_X_PIPE7_MASK
TMC4330_X_PIPE7_SHIFT
TMC4330_SH_REG0_VMAX_MASK
TMC4330_SH_REG0_VMAX_SHIFT
TMC4330_SH_REG1_AMAX_MASK
TMC4330_SH_REG1_AMAX_SHIFT
TMC4330_SH_REG1_AMAX_MASK
TMC4330_SH_REG1_AMAX_SHIFT
TMC4330_SH_REG2_DMAX_MASK
TMC4330_SH_REG2_DMAX_SHIFT
TMC4330_SH_REG2_DMAX_MASK
TMC4330_SH_REG2_DMAX_SHIFT
TMC4330_SH_REG3_ASTART_MASK
TMC4330_SH_REG3_ASTART_SHIFT
TMC4330_SH_REG3_ASTART_MASK
TMC4330_SH_REG3_ASTART_SHIFT
TMC4330_SH_REG3_BOW1_MASK
TMC4330_SH_REG3_BOW1_SHIFT
TMC4330_SH_REG3_BOW1_MASK
TMC4330_SH_REG3_BOW1_SHIFT
TMC4330_SH_REG3_ASTART_MASK
TMC4330_SH_REG3_ASTART_SHIFT
TMC4330_SH_REG3_ASTART_MASK
TMC4330_SH_REG3_ASTART_SHIFT
TMC4330_SH_REG4_DFINAL_MASK
TMC4330_SH_REG4_DFINAL_SHIFT
TMC4330_SH_REG4_DFINAL_MASK
TMC4330_SH_REG4_DFINAL_SHIFT
TMC4330_SH_REG4_BOW2_MASK
TMC4330_SH_REG4_BOW2_SHIFT
TMC4330_SH_REG4_BOW2_MASK
TMC4330_SH_REG4_BOW2_SHIFT
TMC4330_SH_REG4_DFINAL_MASK
TMC4330_SH_REG4_DFINAL_SHIFT
TMC4330_SH_REG4_DFINAL_MASK
TMC4330_SH_REG4_DFINAL_SHIFT
TMC4330_SH_REG5_VBREAK_MASK
TMC4330_SH_REG5_VBREAK_SHIFT
TMC4330_SH_REG5_BOW3_MASK
TMC4330_SH_REG5_BOW3_SHIFT
TMC4330_SH_REG5_BOW3_MASK
TMC4330_SH_REG5_BOW3_SHIFT
TMC4330_SH_REG5_VBREAK_MASK
TMC4330_SH_REG5_VBREAK_SHIFT
TMC4330_SH_REG6_VSTART_MASK
TMC4330_SH_REG6_VSTART_SHIFT
TMC4330_SH_REG6_BOW4_MASK
TMC4330_SH_REG6_BOW4_SHIFT
TMC4330_SH_REG6_BOW4_MASK
TMC4330_SH_REG6_BOW4_SHIFT
TMC4330_SH_REG6_VSTART_MASK
TMC4330_SH_REG6_VSTART_SHIFT
TMC4330_SH_REG6_VSTOP_MASK
TMC4330_SH_REG6_VSTOP_SHIFT
TMC4330_SH_REG7_VSTOP_MASK
TMC4330_SH_REG7_VSTOP_SHIFT
TMC4330_SH_REG7_VMAX_MASK
TMC4330_SH_REG7_VMAX_SHIFT
TMC4330_SH_REG8_BOW1_MASK
TMC4330_SH_REG8_BOW1_SHIFT
TMC4330_SH_REG8_BOW1_MASK
TMC4330_SH_REG8_BOW1_SHIFT
TMC4330_SH_REG8_AMAX_MASK
TMC4330_SH_REG8_AMAX_SHIFT
TMC4330_SH_REG8_AMAX_MASK
TMC4330_SH_REG8_AMAX_SHIFT
TMC4330_SH_REG9_BOW2_MASK
TMC4330_SH_REG9_BOW2_SHIFT
TMC4330_SH_REG9_BOW2_MASK
TMC4330_SH_REG9_BOW2_SHIFT
TMC4330_SH_REG9_DMAX_MASK
TMC4330_SH_REG9_DMAX_SHIFT
TMC4330_SH_REG9_DMAX_MASK
TMC4330_SH_REG9_DMAX_SHIFT
TMC4330_SH_REG10_BOW3_MASK
TMC4330_SH_REG10_BOW3_SHIFT
TMC4330_SH_REG10_BOW3_MASK
TMC4330_SH_REG10_BOW3_SHIFT
TMC4330_SH_REG10_BOW1_MASK
TMC4330_SH_REG10_BOW1_SHIFT
TMC4330_SH_REG10_BOW1_MASK
TMC4330_SH_REG10_BOW1_SHIFT
TMC4330_SH_REG10_ASTART_MASK
TMC4330_SH_REG10_ASTART_SHIFT
TMC4330_SH_REG10_ASTART_MASK
TMC4330_SH_REG10_ASTART_SHIFT
TMC4330_SH_REG11_BOW4_MASK
TMC4330_SH_REG11_BOW4_SHIFT
TMC4330_SH_REG11_BOW4_MASK
TMC4330_SH_REG11_BOW4_SHIFT
TMC4330_SH_REG11_BOW2_MASK
TMC4330_SH_REG11_BOW2_SHIFT
TMC4330_SH_REG11_BOW2_MASK
TMC4330_SH_REG11_BOW2_SHIFT
TMC4330_SH_REG11_DFINAL_MASK
TMC4330_SH_REG11_DFINAL_SHIFT
TMC4330_SH_REG11_DFINAL_MASK
TMC4330_SH_REG11_DFINAL_SHIFT
TMC4330_OPERATION_MODE_MASK
TMC4330_OPERATION_MODE_SHIFT
TMC4330_RAMP_PROFILE_MASK
TMC4330_RAMP_PROFILE_SHIFT
TMC4330_SH_REG12_BOW3_MASK
TMC4330_SH_REG12_BOW3_SHIFT
TMC4330_SH_REG12_BOW3_MASK
TMC4330_SH_REG12_BOW3_SHIFT
TMC4330_SH_REG12_VBREAK_MASK
TMC4330_SH_REG12_VBREAK_SHIFT
TMC4330_SH_REG13_BOW4_MASK
TMC4330_SH_REG13_BOW4_SHIFT
TMC4330_SH_REG13_BOW4_MASK
TMC4330_SH_REG13_BOW4_SHIFT
TMC4330_SH_REG13_VSTART_MASK
TMC4330_SH_REG13_VSTART_SHIFT
TMC4330_SH_REG13_VSTOP_MASK
TMC4330_SH_REG13_VSTOP_SHIFT
TMC4330_CLK_GATING_REG_MASK
TMC4330_CLK_GATING_REG_SHIFT
TMC4330_RESET_REG_MASK
TMC4330_RESET_REG_SHIFT
TMC4330_ENC_POS_MASK
TMC4330_ENC_POS_SHIFT
TMC4330_ENC_LATCH_MASK
TMC4330_ENC_LATCH_SHIFT
TMC4330_ENC_RESET_VAL_MASK
TMC4330_ENC_RESET_VAL_SHIFT
TMC4330_ENC_POS_DEV_MASK
TMC4330_ENC_POS_DEV_SHIFT
TMC4330_CL_TR_TOLERANCE_MASK
TMC4330_CL_TR_TOLERANCE_SHIFT
TMC4330_ENC_POS_DEV_TOL_MASK
TMC4330_ENC_POS_DEV_TOL_SHIFT
TMC4330_ENC_CONST_MASK
TMC4330_ENC_CONST_SHIFT
TMC4330_ENC_IN_RES_MASK
TMC4330_ENC_IN_RES_SHIFT
TMC4330_MANUAL_ENC_CONST_MASK
TMC4330_MANUAL_ENC_CONST_SHIFT
TMC4330_ENC_OUT_RES_MASK
TMC4330_ENC_OUT_RES_SHIFT
TMC4330_SER_CLK_IN_HIGH_MASK
TMC4330_SER_CLK_IN_HIGH_SHIFT
TMC4330_SER_CLK_IN_LOW_MASK
TMC4330_SER_CLK_IN_LOW_SHIFT
TMC4330_SSI_IN_CLK_DELAY_MASK
TMC4330_SSI_IN_CLK_DELAY_SHIFT
TMC4330_SSI_IN_WTIME_MASK
TMC4330_SSI_IN_WTIME_SHIFT
TMC4330_SSI_IN_CLK_DELAY_MASK
TMC4330_SSI_IN_CLK_DELAY_SHIFT
TMC4330_SSI_IN_WTIME_MASK
TMC4330_SSI_IN_WTIME_SHIFT
TMC4330_SER_PTIME_MASK
TMC4330_SER_PTIME_SHIFT
TMC4330_CL_OFFSET_MASK
TMC4330_CL_OFFSET_SHIFT
TMC4330_PID_VEL_MASK
TMC4330_PID_VEL_SHIFT
TMC4330_CL_VMAX_CALC_P_MASK
TMC4330_CL_VMAX_CALC_P_SHIFT
TMC4330_PID_P_MASK
TMC4330_PID_P_SHIFT
TMC4330_PID_ISUM_RD_MASK
TMC4330_PID_ISUM_RD_SHIFT
TMC4330_CL_VMAX_CALC_I_MASK
TMC4330_CL_VMAX_CALC_I_SHIFT
TMC4330_PID_I_MASK
TMC4330_PID_I_SHIFT
TMC4330_CL_DELTA_P_MASK
TMC4330_CL_DELTA_P_SHIFT
TMC4330_PID_D_MASK
TMC4330_PID_D_SHIFT
TMC4330_PID_E_MASK
TMC4330_PID_E_SHIFT
TMC4330_PID_I_CLIP_MASK
TMC4330_PID_I_CLIP_SHIFT
TMC4330_PID_D_CLKDIV_MASK
TMC4330_PID_D_CLKDIV_SHIFT
TMC4330_PID_DV_CLIP_MASK
TMC4330_PID_DV_CLIP_SHIFT
TMC4330_CL_TOLERANCE_MASK
TMC4330_CL_TOLERANCE_SHIFT
TMC4330_PID_TOLERANCE_MASK
TMC4330_PID_TOLERANCE_SHIFT
TMC4330_CL_VMIN_EMF_MASK
TMC4330_CL_VMIN_EMF_SHIFT
TMC4330_CL_VADD_EMF_MASK
TMC4330_CL_VADD_EMF_SHIFT
TMC4330_ENC_VEL_ZERO_MASK
TMC4330_ENC_VEL_ZERO_SHIFT
TMC4330_ENC_VMEAN_WAIT_MASK
TMC4330_ENC_VMEAN_WAIT_SHIFT
TMC4330_ENC_VMEAN_FILTER_MASK
TMC4330_ENC_VMEAN_FILTER_SHIFT
TMC4330_ENC_VMEAN_INT_MASK
TMC4330_ENC_VMEAN_INT_SHIFT
TMC4330_SER_ENC_VARIATION_MASK
TMC4330_SER_ENC_VARIATION_SHIFT
TMC4330_ENC_VMEAN_FILTER_MASK
TMC4330_ENC_VMEAN_FILTER_SHIFT
TMC4330_CL_CYCLE_MASK
TMC4330_CL_CYCLE_SHIFT
TMC4330_V_ENC_MASK
TMC4330_V_ENC_SHIFT
TMC4330_V_ENC_MEAN_MASK
TMC4330_V_ENC_MEAN_SHIFT
TMC4330_ADDR_TO_ENC_MASK
TMC4330_ADDR_TO_ENC_SHIFT
TMC4330_DATA_TO_ENC_MASK
TMC4330_DATA_TO_ENC_SHIFT
TMC4330_ADDR_FROM_ENC_MASK
TMC4330_ADDR_FROM_ENC_SHIFT
TMC4330_DATA_FROM_ENC_MASK
TMC4330_DATA_FROM_ENC_SHIFT
TMC4330_MSLUT_0_MASK
TMC4330_MSLUT_0_SHIFT
TMC4330_MSLUT_1_MASK
TMC4330_MSLUT_1_SHIFT
TMC4330_MSLUT_2_MASK
TMC4330_MSLUT_2_SHIFT
TMC4330_MSLUT_3_MASK
TMC4330_MSLUT_3_SHIFT
TMC4330_MSLUT_4_MASK
TMC4330_MSLUT_4_SHIFT
TMC4330_MSLUT_5_MASK
TMC4330_MSLUT_5_SHIFT
TMC4330_MSLUT_6_MASK
TMC4330_MSLUT_6_SHIFT
TMC4330_MSLUT_7_MASK
TMC4330_MSLUT_7_SHIFT
TMC4330_MSLUTSEL_MASK
TMC4330_MSLUTSEL_SHIFT
TMC4330_MSCNT_MASK
TMC4330_MSCNT_SHIFT
TMC4330_CURRENTA_MASK
TMC4330_CURRENTA_SHIFT
TMC4330_CURRENTB_MASK
TMC4330_CURRENTB_SHIFT
TMC4330_CURRENTA_SPI_MASK
TMC4330_CURRENTA_SPI_SHIFT
TMC4330_CURRENTB_SPI_MASK
TMC4330_CURRENTB_SPI_SHIFT
TMC4330_TZEROWAIT_MASK
TMC4330_TZEROWAIT_SHIFT
TMC4330_CIRCULAR_DEC_MASK
TMC4330_CIRCULAR_DEC_SHIFT
TMC4330_ENC_COMP_XOFFSET_MASK
TMC4330_ENC_COMP_XOFFSET_SHIFT
TMC4330_ENC_COMP_YOFFSET_MASK
TMC4330_ENC_COMP_YOFFSET_SHIFT
TMC4330_START_SIN_MASK
TMC4330_START_SIN_SHIFT
TMC4330_START_SIN90_120_MASK
TMC4330_START_SIN90_120_SHIFT
TMC4330_VERSION_NO_MASK
TMC4330_VERSION_NO_SHIFT
file TMC4330/TMC4330_Register.h

Defines

TMC4330_GENERAL_CONF
TMC4330_REFERENCE_CONF
TMC4330_START_CONF
TMC4330_INPUT_FILT_CONF
TMC4330_SCALE_VALUES
TMC4330_ENC_IN_CONF
TMC4330_ENC_IN_DATA
TMC4330_STEP_CONF
TMC4330_SPI_STATUS_SELECTION
TMC4330_EVENT_CLEAR_CONF
TMC4330_INTR_CONF
TMC4330_EVENTS
TMC4330_STATUS
TMC4330_STP_LENGTH_ADD
TMC4330_DIR_SETUP_TIME
TMC4330_START_OUT_ADD
TMC4330_GEAR_RATIO
TMC4330_START_DELAY
TMC4330_CLK_GATING_DELAY
TMC4330_STDBY_DELAY
TMC4330_PWM_VMAX
TMC4330_CL_BETA
TMC4330_CL_GAMMA
TMC4330_HOME_SAFETY_MARGIN
TMC4330_PWM_FREQ
TMC4330_RAMPMODE
TMC4330_XACTUAL
TMC4330_VACTUAL
TMC4330_AACTUAL
TMC4330_VMAX
TMC4330_VSTART
TMC4330_VSTOP
TMC4330_VBREAK
TMC4330_AMAX
TMC4330_DMAX
TMC4330_ASTART
TMC4330_SIGN_AACT
TMC4330_DFINAL
TMC4330_DSTOP
TMC4330_BOW1
TMC4330_BOW2
TMC4330_BOW3
TMC4330_BOW4
TMC4330_CLK_FREQ
TMC4330_POS_COMP
TMC4330_VIRT_STOP_LEFT
TMC4330_VIRT_STOP_RIGHT
TMC4330_X_HOME
TMC4330_X_LATCH_RD
TMC4330_REV_CNT_RD
TMC4330_X_RANGE_WR
TMC4330_X_TARGET
TMC4330_X_PIPE0
TMC4330_X_PIPE1
TMC4330_X_PIPE2
TMC4330_X_PIPE3
TMC4330_X_PIPE4
TMC4330_X_PIPE5
TMC4330_X_PIPE6
TMC4330_X_PIPE7
TMC4330_SH_REG0
TMC4330_SH_REG1
TMC4330_SH_REG2
TMC4330_SH_REG3
TMC4330_SH_REG4
TMC4330_SH_REG5
TMC4330_SH_REG6
TMC4330_SH_REG7
TMC4330_SH_REG8
TMC4330_SH_REG9
TMC4330_SH_REG10
TMC4330_SH_REG11
TMC4330_SH_REG12
TMC4330_SH_REG13
TMC4330_CLK_GATING_REG
TMC4330_RESET_REG
TMC4330_ENC_POS
TMC4330_ENC_LATCH_RD
TMC4330_ENC_RESET_VAL_WR
TMC4330_ENC_POS_DEV_RD
TMC4330_CL_TR_TOLERANCE_WR
TMC4330_ENC_POS_DEV_TOL_WR
TMC4330_ENC_IN_RES_WR
TMC4330_ENC_CONST_RD
TMC4330_MANUAL_ENC_CONST0
TMC4330_ENC_OUT_RES
TMC4330_SER_CLK_IN_HIGH_WR
TMC4330_SER_CLK_IN_LOW_WR
TMC4330_SSI_IN_CLK_DELAY_WR
TMC4330_SSI_IN_WTIME_WR
TMC4330_SER_PTIME_WR
TMC4330_CL_OFFSET
TMC4330_PID_P_WR
TMC4330_CL_VMAX_CALC_P_WR
TMC4330_PID_VEL_RD
TMC4330_PID_I_WR
TMC4330_CL_VMAX_CALC_I_WR
TMC4330_PID_ISUM_RD
TMC4330_PID_D_WR
TMC4330_CL_DELTA_P_WR
TMC4330_PID_I_CLIP_WR
TMC4330_PID_D_CLKDIV_WR
TMC4330_PID_E_RD
TMC4330_PID_DV_CLIP_WR
TMC4330_PID_TOLERANCE_WR
TMC4330_CL_TOLERANCE_WR
TMC4330_FS_VEL_WR
TMC4330_CL_VMIN_EMF_WR
TMC4330_CL_VADD_EMF
TMC4330_ENC_VEL_ZERO_WR
TMC4330_ENC_VMEAN_WAIT_WR
TMC4330_ENC_VMEAN_FILTER_WR
TMC4330_ENC_VMEAN_INT_WR
TMC4361_SER_ENC_VARIATION_WR
TMC4361_CL_CYCLE_WR
TMC4330_SYNCHRO_SET
TMC4330_V_ENC_RD
TMC4330_V_ENC_MEAN_RD
TMC4330_ADDR_TO_ENC
TMC4330_DATA_TO_ENC
TMC4330_ADDR_FROM_ENC
TMC4330_DATA_FROM_ENC
TMC4330_MSLUT_0_WR
TMC4330_MSLUT_1_WR
TMC4330_MSLUT_2_WR
TMC4330_MSLUT_3_WR
TMC4330_MSLUT_4_WR
TMC4330_MSLUT_5_WR
TMC4330_MSLUT_6_WR
TMC4330_MSLUT_7_WR
TMC4330_MSLUTSEL_WR
TMC4330_MSCNT_RD
TMC4330_USTEPA_RD
TMC4330_USTEPB_RD
TMC4330_USTEPA_SCALE_RD
TMC4330_USTEPB_SCALE_RD
TMC4330_TZEROWAIT_WR
TMC4330_CIRCULAR_DEC_WR
TMC4330_ENC_COMP_XOFFSET
TMC4330_ENC_COMP_YOFFSET
TMC4330_ENC_COMP_AMPL
TMC4330_START_SIN_WR
TMC4330_START_SIN90_WR
TMC4330_VERSION_NO_RD
file TMC43xx/TMC4330_Register.h

Defines

TMC4330_GENERAL_CONF
TMC4330_REFERENCE_CONF
TMC4330_START_CONF
TMC4330_INPUT_FILT_CONF
TMC4330_SCALE_VALUES
TMC4330_ENC_IN_CONF
TMC4330_ENC_IN_DATA
TMC4330_STEP_CONF
TMC4330_SPI_STATUS_SELECTION
TMC4330_EVENT_CLEAR_CONF
TMC4330_INTR_CONF
TMC4330_EVENTS
TMC4330_STATUS
TMC4330_STP_LENGTH_ADD
TMC4330_DIR_SETUP_TIME
TMC4330_START_OUT_ADD
TMC4330_GEAR_RATIO
TMC4330_START_DELAY
TMC4330_CLK_GATING_DELAY
TMC4330_STDBY_DELAY
TMC4330_PWM_VMAX
TMC4330_CL_BETA
TMC4330_CL_GAMMA
TMC4330_HOME_SAFETY_MARGIN
TMC4330_PWM_FREQ
TMC4330_RAMPMODE
TMC4330_XACTUAL
TMC4330_VACTUAL
TMC4330_AACTUAL
TMC4330_VMAX
TMC4330_VSTART
TMC4330_VSTOP
TMC4330_VBREAK
TMC4330_AMAX
TMC4330_DMAX
TMC4330_ASTART
TMC4330_SIGN_AACT
TMC4330_DFINAL
TMC4330_DSTOP
TMC4330_BOW1
TMC4330_BOW2
TMC4330_BOW3
TMC4330_BOW4
TMC4330_CLK_FREQ
TMC4330_POS_COMP
TMC4330_VIRT_STOP_LEFT
TMC4330_VIRT_STOP_RIGHT
TMC4330_X_HOME
TMC4330_X_LATCH_RD
TMC4330_REV_CNT_RD
TMC4330_X_RANGE_WR
TMC4330_X_TARGET
TMC4330_X_PIPE0
TMC4330_X_PIPE1
TMC4330_X_PIPE2
TMC4330_X_PIPE3
TMC4330_X_PIPE4
TMC4330_X_PIPE5
TMC4330_X_PIPE6
TMC4330_X_PIPE7
TMC4330_SH_REG0
TMC4330_SH_REG1
TMC4330_SH_REG2
TMC4330_SH_REG3
TMC4330_SH_REG4
TMC4330_SH_REG5
TMC4330_SH_REG6
TMC4330_SH_REG7
TMC4330_SH_REG8
TMC4330_SH_REG9
TMC4330_SH_REG10
TMC4330_SH_REG11
TMC4330_SH_REG12
TMC4330_SH_REG13
TMC4330_CLK_GATING_REG
TMC4330_RESET_REG
TMC4330_ENC_POS
TMC4330_ENC_LATCH_RD
TMC4330_ENC_RESET_VAL_WR
TMC4330_ENC_POS_DEV_RD
TMC4330_CL_TR_TOLERANCE_WR
TMC4330_ENC_POS_DEV_TOL_WR
TMC4330_ENC_IN_RES_WR
TMC4330_ENC_CONST_RD
TMC4330_MANUAL_ENC_CONST0
TMC4330_ENC_OUT_RES
TMC4330_SER_CLK_IN_HIGH_WR
TMC4330_SER_CLK_IN_LOW_WR
TMC4330_SSI_IN_CLK_DELAY_WR
TMC4330_SSI_IN_WTIME_WR
TMC4330_SER_PTIME_WR
TMC4330_CL_OFFSET
TMC4330_PID_P_WR
TMC4330_CL_VMAX_CALC_P_WR
TMC4330_PID_VEL_RD
TMC4330_PID_I_WR
TMC4330_CL_VMAX_CALC_I_WR
TMC4330_PID_ISUM_RD
TMC4330_PID_D_WR
TMC4330_CL_DELTA_P_WR
TMC4330_PID_I_CLIP_WR
TMC4330_PID_D_CLKDIV_WR
TMC4330_PID_E_RD
TMC4330_PID_DV_CLIP_WR
TMC4330_PID_TOLERANCE_WR
TMC4330_CL_TOLERANCE_WR
TMC4330_FS_VEL_WR
TMC4330_CL_VMIN_EMF_WR
TMC4330_CL_VADD_EMF
TMC4330_ENC_VEL_ZERO_WR
TMC4330_ENC_VMEAN_WAIT_WR
TMC4330_ENC_VMEAN_FILTER_WR
TMC4330_ENC_VMEAN_INT_WR
TMC4361_SER_ENC_VARIATION_WR
TMC4361_CL_CYCLE_WR
TMC4330_SYNCHRO_SET
TMC4330_V_ENC_RD
TMC4330_V_ENC_MEAN_RD
TMC4330_ADDR_TO_ENC
TMC4330_DATA_TO_ENC
TMC4330_ADDR_FROM_ENC
TMC4330_DATA_FROM_ENC
TMC4330_MSLUT_0_WR
TMC4330_MSLUT_1_WR
TMC4330_MSLUT_2_WR
TMC4330_MSLUT_3_WR
TMC4330_MSLUT_4_WR
TMC4330_MSLUT_5_WR
TMC4330_MSLUT_6_WR
TMC4330_MSLUT_7_WR
TMC4330_MSLUTSEL_WR
TMC4330_MSCNT_RD
TMC4330_USTEPA_RD
TMC4330_USTEPB_RD
TMC4330_USTEPA_SCALE_RD
TMC4330_USTEPB_SCALE_RD
TMC4330_TZEROWAIT_WR
TMC4330_CIRCULAR_DEC_WR
TMC4330_ENC_COMP_XOFFSET
TMC4330_ENC_COMP_YOFFSET
TMC4330_ENC_COMP_AMPL
TMC4330_START_SIN_WR
TMC4330_START_SIN90_WR
TMC4330_VERSION_NO_RD
TMC4330_RAMP_HOLD
TMC4330_RAMP_TRAPEZ
TMC4330_RAMP_SSHAPE
TMC4330_RAMP_POSITION
file TMC4331.c
#include “TMC4331.h”

Functions

void tmc4331_readWriteArray(uint8_t channel, uint8_t *data, size_t length)
void tmc4331_writeDatagram(TMC4331TypeDef *tmc4331, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc4331_writeInt(TMC4331TypeDef *tmc4331, uint8_t address, int32_t value)
int32_t tmc4331_readInt(TMC4331TypeDef *tmc4331, uint8_t address)
void tmc4331_readWriteCover(TMC4331TypeDef *tmc4331, uint8_t *data, size_t length)
void tmc4331_init(TMC4331TypeDef *tmc4331, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
uint8_t tmc4331_reset(TMC4331TypeDef *tmc4331)
uint8_t tmc4331_restore(TMC4331TypeDef *tmc4331)
void tmc4331_setRegisterResetState(TMC4331TypeDef *tmc4331, const int32_t *resetState)
void tmc4331_setCallback(TMC4331TypeDef *tmc4331, tmc4331_callback callback)
static void tmc4331_writeConfiguration(TMC4331TypeDef *tmc4331)
void tmc4331_periodicJob(TMC4331TypeDef *tmc4331, uint32_t tick)
void tmc4331_rotate(TMC4331TypeDef *tmc4331, int32_t velocity)
void tmc4331_right(TMC4331TypeDef *tmc4331, int32_t velocity)
void tmc4331_left(TMC4331TypeDef *tmc4331, int32_t velocity)
void tmc4331_stop(TMC4331TypeDef *tmc4331)
void tmc4331_moveTo(TMC4331TypeDef *tmc4331, int32_t position, uint32_t velocityMax)
void tmc4331_moveBy(TMC4331TypeDef *tmc4331, int32_t *ticks, uint32_t velocityMax)
int32_t tmc4331_discardVelocityDecimals(int32_t value)
file TMC4331.h
#include “tmc/helpers/API_Header.h”
#include “TMC4331_Register.h”
#include “TMC4331_Constants.h”
#include “TMC4331_Fields.h”

Defines

TMC4331_FIELD_READ(tdef, address, mask, shift)
TMC4331_FIELD_WRITE(tdef, address, mask, shift, value)
R10
R20

Typedefs

typedef void (*tmc4331_callback)(TMC4331TypeDef*, ConfigState)

Functions

void tmc4331_writeDatagram(TMC4331TypeDef *tmc4331, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc4331_writeInt(TMC4331TypeDef *tmc4331, uint8_t address, int32_t value)
int32_t tmc4331_readInt(TMC4331TypeDef *tmc4331, uint8_t address)
void tmc4331_readWriteCover(TMC4331TypeDef *tmc4331, uint8_t *data, size_t length)
void tmc4331_init(TMC4331TypeDef *tmc4331, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
uint8_t tmc4331_reset(TMC4331TypeDef *tmc4331)
uint8_t tmc4331_restore(TMC4331TypeDef *tmc4331)
void tmc4331_setRegisterResetState(TMC4331TypeDef *tmc4331, const int32_t *resetState)
void tmc4331_setCallback(TMC4331TypeDef *tmc4331, tmc4331_callback callback)
void tmc4331_periodicJob(TMC4331TypeDef *tmc4331, uint32_t tick)
void tmc4331_rotate(TMC4331TypeDef *tmc4331, int32_t velocity)
void tmc4331_right(TMC4331TypeDef *tmc4331, int32_t velocity)
void tmc4331_left(TMC4331TypeDef *tmc4331, int32_t velocity)
void tmc4331_stop(TMC4331TypeDef *tmc4331)
void tmc4331_moveTo(TMC4331TypeDef *tmc4331, int32_t position, uint32_t velocityMax)
void tmc4331_moveBy(TMC4331TypeDef *tmc4331, int32_t *ticks, uint32_t velocityMax)
int32_t tmc4331_discardVelocityDecimals(int32_t value)
uint8_t tmc4331_calibrateClosedLoop(TMC4331TypeDef *tmc4331, uint8_t worker0master1)

Variables

static const int32_t tmc4331_defaultRegisterResetState[TMC4331_REGISTER_COUNT] = {N_A, 0, 0, 0, 0, 0, N_A, 0, 0, 0, N_A, N_A, 0, 0, 0, 0, R10, 0, N_A, 0, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, N_A, R20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, N_A, 0, 0, N_A, 0}
static const uint8_t tmc4331_defaultRegisterAccess[TMC4331_REGISTER_COUNT] = {0x43, 0x03, 0x03, 0x03, 0x03, 0x03, 0x43, ____, ____, ____, 0x43, 0x43, 0x03, 0x03, 0x13, 0x01, 0x03, 0x03, 0x43, 0x03, 0x03, 0x03, 0x03, 0x43, 0x03, 0x03, 0x03, 0x03, ____, 0x03, 0x03, 0x43, 0x03, 0x03, 0x01, 0x01, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x43, 0x03, 0x03, 0x03, 0x03, 0x13, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, ____, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x02, 0x42, ____, ____, ____, ____, 0x02, ____, ____, ____, ____, 0x13, 0x13, 0x01, 0x01, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x01, 0x01, 0x53, 0x13, ____, 0x42, 0x01}
file TMC4331_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC4331_REGISTER_COUNT
TMC4331_MOTORS
TMC4331_WRITE_BIT
TMC4331_ADDRESS_MASK
TMC4331_MAX_VELOCITY
TMC4331_MAX_ACCELERATION
TMC4331_COVER_DONE
TMC4331_RAMP_HOLD
TMC4331_RAMP_TRAPEZ
TMC4331_RAMP_SSHAPE
TMC4331_RAMP_POSITION
TMC4331_RAMP_HOLD
TMC4331_WRITE
TMC4331_GCONF_USE_AVSTART
TMC4331_GCONF_DIRECT_ACC_EN
TMC4331_GCONF_DIRECT_BOW_EN
TMC4331_GCONF_STEP_INACT_POL
TMC4331_GCONF_TOGGLE_STEP
TMC4331_GCONF_POL_DIR_OUT
TMC4331_GCONF_INT_SD
TMC4331_GCONF_EXT_SD_HIGH
TMC4331_GCONF_EXT_SD_LOW
TMC4331_GCONF_EXT_SD_TOGGLE
TMC4331_GCONF_DIR_IN_POL
TMC4331_GCONF_SD_INDIRECT
TMC4331_GCONF_ENC_INC
TMC4331_GCONF_ENC_SSI
TMC4331_GCONF_ENC_BISS
TMC4331_GCONF_ENC_SPI
TMC4331_GCONF_ENC_DIFF_DIS
TMC4331_GCONF_STDBY_CLOCK_LOW
TMC4331_GCONF_STDBY_CLOCK_HIGH
TMC4331_GCONF_STDBY_CHOPSYNC
TMC4331_GCONF_STDBY_CLOCK_INT
TMC4331_GCONF_INTR_POL
TMC4331_GCONF_TARGET_REACHED_POL
TMC4331_GCONF_CLK_GATING_EN
TMC4331_GCONF_CLK_GATING_STDBY_EN
TMC4331_GCONF_FS_EN
TMC4331_GCONF_FS_SDOUT
TMC4331_GCONF_DCSTEP_OFF
TMC4331_GCONF_DCSTEP_AUTO
TMC4331_GCONF_DCSTEP_TMC21xx
TMC4331_GCONF_DCSTEP_TMC26x
TMC4331_GCONF_PWM_OUT_EN
TMC4331_GCONF_SER_ENC_OUT_EN
TMC4331_GCONF_SER_ENC_OUT_DIFF
TMC4331_GCONF_AUTO_DIRECT_SD_OFF
TMC4331_GCONF_CIRC_CNT_XLATCH
TMC4331_GCONF_REV_DIR
TMC4331_GCONF_INTR_TR_PU_PD_EN
TMC4331_GCONF_INTR_WIRED_AND
TMC4331_GCONF_TR_WIRED_AND
TMC4331_SPIOUT_OFF
TMC4331_SPIOUT_TMC23x
TMC4331_SPIOUT_TMC24x
TMC4331_SPIOUT_TMC26x_389
TMC4331_SPIOUT_TMC26x_389_SD
TMC4331_SPIOUT_TMC21xx_SD
TMC4331_SPIOUT_TMC21xx
TMC4331_SPIOUT_SCALE
TMC4331_SPIOUT_SINLUT
TMC4331_SPIOUT_DACADDR
TMC4331_SPIOUT_DAC
TMC4331_SPIOUT_DAC_INV
TMC4331_SPIOUT_DAC_MAPPED
TMC4331_SPIOUT_COVER_ONLY
TMC4331_SPIOUT_MD_OFF
TMC4331_SPIOUT_MD_FALLING
TMC4331_SPIOUT_MD_NO_STANDBY
TMC4331_SPIOUT_MD_ALWAYS
TMC4331_SPIOUT_STDBY_ON_STALL
TMC4331_SPIOUT_STALL_FLAG
TMC4331_STALL_LOAD_LIMIT(x)
TMC4331_SPIOUT_PHASE_SHIFT
TMC4331_SPIOUT_THREE_PHASE_EN
TMC4331_SPIOUT_SCALE_VAL_TR_EN
TMC4331_SPIOUT_DISABLE_POLLING
TMC4331_SPIOUT_ENABLE_SHADOW_DATAGRAMS
TMC4331_SPIOUT_POLL_BLOCK_MULTI(x)
TMC4331_SPIOUT_COVER_DONE_NOT_FOR_CURRENT
TMC4331_ENC_IN_CONF
TMC4331_ENC_IN_MODE_OL
TMC4331_ENC_IN_MODE_CL
TMC4331_ENC_IN_MODE_PID_0
TMC4331_ENC_IN_MODE
TMC4331_ENC_IN_CL_CALIBRATION_EN
TMC4331_ENC_IN_CL_EMF_EN
TMC4331_ENC_IN_CL_VLIMIT_EN
TMC4331_ENC_IN_CL_VELOCITY_EN
TMC4331_ENC_IN_SER_VAR_LIMIT
TMC4331_CURCONF_HOLD_EN
TMC4331_CURCONF_DRIVE_EN
TMC4331_CURCONF_BOOST_ACC_EN
TMC4331_CURCONF_BOOST_DEC_EN
TMC4331_CURCONF_BOOST_START_EN
TMC4331_CURCONF_SEC_DRIVE_EN
TMC4331_CURCONF_FREEWHEELING_EN
TMC4331_CURCONF_CL_SCALE_EN
TMC4331_CURCONF_PWM_SCALE_REF
TMC4331_CURCONF_PWM_AMPL(x)
TMC4331_EV_TARGET_REACHED
TMC4331_EV_POSCOMP_REACHED
TMC4331_EV_VELOCITY_REACHED
TMC4331_EV_VZERO
TMC4331_EV_VPOSITIVE
TMC4331_EV_VNEGATIVE
TMC4331_EV_AZERO
TMC4331_EV_APOSITIVE
TMC4331_EV_ANEGATIVE
TMC4331_EV_MAX_PHASE_TRAP
TMC4331_EV_FROZEN
TMC4331_EV_STOP_LEFT
TMC4331_EV_STOP_RIGHT
TMC4331_EV_VIRT_STOP_LEFT
TMC4331_EV_VIRT_STOP_RIGHT
TMC4331_EV_HOME_ERROR
TMC4331_EV_XLATCH_DONE
TMC4331_EV_FS_ACTIVE
TMC4331_EV_ENC_FAIL
TMC4331_EV_N_ACTIVE
TMC4331_EV_ENC_DONE
TMC4331_EV_SER_ENC_DATA_FAIL
TMC4331_EV_CRC_FAIL
TMC4331_EV_SER_DATA_DONE
TMC4331_EV_BISS_FLAG
TMC4331_EV_COVER_DONE
TMC4331_EV_ENC_VZERO
TMC4331_EV_CL_MAX
TMC4331_EV_CL_FIT
TMC4331_EV_STOP_ON_STALL
TMC4331_EV_MOTOR
TMC4331_EV_RST
TMC4331_ST_TARGET_REACHED
TMC4331_ST_POSCOMP_REACHED
TMC4331_ST_VEL_REACHED
TMC4331_ST_VEL_POS
TMC4331_ST_VEL_NEG
TMC4331_ST_RAMP_ACC
TMC4331_ST_RAMP_DEC
TMC4331_ST_STOP_LEFT_ACTIVE
TMC4331_ST_STOP_RIGHT_ACTIVE
TMC4331_ST_VIRT_STOP_LEFT_ACTIVE
TMC4331_ST_VIRT_STOP_RIGHT_ACTIVE
TMC4331_ST_HOME_ERROR
TMC4331_ST_ENC_FAIL
TMC4331_RAMPMODE_VEL_HOLD
TMC4331_RAMPMODE_VEL_TRAPEZ
TMC4331_RAMPMODE_VEL_SSHAPE
TMC4331_RAMPMODE_POS_HOLD
TMC4331_RAMPMODE_POS_TRAPEZ
TMC4331_RAMPMODE_POS_SSHAPE
TMC4331_REFCONF_STOP_LEFT_EN
TMC4331_REFCONF_STOP_RIGHT_EN
TMC4331_REFCONF_POL_STOP_LEFT
TMC4331_REFCONF_POL_STOP_RIGHT
TMC4331_REFCONF_INV_STOP_DIR
TMC4331_REFCONF_SOFT_STOP_EN
TMC4331_REFCONF_VIRT_LEFT_LIM_EN
TMC4331_REFCONF_VIRT_RIGHT_LIM_EN
TMC4331_REFCONF_VIRT_STOP_HARD
TMC4331_REFCONF_VIRT_STOP_LINEAR
TMC4331_REFCONF_CIRCULAR
TMC4331_REFCONF_STOP_ON_STALL
TMC4331_REFCONF_DRV_AFTER_STALL
TMC4331_REFCONF_CIRCULAR_ENC_EN
file TMC4331_Fields.h

Defines

TMC4331_USE_ASTART_AND_VSTART_MASK
TMC4331_USE_ASTART_AND_VSTART_SHIFT
TMC4331_DIRECT_ACC_VAL_EN_MASK
TMC4331_DIRECT_ACC_VAL_EN_SHIFT
TMC4331_DIRECT_BOW_VAL_EN_MASK
TMC4331_DIRECT_BOW_VAL_EN_SHIFT
TMC4331_STEP_INACTIVE_POL_MASK
TMC4331_STEP_INACTIVE_POL_SHIFT
TMC4331_TOGGLE_STEP_MASK
TMC4331_TOGGLE_STEP_SHIFT
TMC4331_POL_DIR_OUT_MASK
TMC4331_POL_DIR_OUT_SHIFT
TMC4331_SDIN_MODE_MASK
TMC4331_SDIN_MODE_SHIFT
TMC4331_POL_DIR_IN_MASK
TMC4331_POL_DIR_IN_SHIFT
TMC4331_SD_INDIRECT_CONTROL_MASK
TMC4331_SD_INDIRECT_CONTROL_SHIFT
TMC4331_STDBY_CLK_PIN_ASSIGNMENT_MASK
TMC4331_STDBY_CLK_PIN_ASSIGNMENT_SHIFT
TMC4331_INTR_POL_MASK
TMC4331_INTR_POL_SHIFT
TMC4331_INVERT_POL_TARGET_REACHED_MASK
TMC4331_INVERT_POL_TARGET_REACHED_SHIFT
TMC4331_FS_EN_MASK
TMC4331_FS_EN_SHIFT
TMC4331_FS_SDOUT_MASK
TMC4331_FS_SDOUT_SHIFT
TMC4331_DCSTEP_MODE_MASK
TMC4331_DCSTEP_MODE_SHIFT
TMC4331_PWM_OUT_EN_MASK
TMC4331_PWM_OUT_EN_SHIFT
TMC4331_AUTOMATIC_DIRECT_SDIN_SWITCH_OFF_MASK
TMC4331_AUTOMATIC_DIRECT_SDIN_SWITCH_OFF_SHIFT
TMC4331_CIRCULAR_CNT_AS_XLATCH_MASK
TMC4331_CIRCULAR_CNT_AS_XLATCH_SHIFT
TMC4331_REVERSE_MOTOR_DIR_MASK
TMC4331_REVERSE_MOTOR_DIR_SHIFT
TMC4331_INTR_TR_PU_PD_EN_MASK
TMC4331_INTR_TR_PU_PD_EN_SHIFT
TMC4331_INTR_AS_WIRED_AND_MASK
TMC4331_INTR_AS_WIRED_AND_SHIFT
TMC4331_TR_AS_WIRED_AND_MASK
TMC4331_TR_AS_WIRED_AND_SHIFT
TMC4331_STOP_LEFT_EN_MASK
TMC4331_STOP_LEFT_EN_SHIFT
TMC4331_STOP_RIGHT_EN_MASK
TMC4331_STOP_RIGHT_EN_SHIFT
TMC4331_POL_STOP_LEFT_MASK
TMC4331_POL_STOP_LEFT_SHIFT
TMC4331_POL_STOP_RIGHT_MASK
TMC4331_POL_STOP_RIGHT_SHIFT
TMC4331_INVERT_STOP_DIRECTION_MASK
TMC4331_INVERT_STOP_DIRECTION_SHIFT
TMC4331_SOFT_STOP_EN_MASK
TMC4331_SOFT_STOP_EN_SHIFT
TMC4331_VIRTUAL_LEFT_LIMIT_EN_MASK
TMC4331_VIRTUAL_LEFT_LIMIT_EN_SHIFT
TMC4331_VIRTUAL_RIGHT_LIMIT_EN_MASK
TMC4331_VIRTUAL_RIGHT_LIMIT_EN_SHIFT
TMC4331_VIRT_STOP_MODE_MASK
TMC4331_VIRT_STOP_MODE_SHIFT
TMC4331_LATCH_X_ON_INACTIVE_L_MASK
TMC4331_LATCH_X_ON_INACTIVE_L_SHIFT
TMC4331_LATCH_X_ON_ACTIVE_L_MASK
TMC4331_LATCH_X_ON_ACTIVE_L_SHIFT
TMC4331_LATCH_X_ON_INACTIVE_R_MASK
TMC4331_LATCH_X_ON_INACTIVE_R_SHIFT
TMC4331_LATCH_X_ON_ACTIVE_R_MASK
TMC4331_LATCH_X_ON_ACTIVE_R_SHIFT
TMC4331_STOP_LEFT_IS_HOME_MASK
TMC4331_STOP_LEFT_IS_HOME_SHIFT
TMC4331_HOME_EVENT_MASK
TMC4331_HOME_EVENT_SHIFT
TMC4331_START_HOME_TRACKING_MASK
TMC4331_START_HOME_TRACKING_SHIFT
TMC4331_CLR_POS_AT_TARGET_MASK
TMC4331_CLR_POS_AT_TARGET_SHIFT
TMC4331_CIRCULAR_MOVEMENT_EN_MASK
TMC4331_CIRCULAR_MOVEMENT_EN_SHIFT
TMC4331_POS_COMP_OUTPUT_MASK
TMC4331_POS_COMP_OUTPUT_SHIFT
TMC4331_STOP_ON_STALL_MASK
TMC4331_STOP_ON_STALL_SHIFT
TMC4331_DRV_AFTER_STALL_MASK
TMC4331_DRV_AFTER_STALL_SHIFT
TMC4331_MODIFIED_POS_COPARE_MASK
TMC4331_MODIFIED_POS_COPARE_SHIFT
TMC4331_AUTOMATIC_COVER_MASK
TMC4331_AUTOMATIC_COVER_SHIFT
TMC4331_CIRCULAR_ENC_EN_MASK
TMC4331_CIRCULAR_ENC_EN_SHIFT
TMC4331_START_EN0_MASK
TMC4331_START_EN0_SHIFT
TMC4331_START_EN1_MASK
TMC4331_START_EN1_SHIFT
TMC4331_START_EN2_MASK
TMC4331_START_EN2_SHIFT
TMC4331_START_EN3_MASK
TMC4331_START_EN3_SHIFT
TMC4331_START_EN4_MASK
TMC4331_START_EN4_SHIFT
TMC4331_TRIGGER_EVENTS0_MASK
TMC4331_TRIGGER_EVENTS0_SHIFT
TMC4331_TRIGGER_EVENTS1_MASK
TMC4331_TRIGGER_EVENTS1_SHIFT
TMC4331_TRIGGER_EVENTS2_MASK
TMC4331_TRIGGER_EVENTS2_SHIFT
TMC4331_TRIGGER_EVENTS3_MASK
TMC4331_TRIGGER_EVENTS3_SHIFT
TMC4331_POL_START_SIGNAL_MASK
TMC4331_POL_START_SIGNAL_SHIFT
TMC4331_IMMEDIATE_START_IN_MASK
TMC4331_IMMEDIATE_START_IN_SHIFT
TMC4331_BUSY_STATE_EN_MASK
TMC4331_BUSY_STATE_EN_SHIFT
TMC4331_PIPELINE_EN0_MASK
TMC4331_PIPELINE_EN0_SHIFT
TMC4331_PIPELINE_EN1_MASK
TMC4331_PIPELINE_EN1_SHIFT
TMC4331_PIPELINE_EN2_MASK
TMC4331_PIPELINE_EN2_SHIFT
TMC4331_PIPELINE_EN3_MASK
TMC4331_PIPELINE_EN3_SHIFT
TMC4331_SHADOW_OPTION_MASK
TMC4331_SHADOW_OPTION_SHIFT
TMC4331_CYCLIC_SHADOW_REGS_MASK
TMC4331_CYCLIC_SHADOW_REGS_SHIFT
TMC4331_SHADOW_MISS_CNT_MASK
TMC4331_SHADOW_MISS_CNT_SHIFT
TMC4331_XPIPE_REWRITE_REG0_MASK
TMC4331_XPIPE_REWRITE_REG0_SHIFT
TMC4331_XPIPE_REWRITE_REG1_MASK
TMC4331_XPIPE_REWRITE_REG1_SHIFT
TMC4331_XPIPE_REWRITE_REG2_MASK
TMC4331_XPIPE_REWRITE_REG2_SHIFT
TMC4331_XPIPE_REWRITE_REG3_MASK
TMC4331_XPIPE_REWRITE_REG3_SHIFT
TMC4331_XPIPE_REWRITE_REG4_MASK
TMC4331_XPIPE_REWRITE_REG4_SHIFT
TMC4331_XPIPE_REWRITE_REG5_MASK
TMC4331_XPIPE_REWRITE_REG5_SHIFT
TMC4331_XPIPE_REWRITE_REG6_MASK
TMC4331_XPIPE_REWRITE_REG6_SHIFT
TMC4331_XPIPE_REWRITE_REG7_MASK
TMC4331_XPIPE_REWRITE_REG7_SHIFT
TMC4331_SR_SD_IN_MASK
TMC4331_SR_SD_IN_SHIFT
TMC4331_FILT_L_SD_IN_MASK
TMC4331_FILT_L_SD_IN_SHIFT
TMC4331_SR_REF_MASK
TMC4331_SR_REF_SHIFT
TMC4331_FILT_L_REF_MASK
TMC4331_FILT_L_REF_SHIFT
TMC4331_SR_S_MASK
TMC4331_SR_S_SHIFT
TMC4331_FILT_L_S_MASK
TMC4331_FILT_L_S_SHIFT
TMC4331_SPI_OUTPUT_FORMAT_MASK
TMC4331_SPI_OUTPUT_FORMAT_SHIFT
TMC4331_MIXED_DECAY_MASK
TMC4331_MIXED_DECAY_SHIFT
TMC4331_AUTO_DOUBLE_CHOPSYNC_MASK
TMC4331_AUTO_DOUBLE_CHOPSYNC_SHIFT
TMC4331_MIXED_DECAY_MASK
TMC4331_MIXED_DECAY_SHIFT
TMC4331_STDBY_ON_STALL_FOR_24X_MASK
TMC4331_STDBY_ON_STALL_FOR_24X_SHIFT
TMC4331_STALL_FLAG_INSTEAD_OF_UV_EN_MASK
TMC4331_STALL_FLAG_INSTEAD_OF_UV_EN_SHIFT
TMC4331_STALL_LOAD_LIMIT_MASK
TMC4331_STALL_LOAD_LIMIT_SHIFT
TMC4331_PWM_PHASE_SHFT_EN_MASK
TMC4331_PWM_PHASE_SHFT_EN_SHIFT
TMC4331_AUTO_DOUBLE_CHOPSYNC_MASK
TMC4331_AUTO_DOUBLE_CHOPSYNC_SHIFT
TMC4331_THREE_PHASE_STEPPER_EN_MASK
TMC4331_THREE_PHASE_STEPPER_EN_SHIFT
TMC4331_AUTOREPEAT_COVER_EN_MASK
TMC4331_AUTOREPEAT_COVER_EN_SHIFT
TMC4331_COVER_DONE_ONLY_FOR_COVER_MASK
TMC4331_COVER_DONE_ONLY_FOR_COVER_SHIFT
TMC4331_SCALE_VALE_TRANSFER_EN_MASK
TMC4331_SCALE_VALE_TRANSFER_EN_SHIFT
TMC4331_DISABLE_POLLING_MASK
TMC4331_DISABLE_POLLING_SHIFT
TMC4331_AUTOREPEAT_COVER_EN_MASK
TMC4331_AUTOREPEAT_COVER_EN_SHIFT
TMC4331_POLL_BLOCK_EXP_MASK
TMC4331_POLL_BLOCK_EXP_SHIFT
TMC4331_COVER_DONE_ONLY_FOR_COVER_MASK
TMC4331_COVER_DONE_ONLY_FOR_COVER_SHIFT
TMC4331_SCALE_VALE_TRANSFER_EN_MASK
TMC4331_SCALE_VALE_TRANSFER_EN_SHIFT
TMC4331_DISABLE_POLLING_MASK
TMC4331_DISABLE_POLLING_SHIFT
TMC4331_AUTOREPEAT_COVER_EN_MASK
TMC4331_AUTOREPEAT_COVER_EN_SHIFT
TMC4331_POLL_BLOCK_EXP_MASK
TMC4331_POLL_BLOCK_EXP_SHIFT
TMC4331_COVER_DONE_ONLY_FOR_COVER_MASK
TMC4331_COVER_DONE_ONLY_FOR_COVER_SHIFT
TMC4331_DISABLE_POLLING_MASK
TMC4331_DISABLE_POLLING_SHIFT
TMC4331_AUTOREPEAT_COVER_EN_MASK
TMC4331_AUTOREPEAT_COVER_EN_SHIFT
TMC4331_POLL_BLOCK_EXP_MASK
TMC4331_POLL_BLOCK_EXP_SHIFT
TMC4331_COVER_DONE_ONLY_FOR_COVER_MASK
TMC4331_COVER_DONE_ONLY_FOR_COVER_SHIFT
TMC4331_SCK_LOW_BEFORE_CSN_MASK
TMC4331_SCK_LOW_BEFORE_CSN_SHIFT
TMC4331_NEW_OUT_BIT_AT_RISE_MASK
TMC4331_NEW_OUT_BIT_AT_RISE_SHIFT
TMC4331_DAC_CMD_LENGTH_MASK
TMC4331_DAC_CMD_LENGTH_SHIFT
TMC4331_SCK_LOW_BEFORE_CSN_MASK
TMC4331_SCK_LOW_BEFORE_CSN_SHIFT
TMC4331_NEW_OUT_BIT_AT_RISE_MASK
TMC4331_NEW_OUT_BIT_AT_RISE_SHIFT
TMC4331_COVER_DATA_LENGTH_MASK
TMC4331_COVER_DATA_LENGTH_SHIFT
TMC4331_SPI_OUT_LOW_TIME_MASK
TMC4331_SPI_OUT_LOW_TIME_SHIFT
TMC4331_SPI_OUT_HIGH_TIME_MASK
TMC4331_SPI_OUT_HIGH_TIME_SHIFT
TMC4331_HOLD_CURRENT_SCALE_EN_MASK
TMC4331_HOLD_CURRENT_SCALE_EN_SHIFT
TMC4331_DRIVE_CURRENT_SCALE_EN_MASK
TMC4331_DRIVE_CURRENT_SCALE_EN_SHIFT
TMC4331_BOOST_CURRENT_ON_ACC_EN_MASK
TMC4331_BOOST_CURRENT_ON_ACC_EN_SHIFT
TMC4331_BOOST_CURRENT_ON_DEC_EN_MASK
TMC4331_BOOST_CURRENT_ON_DEC_EN_SHIFT
TMC4331_BOOST_CURRENT_AFTER_START_EN_MASK
TMC4331_BOOST_CURRENT_AFTER_START_EN_SHIFT
TMC4331_SEC_DRIVE_CURRENT_SCALE_EN_MASK
TMC4331_SEC_DRIVE_CURRENT_SCALE_EN_SHIFT
TMC4331_FREEWHEELING_EN_MASK
TMC4331_FREEWHEELING_EN_SHIFT
TMC4331_HOLD_CURRENT_SCALE_EN_MASK
TMC4331_HOLD_CURRENT_SCALE_EN_SHIFT
TMC4331_PWM_SCALE_EN_MASK
TMC4331_PWM_SCALE_EN_SHIFT
TMC4331_PWM_AMPL_MASK
TMC4331_PWM_AMPL_SHIFT
TMC4331_BOOST_SCALE_VAL_MASK
TMC4331_BOOST_SCALE_VAL_SHIFT
TMC4331_DRV1_SCALE_VAL_MASK
TMC4331_DRV1_SCALE_VAL_SHIFT
TMC4331_DRV2_SCALE_VAL_MASK
TMC4331_DRV2_SCALE_VAL_SHIFT
TMC4331_HOLD_SCALE_VAL_MASK
TMC4331_HOLD_SCALE_VAL_SHIFT
TMC4331_MSTEP_PER_FS_MASK
TMC4331_MSTEP_PER_FS_SHIFT
TMC4331_FS_PER_REV_MASK
TMC4331_FS_PER_REV_SHIFT
TMC4331_SG_MASK
TMC4331_SG_SHIFT
TMC4331_OT_MASK
TMC4331_OT_SHIFT
TMC4331_OTPW_MASK
TMC4331_OTPW_SHIFT
TMC4331_S2GA_MASK
TMC4331_S2GA_SHIFT
TMC4331_S2GB_MASK
TMC4331_S2GB_SHIFT
TMC4331_OLA_MASK
TMC4331_OLA_SHIFT
TMC4331_OLB_MASK
TMC4331_OLB_SHIFT
TMC4331_STST_MASK
TMC4331_STST_SHIFT
TMC4331_SG_MASK
TMC4331_SG_SHIFT
TMC4331_UV_SF_MASK
TMC4331_UV_SF_SHIFT
TMC4331_UV_SF_MASK
TMC4331_UV_SF_SHIFT
TMC4331_OT_MASK
TMC4331_OT_SHIFT
TMC4331_OTPW_MASK
TMC4331_OTPW_SHIFT
TMC4331_OCA_MASK
TMC4331_OCA_SHIFT
TMC4331_OCB_MASK
TMC4331_OCB_SHIFT
TMC4331_OLA_MASK
TMC4331_OLA_SHIFT
TMC4331_OLB_MASK
TMC4331_OLB_SHIFT
TMC4331_OCHS_MASK
TMC4331_OCHS_SHIFT
TMC4331_TARGET_REACHED_MASK
TMC4331_TARGET_REACHED_SHIFT
TMC4331_POS_COMP_REACHED_MASK
TMC4331_POS_COMP_REACHED_SHIFT
TMC4331_VEL_REACHED_MASK
TMC4331_VEL_REACHED_SHIFT
TMC4331_VEL_STATE_00_MASK
TMC4331_VEL_STATE_00_SHIFT
TMC4331_VEL_STATE_01_MASK
TMC4331_VEL_STATE_01_SHIFT
TMC4331_VEL_STATE_10_MASK
TMC4331_VEL_STATE_10_SHIFT
TMC4331_RAMP_STATE_00_MASK
TMC4331_RAMP_STATE_00_SHIFT
TMC4331_RAMP_STATE_01_MASK
TMC4331_RAMP_STATE_01_SHIFT
TMC4331_RAMP_STATE_10_MASK
TMC4331_RAMP_STATE_10_SHIFT
TMC4331_MAX_PHASE_TRAP_MASK
TMC4331_MAX_PHASE_TRAP_SHIFT
TMC4331_STOPL_EVENT_MASK
TMC4331_STOPL_EVENT_SHIFT
TMC4331_STOPR_EVENT_MASK
TMC4331_STOPR_EVENT_SHIFT
TMC4331_VSTOPL_ACTIVE_MASK
TMC4331_VSTOPL_ACTIVE_SHIFT
TMC4331_HOME_ERROR_MASK
TMC4331_HOME_ERROR_SHIFT
TMC4331_XLATCH_DONE_MASK
TMC4331_XLATCH_DONE_SHIFT
TMC4331_FS_ACTIVE_MASK
TMC4331_FS_ACTIVE_SHIFT
TMC4331_COVER_DONE_MASK
TMC4331_COVER_DONE_SHIFT
TMC4331_MOTOR_EV_MASK
TMC4331_MOTOR_EV_SHIFT
TMC4331_RST_EV_MASK
TMC4331_RST_EV_SHIFT
TMC4331_TARGET_REACHED_MASK
TMC4331_TARGET_REACHED_SHIFT
TMC4331_POS_COMP_REACHED_MASK
TMC4331_POS_COMP_REACHED_SHIFT
TMC4331_VEL_REACHED_MASK
TMC4331_VEL_REACHED_SHIFT
TMC4331_VEL_STATE_00_MASK
TMC4331_VEL_STATE_00_SHIFT
TMC4331_VEL_STATE_01_MASK
TMC4331_VEL_STATE_01_SHIFT
TMC4331_VEL_STATE_10_MASK
TMC4331_VEL_STATE_10_SHIFT
TMC4331_RAMP_STATE_00_MASK
TMC4331_RAMP_STATE_00_SHIFT
TMC4331_RAMP_STATE_01_MASK
TMC4331_RAMP_STATE_01_SHIFT
TMC4331_RAMP_STATE_10_MASK
TMC4331_RAMP_STATE_10_SHIFT
TMC4331_MAX_PHASE_TRAP_MASK
TMC4331_MAX_PHASE_TRAP_SHIFT
TMC4331_STOPL_EVENT_MASK
TMC4331_STOPL_EVENT_SHIFT
TMC4331_STOPR_EVENT_MASK
TMC4331_STOPR_EVENT_SHIFT
TMC4331_VSTOPL_ACTIVE_MASK
TMC4331_VSTOPL_ACTIVE_SHIFT
TMC4331_HOME_ERROR_MASK
TMC4331_HOME_ERROR_SHIFT
TMC4331_XLATCH_DONE_MASK
TMC4331_XLATCH_DONE_SHIFT
TMC4331_FS_ACTIVE_MASK
TMC4331_FS_ACTIVE_SHIFT
TMC4331_COVER_DONE_MASK
TMC4331_COVER_DONE_SHIFT
TMC4331_MOTOR_EV_MASK
TMC4331_MOTOR_EV_SHIFT
TMC4331_RST_EV_MASK
TMC4331_RST_EV_SHIFT
TMC4331_TARGET_REACHED_MASK
TMC4331_TARGET_REACHED_SHIFT
TMC4331_POS_COMP_REACHED_MASK
TMC4331_POS_COMP_REACHED_SHIFT
TMC4331_VEL_REACHED_MASK
TMC4331_VEL_REACHED_SHIFT
TMC4331_VEL_STATE_00_MASK
TMC4331_VEL_STATE_00_SHIFT
TMC4331_VEL_STATE_01_MASK
TMC4331_VEL_STATE_01_SHIFT
TMC4331_VEL_STATE_10_MASK
TMC4331_VEL_STATE_10_SHIFT
TMC4331_RAMP_STATE_00_MASK
TMC4331_RAMP_STATE_00_SHIFT
TMC4331_RAMP_STATE_01_MASK
TMC4331_RAMP_STATE_01_SHIFT
TMC4331_RAMP_STATE_10_MASK
TMC4331_RAMP_STATE_10_SHIFT
TMC4331_MAX_PHASE_TRAP_MASK
TMC4331_MAX_PHASE_TRAP_SHIFT
TMC4331_STOPL_EVENT_MASK
TMC4331_STOPL_EVENT_SHIFT
TMC4331_STOPR_EVENT_MASK
TMC4331_STOPR_EVENT_SHIFT
TMC4331_VSTOPL_ACTIVE_MASK
TMC4331_VSTOPL_ACTIVE_SHIFT
TMC4331_HOME_ERROR_MASK
TMC4331_HOME_ERROR_SHIFT
TMC4331_XLATCH_DONE_MASK
TMC4331_XLATCH_DONE_SHIFT
TMC4331_FS_ACTIVE_MASK
TMC4331_FS_ACTIVE_SHIFT
TMC4331_COVER_DONE_MASK
TMC4331_COVER_DONE_SHIFT
TMC4331_MOTOR_EV_MASK
TMC4331_MOTOR_EV_SHIFT
TMC4331_RST_EV_MASK
TMC4331_RST_EV_SHIFT
TMC4331_TARGET_REACHED_MASK
TMC4331_TARGET_REACHED_SHIFT
TMC4331_POS_COMP_REACHED_MASK
TMC4331_POS_COMP_REACHED_SHIFT
TMC4331_VEL_REACHED_MASK
TMC4331_VEL_REACHED_SHIFT
TMC4331_VEL_STATE_00_MASK
TMC4331_VEL_STATE_00_SHIFT
TMC4331_VEL_STATE_01_MASK
TMC4331_VEL_STATE_01_SHIFT
TMC4331_VEL_STATE_10_MASK
TMC4331_VEL_STATE_10_SHIFT
TMC4331_RAMP_STATE_00_MASK
TMC4331_RAMP_STATE_00_SHIFT
TMC4331_RAMP_STATE_01_MASK
TMC4331_RAMP_STATE_01_SHIFT
TMC4331_RAMP_STATE_10_MASK
TMC4331_RAMP_STATE_10_SHIFT
TMC4331_MAX_PHASE_TRAP_MASK
TMC4331_MAX_PHASE_TRAP_SHIFT
TMC4331_STOPL_EVENT_MASK
TMC4331_STOPL_EVENT_SHIFT
TMC4331_STOPR_EVENT_MASK
TMC4331_STOPR_EVENT_SHIFT
TMC4331_VSTOPL_ACTIVE_MASK
TMC4331_VSTOPL_ACTIVE_SHIFT
TMC4331_HOME_ERROR_MASK
TMC4331_HOME_ERROR_SHIFT
TMC4331_XLATCH_DONE_MASK
TMC4331_XLATCH_DONE_SHIFT
TMC4331_FS_ACTIVE_MASK
TMC4331_FS_ACTIVE_SHIFT
TMC4331_COVER_DONE_MASK
TMC4331_COVER_DONE_SHIFT
TMC4331_MOTOR_EV_MASK
TMC4331_MOTOR_EV_SHIFT
TMC4331_RST_EV_MASK
TMC4331_RST_EV_SHIFT
TMC4331_TARGET_REACHED_F_MASK
TMC4331_TARGET_REACHED_F_SHIFT
TMC4331_POS_COMP_REACHED_F_MASK
TMC4331_POS_COMP_REACHED_F_SHIFT
TMC4331_VEL_REACHED_F_MASK
TMC4331_VEL_REACHED_F_SHIFT
TMC4331_VEL_STATE_F_MASK
TMC4331_VEL_STATE_F_SHIFT
TMC4331_RAMP_STATE_F_MASK
TMC4331_RAMP_STATE_F_SHIFT
TMC4331_STOPL_ACTIVE_F_MASK
TMC4331_STOPL_ACTIVE_F_SHIFT
TMC4331_STOPR_ACTIVE_F_MASK
TMC4331_STOPR_ACTIVE_F_SHIFT
TMC4331_VSTOPL_ACTIVE_F_MASK
TMC4331_VSTOPL_ACTIVE_F_SHIFT
TMC4331_VSTOPR_ACTIVE_F_MASK
TMC4331_VSTOPR_ACTIVE_F_SHIFT
TMC4331_ACTIVE_STALL_F_MASK
TMC4331_ACTIVE_STALL_F_SHIFT
TMC4331_HOME_ERROR_F_MASK
TMC4331_HOME_ERROR_F_SHIFT
TMC4331_FS_ACTIVE_F_MASK
TMC4331_FS_ACTIVE_F_SHIFT
TMC4331_STP_LENGTH_ADD_MASK
TMC4331_STP_LENGTH_ADD_SHIFT
TMC4331_DIR_SETUP_TIME_MASK
TMC4331_DIR_SETUP_TIME_SHIFT
TMC4331_START_OUT_ADD_MASK
TMC4331_START_OUT_ADD_SHIFT
TMC4331_GEAR_RATIO_MASK
TMC4331_GEAR_RATIO_SHIFT
TMC4331_START_DELAY_MASK
TMC4331_START_DELAY_SHIFT
TMC4331_CLK_GATING_DELAY_MASK
TMC4331_CLK_GATING_DELAY_SHIFT
TMC4331_STDBY_DELAY_MASK
TMC4331_STDBY_DELAY_SHIFT
TMC4331_FREEWHEEL_DELAY_MASK
TMC4331_FREEWHEEL_DELAY_SHIFT
TMC4331_VDRV_SCALE_LIMIT_MASK
TMC4331_VDRV_SCALE_LIMIT_SHIFT
TMC4331_PWM_VMAX_MASK
TMC4331_PWM_VMAX_SHIFT
TMC4331_UP_SCALE_DELAY_MASK
TMC4331_UP_SCALE_DELAY_SHIFT
TMC4331_HOLD_SCALE_DELAY_MASK
TMC4331_HOLD_SCALE_DELAY_SHIFT
TMC4331_DRV_SCALE_DELAY_MASK
TMC4331_DRV_SCALE_DELAY_SHIFT
TMC4331_BOOST_TIME_MASK
TMC4331_BOOST_TIME_SHIFT
TMC4331_SPI_SWITCH_VEL_MASK
TMC4331_SPI_SWITCH_VEL_SHIFT
TMC4331_DAC_ADDR_A_MASK
TMC4331_DAC_ADDR_A_SHIFT
TMC4331_DAC_ADDR_B_MASK
TMC4331_DAC_ADDR_B_SHIFT
TMC4331_HOME_SAFETY_MARGIN_MASK
TMC4331_HOME_SAFETY_MARGIN_SHIFT
TMC4331_PWM_FREQ_MASK
TMC4331_PWM_FREQ_SHIFT
TMC4331_CHOPSYNC_DIV_MASK
TMC4331_CHOPSYNC_DIV_SHIFT
TMC4331_OPERATION_MODE_MASK
TMC4331_OPERATION_MODE_SHIFT
TMC4331_RAMP_PROFILE_MASK
TMC4331_RAMP_PROFILE_SHIFT
TMC4331_XACTUAL_MASK
TMC4331_XACTUAL_SHIFT
TMC4331_VACTUAL_MASK
TMC4331_VACTUAL_SHIFT
TMC4331_AACTUAL_MASK
TMC4331_AACTUAL_SHIFT
TMC4331_VMAX_MASK
TMC4331_VMAX_SHIFT
TMC4331_VMAX_MASK
TMC4331_VMAX_SHIFT
TMC4331_VSTART_MASK
TMC4331_VSTART_SHIFT
TMC4331_VSTOP_MASK
TMC4331_VSTOP_SHIFT
TMC4331_VSTOP_MASK
TMC4331_VSTOP_SHIFT
TMC4331_VBREAK_MASK
TMC4331_VBREAK_SHIFT
TMC4331_FREQUENCY_MODE_MASK
TMC4331_FREQUENCY_MODE_SHIFT
TMC4331_DIRECT_MODE_MASK
TMC4331_DIRECT_MODE_SHIFT
TMC4331_FREQUENCY_MODE_MASK
TMC4331_FREQUENCY_MODE_SHIFT
TMC4331_DIRECT_MODE_MASK
TMC4331_DIRECT_MODE_SHIFT
TMC4331_FREQUENCY_MODE_MASK
TMC4331_FREQUENCY_MODE_SHIFT
TMC4331_SIGN_AACT_MASK
TMC4331_SIGN_AACT_SHIFT
TMC4331_DIRECT_MODE_MASK
TMC4331_DIRECT_MODE_SHIFT
TMC4331_SIGN_AACT_MASK
TMC4331_SIGN_AACT_SHIFT
TMC4331_FREQUENCY_MODE_MASK
TMC4331_FREQUENCY_MODE_SHIFT
TMC4331_DIRECT_MODE_MASK
TMC4331_DIRECT_MODE_SHIFT
TMC4331_FREQUENCY_MODE_MASK
TMC4331_FREQUENCY_MODE_SHIFT
TMC4331_DIRECT_MODE_MASK
TMC4331_DIRECT_MODE_SHIFT
TMC4331_FREQUENCY_MODE_MASK
TMC4331_FREQUENCY_MODE_SHIFT
TMC4331_DIRECT_MODE_MASK
TMC4331_DIRECT_MODE_SHIFT
TMC4331_FREQUENCY_MODE_MASK
TMC4331_FREQUENCY_MODE_SHIFT
TMC4331_DIRECT_MODE_MASK
TMC4331_DIRECT_MODE_SHIFT
TMC4331_FREQUENCY_MODE_MASK
TMC4331_FREQUENCY_MODE_SHIFT
TMC4331_DIRECT_MODE_MASK
TMC4331_DIRECT_MODE_SHIFT
TMC4331_FREQUENCY_MODE_MASK
TMC4331_FREQUENCY_MODE_SHIFT
TMC4331_DIRECT_MODE_MASK
TMC4331_DIRECT_MODE_SHIFT
TMC4331_CLK_FREQ_MASK
TMC4331_CLK_FREQ_SHIFT
TMC4331_POS_COMP_MASK
TMC4331_POS_COMP_SHIFT
TMC4331_VIRT_STOP_LEFT_MASK
TMC4331_VIRT_STOP_LEFT_SHIFT
TMC4331_VIRT_STOP_RIGHT_MASK
TMC4331_VIRT_STOP_RIGHT_SHIFT
TMC4331_X_HOME_MASK
TMC4331_X_HOME_SHIFT
TMC4331_X_LATCH_MASK
TMC4331_X_LATCH_SHIFT
TMC4331_REV_CNT_MASK
TMC4331_REV_CNT_SHIFT
TMC4331_X_RANGE_MASK
TMC4331_X_RANGE_SHIFT
TMC4331_XTARGET_MASK
TMC4331_XTARGET_SHIFT
TMC4331_X_PIPE0_MASK
TMC4331_X_PIPE0_SHIFT
TMC4331_X_PIPE1_MASK
TMC4331_X_PIPE1_SHIFT
TMC4331_X_PIPE2_MASK
TMC4331_X_PIPE2_SHIFT
TMC4331_X_PIPE3_MASK
TMC4331_X_PIPE3_SHIFT
TMC4331_X_PIPE4_MASK
TMC4331_X_PIPE4_SHIFT
TMC4331_X_PIPE5_MASK
TMC4331_X_PIPE5_SHIFT
TMC4331_X_PIPE6_MASK
TMC4331_X_PIPE6_SHIFT
TMC4331_X_PIPE7_MASK
TMC4331_X_PIPE7_SHIFT
TMC4331_SH_REG0_VMAX_MASK
TMC4331_SH_REG0_VMAX_SHIFT
TMC4331_SH_REG1_AMAX_MASK
TMC4331_SH_REG1_AMAX_SHIFT
TMC4331_SH_REG1_AMAX_MASK
TMC4331_SH_REG1_AMAX_SHIFT
TMC4331_SH_REG2_DMAX_MASK
TMC4331_SH_REG2_DMAX_SHIFT
TMC4331_SH_REG2_DMAX_MASK
TMC4331_SH_REG2_DMAX_SHIFT
TMC4331_SH_REG3_ASTART_MASK
TMC4331_SH_REG3_ASTART_SHIFT
TMC4331_SH_REG3_ASTART_MASK
TMC4331_SH_REG3_ASTART_SHIFT
TMC4331_SH_REG3_BOW1_MASK
TMC4331_SH_REG3_BOW1_SHIFT
TMC4331_SH_REG3_BOW1_MASK
TMC4331_SH_REG3_BOW1_SHIFT
TMC4331_SH_REG3_ASTART_MASK
TMC4331_SH_REG3_ASTART_SHIFT
TMC4331_SH_REG3_ASTART_MASK
TMC4331_SH_REG3_ASTART_SHIFT
TMC4331_SH_REG4_DFINAL_MASK
TMC4331_SH_REG4_DFINAL_SHIFT
TMC4331_SH_REG4_DFINAL_MASK
TMC4331_SH_REG4_DFINAL_SHIFT
TMC4331_SH_REG4_BOW2_MASK
TMC4331_SH_REG4_BOW2_SHIFT
TMC4331_SH_REG4_BOW2_MASK
TMC4331_SH_REG4_BOW2_SHIFT
TMC4331_SH_REG4_DFINAL_MASK
TMC4331_SH_REG4_DFINAL_SHIFT
TMC4331_SH_REG4_DFINAL_MASK
TMC4331_SH_REG4_DFINAL_SHIFT
TMC4331_SH_REG5_VBREAK_MASK
TMC4331_SH_REG5_VBREAK_SHIFT
TMC4331_SH_REG5_BOW3_MASK
TMC4331_SH_REG5_BOW3_SHIFT
TMC4331_SH_REG5_BOW3_MASK
TMC4331_SH_REG5_BOW3_SHIFT
TMC4331_SH_REG5_VBREAK_MASK
TMC4331_SH_REG5_VBREAK_SHIFT
TMC4331_SH_REG6_VSTART_MASK
TMC4331_SH_REG6_VSTART_SHIFT
TMC4331_SH_REG6_BOW4_MASK
TMC4331_SH_REG6_BOW4_SHIFT
TMC4331_SH_REG6_BOW4_MASK
TMC4331_SH_REG6_BOW4_SHIFT
TMC4331_SH_REG6_VSTART_MASK
TMC4331_SH_REG6_VSTART_SHIFT
TMC4331_SH_REG6_VSTOP_MASK
TMC4331_SH_REG6_VSTOP_SHIFT
TMC4331_SH_REG7_VSTOP_MASK
TMC4331_SH_REG7_VSTOP_SHIFT
TMC4331_SH_REG7_VMAX_MASK
TMC4331_SH_REG7_VMAX_SHIFT
TMC4331_SH_REG8_BOW1_MASK
TMC4331_SH_REG8_BOW1_SHIFT
TMC4331_SH_REG8_BOW1_MASK
TMC4331_SH_REG8_BOW1_SHIFT
TMC4331_SH_REG8_AMAX_MASK
TMC4331_SH_REG8_AMAX_SHIFT
TMC4331_SH_REG8_AMAX_MASK
TMC4331_SH_REG8_AMAX_SHIFT
TMC4331_SH_REG9_BOW2_MASK
TMC4331_SH_REG9_BOW2_SHIFT
TMC4331_SH_REG9_BOW2_MASK
TMC4331_SH_REG9_BOW2_SHIFT
TMC4331_SH_REG9_DMAX_MASK
TMC4331_SH_REG9_DMAX_SHIFT
TMC4331_SH_REG9_DMAX_MASK
TMC4331_SH_REG9_DMAX_SHIFT
TMC4331_SH_REG10_BOW3_MASK
TMC4331_SH_REG10_BOW3_SHIFT
TMC4331_SH_REG10_BOW3_MASK
TMC4331_SH_REG10_BOW3_SHIFT
TMC4331_SH_REG10_BOW1_MASK
TMC4331_SH_REG10_BOW1_SHIFT
TMC4331_SH_REG10_BOW1_MASK
TMC4331_SH_REG10_BOW1_SHIFT
TMC4331_SH_REG10_ASTART_MASK
TMC4331_SH_REG10_ASTART_SHIFT
TMC4331_SH_REG10_ASTART_MASK
TMC4331_SH_REG10_ASTART_SHIFT
TMC4331_SH_REG11_BOW4_MASK
TMC4331_SH_REG11_BOW4_SHIFT
TMC4331_SH_REG11_BOW4_MASK
TMC4331_SH_REG11_BOW4_SHIFT
TMC4331_SH_REG11_BOW2_MASK
TMC4331_SH_REG11_BOW2_SHIFT
TMC4331_SH_REG11_BOW2_MASK
TMC4331_SH_REG11_BOW2_SHIFT
TMC4331_SH_REG11_DFINAL_MASK
TMC4331_SH_REG11_DFINAL_SHIFT
TMC4331_SH_REG11_DFINAL_MASK
TMC4331_SH_REG11_DFINAL_SHIFT
TMC4331_OPERATION_MODE_MASK
TMC4331_OPERATION_MODE_SHIFT
TMC4331_RAMP_PROFILE_MASK
TMC4331_RAMP_PROFILE_SHIFT
TMC4331_SH_REG12_BOW3_MASK
TMC4331_SH_REG12_BOW3_SHIFT
TMC4331_SH_REG12_BOW3_MASK
TMC4331_SH_REG12_BOW3_SHIFT
TMC4331_SH_REG12_VBREAK_MASK
TMC4331_SH_REG12_VBREAK_SHIFT
TMC4331_SH_REG13_BOW4_MASK
TMC4331_SH_REG13_BOW4_SHIFT
TMC4331_SH_REG13_BOW4_MASK
TMC4331_SH_REG13_BOW4_SHIFT
TMC4331_SH_REG13_VSTART_MASK
TMC4331_SH_REG13_VSTART_SHIFT
TMC4331_SH_REG13_VSTOP_MASK
TMC4331_SH_REG13_VSTOP_SHIFT
TMC4331_CLK_GATING_REG_MASK
TMC4331_CLK_GATING_REG_SHIFT
TMC4331_RESET_REG_MASK
TMC4331_RESET_REG_SHIFT
TMC4331_FS_VEL_MASK
TMC4331_FS_VEL_SHIFT
TMC4331_DC_VEL_MASK
TMC4331_DC_VEL_SHIFT
TMC4331_DC_TIME_MASK
TMC4331_DC_TIME_SHIFT
TMC4331_DC_SG_MASK
TMC4331_DC_SG_SHIFT
TMC4331_DC_BLKTIME_MASK
TMC4331_DC_BLKTIME_SHIFT
TMC4331_DC_LSPTM_MASK
TMC4331_DC_LSPTM_SHIFT
TMC4331_VSTALL_LIMIT_MASK
TMC4331_VSTALL_LIMIT_SHIFT
TMC4331_POLLING_STATUS_MASK
TMC4331_POLLING_STATUS_SHIFT
TMC4331_COVER_LOW_MASK
TMC4331_COVER_LOW_SHIFT
TMC4331_POLLING_STATUS_MASK
TMC4331_POLLING_STATUS_SHIFT
TMC4331_COVER_LOW_MASK
TMC4331_COVER_LOW_SHIFT
TMC4331_POLLING_REG_GSTAT_MASK
TMC4331_POLLING_REG_GSTAT_SHIFT
TMC4331_POLLING_REG_PWM_SCALE_MASK
TMC4331_POLLING_REG_PWM_SCALE_SHIFT
TMC4331_POLLING_REG_LOST_STEPS_MASK
TMC4331_POLLING_REG_LOST_STEPS_SHIFT
TMC4331_COVER_HIGH_MASK
TMC4331_COVER_HIGH_SHIFT
TMC4331_POLLING_REG_GSTAT_MASK
TMC4331_POLLING_REG_GSTAT_SHIFT
TMC4331_POLLING_REG_PWM_SCALE_MASK
TMC4331_POLLING_REG_PWM_SCALE_SHIFT
TMC4331_POLLING_REG_LOST_STEPS_MASK
TMC4331_POLLING_REG_LOST_STEPS_SHIFT
TMC4331_COVER_HIGH_MASK
TMC4331_COVER_HIGH_SHIFT
TMC4331_COVER_DRV_LOW_MASK
TMC4331_COVER_DRV_LOW_SHIFT
TMC4331_COVER_DRV_HIGH_MASK
TMC4331_COVER_DRV_HIGH_SHIFT
TMC4331_MSLUT_0_MASK
TMC4331_MSLUT_0_SHIFT
TMC4331_MSLUT_1_MASK
TMC4331_MSLUT_1_SHIFT
TMC4331_MSLUT_2_MASK
TMC4331_MSLUT_2_SHIFT
TMC4331_MSLUT_3_MASK
TMC4331_MSLUT_3_SHIFT
TMC4331_MSLUT_4_MASK
TMC4331_MSLUT_4_SHIFT
TMC4331_MSLUT_5_MASK
TMC4331_MSLUT_5_SHIFT
TMC4331_MSLUT_6_MASK
TMC4331_MSLUT_6_SHIFT
TMC4331_MSLUT_7_MASK
TMC4331_MSLUT_7_SHIFT
TMC4331_MSLUTSEL_MASK
TMC4331_MSLUTSEL_SHIFT
TMC4331_MSCNT_MASK
TMC4331_MSCNT_SHIFT
TMC4331_MSOFFSET_MASK
TMC4331_MSOFFSET_SHIFT
TMC4331_CURRENTA_MASK
TMC4331_CURRENTA_SHIFT
TMC4331_CURRENTB_MASK
TMC4331_CURRENTB_SHIFT
TMC4331_CURRENTA_SPI_MASK
TMC4331_CURRENTA_SPI_SHIFT
TMC4331_CURRENTB_SPI_MASK
TMC4331_CURRENTB_SPI_SHIFT
TMC4331_TZEROWAIT_MASK
TMC4331_TZEROWAIT_SHIFT
TMC4331_SCALE_PARAM_MASK
TMC4331_SCALE_PARAM_SHIFT
TMC4331_CIRCULAR_DEC_MASK
TMC4331_CIRCULAR_DEC_SHIFT
TMC4331_START_SIN_MASK
TMC4331_START_SIN_SHIFT
TMC4331_START_SIN90_120_MASK
TMC4331_START_SIN90_120_SHIFT
TMC4331_DAC_OFFSET_MASK
TMC4331_DAC_OFFSET_SHIFT
TMC4331_DAC_OFFSET_MASK
TMC4331_DAC_OFFSET_SHIFT
TMC4331_VERSION_NO_MASK
TMC4331_VERSION_NO_SHIFT
file TMC4331_Register.h

Defines

TMC4331_GENERAL_CONF
TMC4331_REFERENCE_CONF
TMC4331_START_CONF
TMC4331_INPUT_FILT_CONF
TMC4331_SPIOUT_CONF
TMC4331_CURRENT_CONF
TMC4331_SCALE_VALUES
TMC4331_STEP_CONF
TMC4331_SPI_STATUS_SELECTION
TMC4331_EVENT_CLEAR_CONF
TMC4331_INTR_CONF
TMC4331_EVENTS
TMC4331_STATUS
TMC4331_STP_LENGTH_ADD
TMC4331_DIR_SETUP_TIME
TMC4331_START_OUT_ADD
TMC4331_GEAR_RATIO
TMC4331_START_DELAY
TMC4331_CLK_GATING_DELAY
TMC4331_STDBY_DELAY
TMC4331_FREEWHEEL_DELAY
TMC4331_VDRV_SCALE_LIMIT
TMC4331_PWM_VMAX
TMC4331_UP_SCALE_DELAY
TMC4331_HOLD_SCALE_DELAY
TMC4331_DRV_SCALE_DELAY
TMC4331_BOOST_TIME
TMC4331_DAC_ADDR_A
TMC4331_DAC_ADDR_B
TMC4331_SPI_SWITCH_VEL
TMC4331_HOME_SAFETY_MARGIN
TMC4331_PWM_FREQ
TMC4331_CHOPSYNC_DIV
TMC4331_RAMPMODE
TMC4331_XACTUAL
TMC4331_VACTUAL
TMC4331_AACTUAL
TMC4331_VMAX
TMC4331_VSTART
TMC4331_VSTOP
TMC4331_VBREAK
TMC4331_AMAX
TMC4331_DMAX
TMC4331_ASTART
TMC4331_SIGN_AACT
TMC4331_DFINAL
TMC4331_DSTOP
TMC4331_BOW1
TMC4331_BOW2
TMC4331_BOW3
TMC4331_BOW4
TMC4331_CLK_FREQ
TMC4331_POS_COMP
TMC4331_VIRT_STOP_LEFT
TMC4331_VIRT_STOP_RIGHT
TMC4331_X_HOME
TMC4331_X_LATCH_RD
TMC4331_REV_CNT_RD
TMC4331_X_RANGE_WR
TMC4331_X_TARGET
TMC4331_X_PIPE0
TMC4331_X_PIPE1
TMC4331_X_PIPE2
TMC4331_X_PIPE3
TMC4331_X_PIPE4
TMC4331_X_PIPE5
TMC4331_X_PIPE6
TMC4331_X_PIPE7
TMC4331_SH_REG0
TMC4331_SH_REG1
TMC4331_SH_REG2
TMC4331_SH_REG3
TMC4331_SH_REG4
TMC4331_SH_REG5
TMC4331_SH_REG6
TMC4331_SH_REG7
TMC4331_SH_REG8
TMC4331_SH_REG9
TMC4331_SH_REG10
TMC4331_SH_REG11
TMC4331_SH_REG12
TMC4331_SH_REG13
TMC4331_CLK_GATING_REG
TMC4331_RESET_REG
TMC4331_FS_VEL_WR
TMC4331_DC_VEL_WR
TMC4331_DC_TIME_WR
TMC4331_DC_SG_WR
TMC4331_DC_BLKTIME_WR
TMC4331_DC_LSPTM_WR
TMC4331_SYNCHRO_SET
TMC4331_VSTALL_LIMIT_WR
TMC4331_COVER_LOW_WR
TMC4331_POLLING_STATUS_RD
TMC4331_COVER_HIGH_WR
TMC4331_POLLING_REG_WR
TMC4331_COVER_DRV_LOW_RD
TMC4331_COVER_DRV_HIGH_RD
TMC4331_MSLUT_0_WR
TMC4331_MSLUT_1_WR
TMC4331_MSLUT_2_WR
TMC4331_MSLUT_3_WR
TMC4331_MSLUT_4_WR
TMC4331_MSLUT_5_WR
TMC4331_MSLUT_6_WR
TMC4331_MSLUT_7_WR
TMC4331_MSLUTSEL_WR
TMC4331_MSCNT_RD
TMC4331_MSOFFSET_WR
TMC4331_CURRENTA_RD
TMC4331_CURRENTB_RD
TMC4331_CURRENTA_SPI_RD
TMC4331_CURRENTB_SPI_RD
TMC4331_TZEROWAIT_WR
TMC4331_SCALE_PARAM_RD
TMC4331_CIRCULAR_DEC_WR
TMC4331_START_SIN_WR
TMC4331_START_SIN90_120_WR
TMC4331_DAC_OFFSET_WR
TMC4331_VERSION_NO_RD
TMC4331_SCALEVAL_BOOST(x)
TMC4331_SCALEVAL_DRV1(x)
TMC4331_SCALEVAL_DRV2(x)
TMC4331_SCALEVAL_HOLD(x)
file TMC4361A.c
#include “TMC4361A.h”

Functions

void tmc4361A_readWriteArray(uint8_t channel, uint8_t *data, size_t length)
void tmc4361A_writeDatagram(TMC4361ATypeDef *tmc4361A, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc4361A_writeInt(TMC4361ATypeDef *tmc4361A, uint8_t address, int32_t value)
int32_t tmc4361A_readInt(TMC4361ATypeDef *tmc4361A, uint8_t address)
void tmc4361A_readWriteCover(TMC4361ATypeDef *tmc4361A, uint8_t *data, size_t length)
void tmc4361A_init(TMC4361ATypeDef *tmc4361A, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
void tmc4361A_fillShadowRegisters(TMC4361ATypeDef *tmc4361A)
uint8_t tmc4361A_reset(TMC4361ATypeDef *tmc4361A)
uint8_t tmc4361A_restore(TMC4361ATypeDef *tmc4361A)
void tmc4361A_setRegisterResetState(TMC4361ATypeDef *tmc4361A, const int32_t *resetState)
void tmc4361A_setCallback(TMC4361ATypeDef *tmc4361A, tmc4361A_callback callback)
static void tmc4361A_writeConfiguration(TMC4361ATypeDef *tmc4361A)
void tmc4361A_periodicJob(TMC4361ATypeDef *tmc4361A, uint32_t tick)
void tmc4361A_rotate(TMC4361ATypeDef *tmc4361A, int32_t velocity)
void tmc4361A_right(TMC4361ATypeDef *tmc4361A, int32_t velocity)
void tmc4361A_left(TMC4361ATypeDef *tmc4361A, int32_t velocity)
void tmc4361A_stop(TMC4361ATypeDef *tmc4361A)
void tmc4361A_moveTo(TMC4361ATypeDef *tmc4361A, int32_t position, uint32_t velocityMax)
void tmc4361A_moveBy(TMC4361ATypeDef *tmc4361A, int32_t *ticks, uint32_t velocityMax)
int32_t tmc4361A_discardVelocityDecimals(int32_t value)
static uint8_t tmc4361A_moveToNextFullstep(TMC4361ATypeDef *tmc4361A)
uint8_t tmc4361A_calibrateClosedLoop(TMC4361ATypeDef *tmc4361A, uint8_t worker0master1)
file TMC4361A.h
#include “tmc/helpers/API_Header.h”
#include “TMC4361A_Register.h”
#include “TMC4361A_Constants.h”
#include “TMC4361A_Fields.h”

Defines

TMC4361A_FIELD_READ(tdef, address, mask, shift)
TMC4361A_FIELD_WRITE(tdef, address, mask, shift, value)
R10
R20

Typedefs

typedef void (*tmc4361A_callback)(TMC4361ATypeDef*, ConfigState)

Functions

void tmc4361A_writeDatagram(TMC4361ATypeDef *tmc4361A, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc4361A_writeInt(TMC4361ATypeDef *tmc4361A, uint8_t address, int32_t value)
int32_t tmc4361A_readInt(TMC4361ATypeDef *tmc4361A, uint8_t address)
void tmc4361A_readWriteCover(TMC4361ATypeDef *tmc4361A, uint8_t *data, size_t length)
void tmc4361A_init(TMC4361ATypeDef *tmc4361A, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
void tmc4361A_fillShadowRegisters(TMC4361ATypeDef *tmc4361A)
uint8_t tmc4361A_reset(TMC4361ATypeDef *tmc4361A)
uint8_t tmc4361A_restore(TMC4361ATypeDef *tmc4361A)
void tmc4361A_setRegisterResetState(TMC4361ATypeDef *tmc4361A, const int32_t *resetState)
void tmc4361A_setCallback(TMC4361ATypeDef *tmc4361A, tmc4361A_callback callback)
void tmc4361A_periodicJob(TMC4361ATypeDef *tmc4361A, uint32_t tick)
void tmc4361A_rotate(TMC4361ATypeDef *tmc4361A, int32_t velocity)
void tmc4361A_right(TMC4361ATypeDef *tmc4361A, int32_t velocity)
void tmc4361A_left(TMC4361ATypeDef *tmc4361A, int32_t velocity)
void tmc4361A_stop(TMC4361ATypeDef *tmc4361A)
void tmc4361A_moveTo(TMC4361ATypeDef *tmc4361A, int32_t position, uint32_t velocityMax)
void tmc4361A_moveBy(TMC4361ATypeDef *tmc4361A, int32_t *ticks, uint32_t velocityMax)
int32_t tmc4361A_discardVelocityDecimals(int32_t value)
uint8_t tmc4361A_calibrateClosedLoop(TMC4361ATypeDef *tmc4361A, uint8_t worker0master1)

Variables

static const int32_t tmc4361A_defaultRegisterResetState[TMC4361A_REGISTER_COUNT] = {N_A, 0, 0, 0, 0, 0, N_A, N_A, 0, 0, N_A, N_A, 0, 0, 0, 0, R10, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, N_A, R20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, N_A, N_A, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, N_A, N_A, 0, N_A, 0}
static const uint8_t tmc4361A_defaultRegisterAccess[TMC4361A_REGISTER_COUNT] = {0x43, 0x03, 0x03, 0x03, 0x03, 0x03, 0x43, 0x43, 0x03, 0x03, 0x43, 0x43, 0x03, 0x03, 0x23, 0x01, 0x03, 0x03, 0x43, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x43, 0x03, 0x03, 0x43, 0x03, 0x03, 0x01, 0x01, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x43, 0x03, 0x03, 0x03, 0x03, 0x13, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x13, 0x13, 0x42, 0x13, 0x02, 0x42, 0x42, 0x42, 0x03, 0x13, 0x13, 0x02, 0x13, 0x02, 0x02, 0x02, 0x02, 0x42, 0x02, ____, 0x01, 0x01, 0x02, 0x02, 0x02, 0x01, 0x01, 0x13, 0x13, 0x01, 0x01, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x13, 0x01, 0x13, 0x13, 0x02, 0x42, 0x01}
static const TMCRegisterConstant tmc4361A_RegisterConstants[] = {{0x53, 0xFFFFFFFF}, {0x56, 0x00A000A0}, {0x57, 0x00F00000}, {0x58, 0x00000190}, {0x62, 0x00FFFFFF}, {0x70, 0xAAAAB554}, {0x71, 0x4A9554AA}, {0x72, 0x24492929}, {0x73, 0x10104222}, {0x74, 0xFBFFFFFF}, {0x75, 0xB5BB777D}, {0x76, 0x49295556}, {0x77, 0x00404222}, {0x78, 0xFFFF8056}, {0x7E, 0x00F70000},}
file TMC4361A_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC4361A_REGISTER_COUNT
TMC4361A_MOTORS
TMC4361A_WRITE_BIT
TMC4361A_ADDRESS_MASK
TMC4361A_MAX_VELOCITY
TMC4361A_MAX_ACCELERATION
TMC4361A_COVER_DONE
TMC4361A_RAMP_HOLD
TMC4361A_RAMP_TRAPEZ
TMC4361A_RAMP_SSHAPE
TMC4361A_RAMP_POSITION
file TMC4361A_Fields.h

Defines

TMC4361A_USE_ASTART_AND_VSTART_MASK
TMC4361A_USE_ASTART_AND_VSTART_SHIFT
TMC4361A_DIRECT_ACC_VAL_EN_MASK
TMC4361A_DIRECT_ACC_VAL_EN_SHIFT
TMC4361A_DIRECT_BOW_VAL_EN_MASK
TMC4361A_DIRECT_BOW_VAL_EN_SHIFT
TMC4361A_STEP_INACTIVE_POL_MASK
TMC4361A_STEP_INACTIVE_POL_SHIFT
TMC4361A_TOGGLE_STEP_MASK
TMC4361A_TOGGLE_STEP_SHIFT
TMC4361A_POL_DIR_OUT_MASK
TMC4361A_POL_DIR_OUT_SHIFT
TMC4361A_SDIN_MODE_MASK
TMC4361A_SDIN_MODE_SHIFT
TMC4361A_POL_DIR_IN_MASK
TMC4361A_POL_DIR_IN_SHIFT
TMC4361A_SD_INDIRECT_CONTROL_MASK
TMC4361A_SD_INDIRECT_CONTROL_SHIFT
TMC4361A_SERIAL_ENC_IN_MODE_MASK
TMC4361A_SERIAL_ENC_IN_MODE_SHIFT
TMC4361A_DIFF_ENC_IN_DISABLE_MASK
TMC4361A_DIFF_ENC_IN_DISABLE_SHIFT
TMC4361A_STDBY_CLK_PIN_ASSIGNMENT_MASK
TMC4361A_STDBY_CLK_PIN_ASSIGNMENT_SHIFT
TMC4361A_INTR_POL_MASK
TMC4361A_INTR_POL_SHIFT
TMC4361A_INVERT_POL_TARGET_REACHED_MASK
TMC4361A_INVERT_POL_TARGET_REACHED_SHIFT
TMC4361A_FS_EN_MASK
TMC4361A_FS_EN_SHIFT
TMC4361A_FS_SDOUT_MASK
TMC4361A_FS_SDOUT_SHIFT
TMC4361A_DCSTEP_MODE_MASK
TMC4361A_DCSTEP_MODE_SHIFT
TMC4361A_PWM_OUT_EN_MASK
TMC4361A_PWM_OUT_EN_SHIFT
TMC4361A_SERIAL_ENC_OUT_ENABLE_MASK
TMC4361A_SERIAL_ENC_OUT_ENABLE_SHIFT
TMC4361A_SERIAL_ENC_OUT_DIFF_DISABLE_MASK
TMC4361A_SERIAL_ENC_OUT_DIFF_DISABLE_SHIFT
TMC4361A_AUTOMATIC_DIRECT_SDIN_SWITCH_OFF_MASK
TMC4361A_AUTOMATIC_DIRECT_SDIN_SWITCH_OFF_SHIFT
TMC4361A_CIRCULAR_CNT_AS_XLATCH_MASK
TMC4361A_CIRCULAR_CNT_AS_XLATCH_SHIFT
TMC4361A_REVERSE_MOTOR_DIR_MASK
TMC4361A_REVERSE_MOTOR_DIR_SHIFT
TMC4361A_INTR_TR_PU_PD_EN_MASK
TMC4361A_INTR_TR_PU_PD_EN_SHIFT
TMC4361A_INTR_AS_WIRED_AND_MASK
TMC4361A_INTR_AS_WIRED_AND_SHIFT
TMC4361A_TR_AS_WIRED_AND_MASK
TMC4361A_TR_AS_WIRED_AND_SHIFT
TMC4361A_STOP_LEFT_EN_MASK
TMC4361A_STOP_LEFT_EN_SHIFT
TMC4361A_STOP_RIGHT_EN_MASK
TMC4361A_STOP_RIGHT_EN_SHIFT
TMC4361A_POL_STOP_LEFT_MASK
TMC4361A_POL_STOP_LEFT_SHIFT
TMC4361A_POL_STOP_RIGHT_MASK
TMC4361A_POL_STOP_RIGHT_SHIFT
TMC4361A_INVERT_STOP_DIRECTION_MASK
TMC4361A_INVERT_STOP_DIRECTION_SHIFT
TMC4361A_SOFT_STOP_EN_MASK
TMC4361A_SOFT_STOP_EN_SHIFT
TMC4361A_VIRTUAL_LEFT_LIMIT_EN_MASK
TMC4361A_VIRTUAL_LEFT_LIMIT_EN_SHIFT
TMC4361A_VIRTUAL_RIGHT_LIMIT_EN_MASK
TMC4361A_VIRTUAL_RIGHT_LIMIT_EN_SHIFT
TMC4361A_VIRT_STOP_MODE_MASK
TMC4361A_VIRT_STOP_MODE_SHIFT
TMC4361A_LATCH_X_ON_INACTIVE_L_MASK
TMC4361A_LATCH_X_ON_INACTIVE_L_SHIFT
TMC4361A_LATCH_X_ON_ACTIVE_L_MASK
TMC4361A_LATCH_X_ON_ACTIVE_L_SHIFT
TMC4361A_LATCH_X_ON_INACTIVE_R_MASK
TMC4361A_LATCH_X_ON_INACTIVE_R_SHIFT
TMC4361A_LATCH_X_ON_ACTIVE_R_MASK
TMC4361A_LATCH_X_ON_ACTIVE_R_SHIFT
TMC4361A_STOP_LEFT_IS_HOME_MASK
TMC4361A_STOP_LEFT_IS_HOME_SHIFT
TMC4361A_HOME_EVENT_MASK
TMC4361A_HOME_EVENT_SHIFT
TMC4361A_START_HOME_TRACKING_MASK
TMC4361A_START_HOME_TRACKING_SHIFT
TMC4361A_CLR_POS_AT_TARGET_MASK
TMC4361A_CLR_POS_AT_TARGET_SHIFT
TMC4361A_CIRCULAR_MOVEMENT_EN_MASK
TMC4361A_CIRCULAR_MOVEMENT_EN_SHIFT
TMC4361A_POS_COMP_OUTPUT_MASK
TMC4361A_POS_COMP_OUTPUT_SHIFT
TMC4361A_POS_COMP_SOURCE_MASK
TMC4361A_POS_COMP_SOURCE_SHIFT
TMC4361A_STOP_ON_STALL_MASK
TMC4361A_STOP_ON_STALL_SHIFT
TMC4361A_DRV_AFTER_STALL_MASK
TMC4361A_DRV_AFTER_STALL_SHIFT
TMC4361A_MODIFIED_POS_COPARE_MASK
TMC4361A_MODIFIED_POS_COPARE_SHIFT
TMC4361A_AUTOMATIC_COVER_MASK
TMC4361A_AUTOMATIC_COVER_SHIFT
TMC4361A_CIRCULAR_ENC_EN_MASK
TMC4361A_CIRCULAR_ENC_EN_SHIFT
TMC4361A_START_EN0_MASK
TMC4361A_START_EN0_SHIFT
TMC4361A_START_EN1_MASK
TMC4361A_START_EN1_SHIFT
TMC4361A_START_EN2_MASK
TMC4361A_START_EN2_SHIFT
TMC4361A_START_EN3_MASK
TMC4361A_START_EN3_SHIFT
TMC4361A_START_EN4_MASK
TMC4361A_START_EN4_SHIFT
TMC4361A_TRIGGER_EVENTS0_MASK
TMC4361A_TRIGGER_EVENTS0_SHIFT
TMC4361A_TRIGGER_EVENTS1_MASK
TMC4361A_TRIGGER_EVENTS1_SHIFT
TMC4361A_TRIGGER_EVENTS2_MASK
TMC4361A_TRIGGER_EVENTS2_SHIFT
TMC4361A_TRIGGER_EVENTS3_MASK
TMC4361A_TRIGGER_EVENTS3_SHIFT
TMC4361A_POL_START_SIGNAL_MASK
TMC4361A_POL_START_SIGNAL_SHIFT
TMC4361A_IMMEDIATE_START_IN_MASK
TMC4361A_IMMEDIATE_START_IN_SHIFT
TMC4361A_BUSY_STATE_EN_MASK
TMC4361A_BUSY_STATE_EN_SHIFT
TMC4361A_PIPELINE_EN0_MASK
TMC4361A_PIPELINE_EN0_SHIFT
TMC4361A_PIPELINE_EN1_MASK
TMC4361A_PIPELINE_EN1_SHIFT
TMC4361A_PIPELINE_EN2_MASK
TMC4361A_PIPELINE_EN2_SHIFT
TMC4361A_PIPELINE_EN3_MASK
TMC4361A_PIPELINE_EN3_SHIFT
TMC4361A_SHADOW_OPTION_MASK
TMC4361A_SHADOW_OPTION_SHIFT
TMC4361A_CYCLIC_SHADOW_REGS_MASK
TMC4361A_CYCLIC_SHADOW_REGS_SHIFT
TMC4361A_SHADOW_MISS_CNT_MASK
TMC4361A_SHADOW_MISS_CNT_SHIFT
TMC4361A_XPIPE_REWRITE_REG0_MASK
TMC4361A_XPIPE_REWRITE_REG0_SHIFT
TMC4361A_XPIPE_REWRITE_REG1_MASK
TMC4361A_XPIPE_REWRITE_REG1_SHIFT
TMC4361A_XPIPE_REWRITE_REG2_MASK
TMC4361A_XPIPE_REWRITE_REG2_SHIFT
TMC4361A_XPIPE_REWRITE_REG3_MASK
TMC4361A_XPIPE_REWRITE_REG3_SHIFT
TMC4361A_XPIPE_REWRITE_REG4_MASK
TMC4361A_XPIPE_REWRITE_REG4_SHIFT
TMC4361A_XPIPE_REWRITE_REG5_MASK
TMC4361A_XPIPE_REWRITE_REG5_SHIFT
TMC4361A_XPIPE_REWRITE_REG6_MASK
TMC4361A_XPIPE_REWRITE_REG6_SHIFT
TMC4361A_XPIPE_REWRITE_REG7_MASK
TMC4361A_XPIPE_REWRITE_REG7_SHIFT
TMC4361A_SR_ENC_IN_MASK
TMC4361A_SR_ENC_IN_SHIFT
TMC4361A_FILT_L_ENC_IN_MASK
TMC4361A_FILT_L_ENC_IN_SHIFT
TMC4361A_SD_FILT0_MASK
TMC4361A_SD_FILT0_SHIFT
TMC4361A_SR_REF_MASK
TMC4361A_SR_REF_SHIFT
TMC4361A_FILT_L_REF_MASK
TMC4361A_FILT_L_REF_SHIFT
TMC4361A_SD_FILT1_MASK
TMC4361A_SD_FILT1_SHIFT
TMC4361A_SR_S_MASK
TMC4361A_SR_S_SHIFT
TMC4361A_FILT_L_S_MASK
TMC4361A_FILT_L_S_SHIFT
TMC4361A_SD_FILT2_MASK
TMC4361A_SD_FILT2_SHIFT
TMC4361A_SR_ENC_OUT_MASK
TMC4361A_SR_ENC_OUT_SHIFT
TMC4361A_FILT_L_ENC_OUT_MASK
TMC4361A_FILT_L_ENC_OUT_SHIFT
TMC4361A_SD_FILT3_MASK
TMC4361A_SD_FILT3_SHIFT
TMC4361A_SPI_OUTPUT_FORMAT_MASK
TMC4361A_SPI_OUTPUT_FORMAT_SHIFT
TMC4361A_SSI_OUT_MTIME_MASK
TMC4361A_SSI_OUT_MTIME_SHIFT
TMC4361A_SPI_OUTPUT_FORMAT_MASK
TMC4361A_SPI_OUTPUT_FORMAT_SHIFT
TMC4361A_MIXED_DECAY_MASK
TMC4361A_MIXED_DECAY_SHIFT
TMC4361A_AUTO_DOUBLE_CHOPSYNC_MASK
TMC4361A_AUTO_DOUBLE_CHOPSYNC_SHIFT
TMC4361A_MIXED_DECAY_MASK
TMC4361A_MIXED_DECAY_SHIFT
TMC4361A_STDBY_ON_STALL_FOR_24X_MASK
TMC4361A_STDBY_ON_STALL_FOR_24X_SHIFT
TMC4361A_STALL_FLAG_INSTEAD_OF_UV_EN_MASK
TMC4361A_STALL_FLAG_INSTEAD_OF_UV_EN_SHIFT
TMC4361A_STALL_LOAD_LIMIT_MASK
TMC4361A_STALL_LOAD_LIMIT_SHIFT
TMC4361A_PWM_PHASE_SHFT_EN_MASK
TMC4361A_PWM_PHASE_SHFT_EN_SHIFT
TMC4361A_AUTO_DOUBLE_CHOPSYNC_MASK
TMC4361A_AUTO_DOUBLE_CHOPSYNC_SHIFT
TMC4361A_THREE_PHASE_STEPPER_EN_MASK
TMC4361A_THREE_PHASE_STEPPER_EN_SHIFT
TMC4361A_AUTOREPEAT_COVER_EN_MASK
TMC4361A_AUTOREPEAT_COVER_EN_SHIFT
TMC4361A_COVER_DONE_ONLY_FOR_COVER_MASK
TMC4361A_COVER_DONE_ONLY_FOR_COVER_SHIFT
TMC4361A_SCALE_VALE_TRANSFER_EN_MASK
TMC4361A_SCALE_VALE_TRANSFER_EN_SHIFT
TMC4361A_DISABLE_POLLING_MASK
TMC4361A_DISABLE_POLLING_SHIFT
TMC4361A_AUTOREPEAT_COVER_EN_MASK
TMC4361A_AUTOREPEAT_COVER_EN_SHIFT
TMC4361A_POLL_BLOCK_EXP_MASK
TMC4361A_POLL_BLOCK_EXP_SHIFT
TMC4361A_COVER_DONE_ONLY_FOR_COVER_MASK
TMC4361A_COVER_DONE_ONLY_FOR_COVER_SHIFT
TMC4361A_SCALE_VALE_TRANSFER_EN_MASK
TMC4361A_SCALE_VALE_TRANSFER_EN_SHIFT
TMC4361A_DISABLE_POLLING_MASK
TMC4361A_DISABLE_POLLING_SHIFT
TMC4361A_AUTOREPEAT_COVER_EN_MASK
TMC4361A_AUTOREPEAT_COVER_EN_SHIFT
TMC4361A_POLL_BLOCK_EXP_MASK
TMC4361A_POLL_BLOCK_EXP_SHIFT
TMC4361A_COVER_DONE_ONLY_FOR_COVER_MASK
TMC4361A_COVER_DONE_ONLY_FOR_COVER_SHIFT
TMC4361A_DISABLE_POLLING_MASK
TMC4361A_DISABLE_POLLING_SHIFT
TMC4361A_AUTOREPEAT_COVER_EN_MASK
TMC4361A_AUTOREPEAT_COVER_EN_SHIFT
TMC4361A_POLL_BLOCK_EXP_MASK
TMC4361A_POLL_BLOCK_EXP_SHIFT
TMC4361A_COVER_DONE_ONLY_FOR_COVER_MASK
TMC4361A_COVER_DONE_ONLY_FOR_COVER_SHIFT
TMC4361A_SCK_LOW_BEFORE_CSN_MASK
TMC4361A_SCK_LOW_BEFORE_CSN_SHIFT
TMC4361A_NEW_OUT_BIT_AT_RISE_MASK
TMC4361A_NEW_OUT_BIT_AT_RISE_SHIFT
TMC4361A_DAC_CMD_LENGTH_MASK
TMC4361A_DAC_CMD_LENGTH_SHIFT
TMC4361A_SCK_LOW_BEFORE_CSN_MASK
TMC4361A_SCK_LOW_BEFORE_CSN_SHIFT
TMC4361A_NEW_OUT_BIT_AT_RISE_MASK
TMC4361A_NEW_OUT_BIT_AT_RISE_SHIFT
TMC4361A_COVER_DATA_LENGTH_MASK
TMC4361A_COVER_DATA_LENGTH_SHIFT
TMC4361A_SPI_OUT_LOW_TIME_MASK
TMC4361A_SPI_OUT_LOW_TIME_SHIFT
TMC4361A_SPI_OUT_HIGH_TIME_MASK
TMC4361A_SPI_OUT_HIGH_TIME_SHIFT
TMC4361A_HOLD_CURRENT_SCALE_EN_MASK
TMC4361A_HOLD_CURRENT_SCALE_EN_SHIFT
TMC4361A_DRIVE_CURRENT_SCALE_EN_MASK
TMC4361A_DRIVE_CURRENT_SCALE_EN_SHIFT
TMC4361A_BOOST_CURRENT_ON_ACC_EN_MASK
TMC4361A_BOOST_CURRENT_ON_ACC_EN_SHIFT
TMC4361A_BOOST_CURRENT_ON_DEC_EN_MASK
TMC4361A_BOOST_CURRENT_ON_DEC_EN_SHIFT
TMC4361A_BOOST_CURRENT_AFTER_START_EN_MASK
TMC4361A_BOOST_CURRENT_AFTER_START_EN_SHIFT
TMC4361A_SEC_DRIVE_CURRENT_SCALE_EN_MASK
TMC4361A_SEC_DRIVE_CURRENT_SCALE_EN_SHIFT
TMC4361A_FREEWHEELING_EN_MASK
TMC4361A_FREEWHEELING_EN_SHIFT
TMC4361A_HOLD_CURRENT_SCALE_EN_MASK
TMC4361A_HOLD_CURRENT_SCALE_EN_SHIFT
TMC4361A_DRIVE_CURRENT_SCALE_EN_MASK
TMC4361A_DRIVE_CURRENT_SCALE_EN_SHIFT
TMC4361A_BOOST_CURRENT_ON_ACC_EN_MASK
TMC4361A_BOOST_CURRENT_ON_ACC_EN_SHIFT
TMC4361A_BOOST_CURRENT_ON_DEC_EN_MASK
TMC4361A_BOOST_CURRENT_ON_DEC_EN_SHIFT
TMC4361A_BOOST_CURRENT_AFTER_START_EN_MASK
TMC4361A_BOOST_CURRENT_AFTER_START_EN_SHIFT
TMC4361A_SEC_DRIVE_CURRENT_SCALE_EN_MASK
TMC4361A_SEC_DRIVE_CURRENT_SCALE_EN_SHIFT
TMC4361A_FREEWHEELING_EN_MASK
TMC4361A_FREEWHEELING_EN_SHIFT
TMC4361A_CLOSED_LOOP_SCALE_EN_MASK
TMC4361A_CLOSED_LOOP_SCALE_EN_SHIFT
TMC4361A_HOLD_CURRENT_SCALE_EN_MASK
TMC4361A_HOLD_CURRENT_SCALE_EN_SHIFT
TMC4361A_PWM_SCALE_EN_MASK
TMC4361A_PWM_SCALE_EN_SHIFT
TMC4361A_PWM_AMPL_MASK
TMC4361A_PWM_AMPL_SHIFT
TMC4361A_BOOST_SCALE_VAL_MASK
TMC4361A_BOOST_SCALE_VAL_SHIFT
TMC4361A_DRV1_SCALE_VAL_MASK
TMC4361A_DRV1_SCALE_VAL_SHIFT
TMC4361A_HOLD_SCALE_VAL_MASK
TMC4361A_HOLD_SCALE_VAL_SHIFT
TMC4361A_BOOST_SCALE_VAL_MASK
TMC4361A_BOOST_SCALE_VAL_SHIFT
TMC4361A_DRV1_SCALE_VAL_MASK
TMC4361A_DRV1_SCALE_VAL_SHIFT
TMC4361A_HOLD_SCALE_VAL_MASK
TMC4361A_HOLD_SCALE_VAL_SHIFT
TMC4361A_CL_IMIN_MASK
TMC4361A_CL_IMIN_SHIFT
TMC4361A_CL_IMAX_MASK
TMC4361A_CL_IMAX_SHIFT
TMC4361A_CL_START_UP_MASK
TMC4361A_CL_START_UP_SHIFT
TMC4361A_CL_START_DN_MASK
TMC4361A_CL_START_DN_SHIFT
TMC4361A_ENC_SEL_DECIMAL_MASK
TMC4361A_ENC_SEL_DECIMAL_SHIFT
TMC4361A_CLEAR_ON_N_MASK
TMC4361A_CLEAR_ON_N_SHIFT
TMC4361A_CLR_LATCH_CONT_ON_N_MASK
TMC4361A_CLR_LATCH_CONT_ON_N_SHIFT
TMC4361A_CLR_LATCH_ONCE_ON_N_MASK
TMC4361A_CLR_LATCH_ONCE_ON_N_SHIFT
TMC4361A_POL_N_MASK
TMC4361A_POL_N_SHIFT
TMC4361A_N_CHAN_SENSITIVITY_MASK
TMC4361A_N_CHAN_SENSITIVITY_SHIFT
TMC4361A_POL_A_FOR_N_MASK
TMC4361A_POL_A_FOR_N_SHIFT
TMC4361A_POL_B_FOR_N_MASK
TMC4361A_POL_B_FOR_N_SHIFT
TMC4361A_IGNORE_AB_MASK
TMC4361A_IGNORE_AB_SHIFT
TMC4361A_LATCH_ENC_ON_N_MASK
TMC4361A_LATCH_ENC_ON_N_SHIFT
TMC4361A_LATCH_X_ON_N_MASK
TMC4361A_LATCH_X_ON_N_SHIFT
TMC4361A_MULTI_TURN_IN_EN_MASK
TMC4361A_MULTI_TURN_IN_EN_SHIFT
TMC4361A_MULTI_TURN_IN_SIGNED_MASK
TMC4361A_MULTI_TURN_IN_SIGNED_SHIFT
TMC4361A_MULTI_TURN_OUT_EN_MASK
TMC4361A_MULTI_TURN_OUT_EN_SHIFT
TMC4361A_USE_USTEPS_INSTEAD_OF_XRANGE_MASK
TMC4361A_USE_USTEPS_INSTEAD_OF_XRANGE_SHIFT
TMC4361A_CALC_MULTI_TURN_BEHAV_MASK
TMC4361A_CALC_MULTI_TURN_BEHAV_SHIFT
TMC4361A_SSI_MULTI_CYCLE_DATA_MASK
TMC4361A_SSI_MULTI_CYCLE_DATA_SHIFT
TMC4361A_SSI_GRAY_CODE_EN_MASK
TMC4361A_SSI_GRAY_CODE_EN_SHIFT
TMC4361A_LEFT_ALIGNED_DATA_MASK
TMC4361A_LEFT_ALIGNED_DATA_SHIFT
TMC4361A_SPI_DATA_ON_CS_MASK
TMC4361A_SPI_DATA_ON_CS_SHIFT
TMC4361A_SPI_LOW_BEFORE_CS_MASK
TMC4361A_SPI_LOW_BEFORE_CS_SHIFT
TMC4361A_REGULATION_MODUS_MASK
TMC4361A_REGULATION_MODUS_SHIFT
TMC4361A_CL_CALIBRATION_EN_MASK
TMC4361A_CL_CALIBRATION_EN_SHIFT
TMC4361A_CL_EMF_EN_MASK
TMC4361A_CL_EMF_EN_SHIFT
TMC4361A_CL_CLR_XACT_MASK
TMC4361A_CL_CLR_XACT_SHIFT
TMC4361A_CL_VLIMIT_EN_MASK
TMC4361A_CL_VLIMIT_EN_SHIFT
TMC4361A_CL_VELOCITY_MODE_EN_MASK
TMC4361A_CL_VELOCITY_MODE_EN_SHIFT
TMC4361A_INVERT_ENC_DIR_MASK
TMC4361A_INVERT_ENC_DIR_SHIFT
TMC4361A_ENC_OUT_GRAY_MASK
TMC4361A_ENC_OUT_GRAY_SHIFT
TMC4361A_NO_ENC_VEL_PREPROC_MASK
TMC4361A_NO_ENC_VEL_PREPROC_SHIFT
TMC4361A_SERIAL_ENC_VARIATION_LIMIT_MASK
TMC4361A_SERIAL_ENC_VARIATION_LIMIT_SHIFT
TMC4361A_SINGLE_TURN_RES_MASK
TMC4361A_SINGLE_TURN_RES_SHIFT
TMC4361A_MULTI_TURN_RES_MASK
TMC4361A_MULTI_TURN_RES_SHIFT
TMC4361A_STATUS_BIT_CNT_MASK
TMC4361A_STATUS_BIT_CNT_SHIFT
TMC4361A_SERIAL_ADDR_BITS_MASK
TMC4361A_SERIAL_ADDR_BITS_SHIFT
TMC4361A_SERIAL_DATA_BITS_MASK
TMC4361A_SERIAL_DATA_BITS_SHIFT
TMC4361A_SINGLE_TURN_RES_MASK
TMC4361A_SINGLE_TURN_RES_SHIFT
TMC4361A_MULTI_TURN_RES_MASK
TMC4361A_MULTI_TURN_RES_SHIFT
TMC4361A_STATUS_BIT_CNT_MASK
TMC4361A_STATUS_BIT_CNT_SHIFT
TMC4361A_SINGLE_TURN_RES_MASK
TMC4361A_SINGLE_TURN_RES_SHIFT
TMC4361A_MULTI_TURN_RES_MASK
TMC4361A_MULTI_TURN_RES_SHIFT
TMC4361A_STATUS_BIT_CNT_MASK
TMC4361A_STATUS_BIT_CNT_SHIFT
TMC4361A_SERIAL_ADDR_BITS_MASK
TMC4361A_SERIAL_ADDR_BITS_SHIFT
TMC4361A_SERIAL_DATA_BITS_MASK
TMC4361A_SERIAL_DATA_BITS_SHIFT
TMC4361A_SINGLE_TURN_RES_OUT_MASK
TMC4361A_SINGLE_TURN_RES_OUT_SHIFT
TMC4361A_MULTI_TURN_RES_OUT_MASK
TMC4361A_MULTI_TURN_RES_OUT_SHIFT
TMC4361A_MSTEP_PER_FS_MASK
TMC4361A_MSTEP_PER_FS_SHIFT
TMC4361A_MSTEP_PER_FS_MASK
TMC4361A_MSTEP_PER_FS_SHIFT
TMC4361A_MSTEP_PER_FS_MASK
TMC4361A_MSTEP_PER_FS_SHIFT
TMC4361A_FS_PER_REV_MASK
TMC4361A_FS_PER_REV_SHIFT
TMC4361A_SG_MASK
TMC4361A_SG_SHIFT
TMC4361A_OT_MASK
TMC4361A_OT_SHIFT
TMC4361A_OTPW_MASK
TMC4361A_OTPW_SHIFT
TMC4361A_S2GA_MASK
TMC4361A_S2GA_SHIFT
TMC4361A_S2GB_MASK
TMC4361A_S2GB_SHIFT
TMC4361A_OLA_MASK
TMC4361A_OLA_SHIFT
TMC4361A_OLB_MASK
TMC4361A_OLB_SHIFT
TMC4361A_STST_MASK
TMC4361A_STST_SHIFT
TMC4361A_SG_MASK
TMC4361A_SG_SHIFT
TMC4361A_UV_SF_MASK
TMC4361A_UV_SF_SHIFT
TMC4361A_UV_SF_MASK
TMC4361A_UV_SF_SHIFT
TMC4361A_OT_MASK
TMC4361A_OT_SHIFT
TMC4361A_OTPW_MASK
TMC4361A_OTPW_SHIFT
TMC4361A_OCA_MASK
TMC4361A_OCA_SHIFT
TMC4361A_OCB_MASK
TMC4361A_OCB_SHIFT
TMC4361A_OLA_MASK
TMC4361A_OLA_SHIFT
TMC4361A_OLB_MASK
TMC4361A_OLB_SHIFT
TMC4361A_OCHS_MASK
TMC4361A_OCHS_SHIFT
TMC4361A_TARGET_REACHED_MASK
TMC4361A_TARGET_REACHED_SHIFT
TMC4361A_POS_COMP_REACHED_MASK
TMC4361A_POS_COMP_REACHED_SHIFT
TMC4361A_VEL_REACHED_MASK
TMC4361A_VEL_REACHED_SHIFT
TMC4361A_VEL_STATE_00_MASK
TMC4361A_VEL_STATE_00_SHIFT
TMC4361A_VEL_STATE_01_MASK
TMC4361A_VEL_STATE_01_SHIFT
TMC4361A_VEL_STATE_10_MASK
TMC4361A_VEL_STATE_10_SHIFT
TMC4361A_RAMP_STATE_00_MASK
TMC4361A_RAMP_STATE_00_SHIFT
TMC4361A_RAMP_STATE_01_MASK
TMC4361A_RAMP_STATE_01_SHIFT
TMC4361A_RAMP_STATE_10_MASK
TMC4361A_RAMP_STATE_10_SHIFT
TMC4361A_MAX_PHASE_TRAP_MASK
TMC4361A_MAX_PHASE_TRAP_SHIFT
TMC4361A_FROZEN_MASK
TMC4361A_FROZEN_SHIFT
TMC4361A_STOPL_EVENT_MASK
TMC4361A_STOPL_EVENT_SHIFT
TMC4361A_STOPR_EVENT_MASK
TMC4361A_STOPR_EVENT_SHIFT
TMC4361A_VSTOPL_ACTIVE_MASK
TMC4361A_VSTOPL_ACTIVE_SHIFT
TMC4361A_HOME_ERROR_MASK
TMC4361A_HOME_ERROR_SHIFT
TMC4361A_XLATCH_DONE_MASK
TMC4361A_XLATCH_DONE_SHIFT
TMC4361A_FS_ACTIVE_MASK
TMC4361A_FS_ACTIVE_SHIFT
TMC4361A_ENC_FAIL_MASK
TMC4361A_ENC_FAIL_SHIFT
TMC4361A_N_ACTIVE_MASK
TMC4361A_N_ACTIVE_SHIFT
TMC4361A_ENC_DONE_MASK
TMC4361A_ENC_DONE_SHIFT
TMC4361A_SER_ENC_DATA_FAIL_MASK
TMC4361A_SER_ENC_DATA_FAIL_SHIFT
TMC4361A_SER_DATA_DONE_MASK
TMC4361A_SER_DATA_DONE_SHIFT
TMC4361A_SERIAL_ENC_FLAGS_MASK
TMC4361A_SERIAL_ENC_FLAGS_SHIFT
TMC4361A_COVER_DONE_MASK
TMC4361A_COVER_DONE_SHIFT
TMC4361A_ENC_VEL0_MASK
TMC4361A_ENC_VEL0_SHIFT
TMC4361A_CL_MAX_MASK
TMC4361A_CL_MAX_SHIFT
TMC4361A_CL_FIT_MASK
TMC4361A_CL_FIT_SHIFT
TMC4361A_MOTOR_EV_MASK
TMC4361A_MOTOR_EV_SHIFT
TMC4361A_RST_EV_MASK
TMC4361A_RST_EV_SHIFT
TMC4361A_TARGET_REACHED_MASK
TMC4361A_TARGET_REACHED_SHIFT
TMC4361A_POS_COMP_REACHED_MASK
TMC4361A_POS_COMP_REACHED_SHIFT
TMC4361A_VEL_REACHED_MASK
TMC4361A_VEL_REACHED_SHIFT
TMC4361A_VEL_STATE_00_MASK
TMC4361A_VEL_STATE_00_SHIFT
TMC4361A_VEL_STATE_01_MASK
TMC4361A_VEL_STATE_01_SHIFT
TMC4361A_VEL_STATE_10_MASK
TMC4361A_VEL_STATE_10_SHIFT
TMC4361A_RAMP_STATE_00_MASK
TMC4361A_RAMP_STATE_00_SHIFT
TMC4361A_RAMP_STATE_01_MASK
TMC4361A_RAMP_STATE_01_SHIFT
TMC4361A_RAMP_STATE_10_MASK
TMC4361A_RAMP_STATE_10_SHIFT
TMC4361A_MAX_PHASE_TRAP_MASK
TMC4361A_MAX_PHASE_TRAP_SHIFT
TMC4361A_FROZEN_MASK
TMC4361A_FROZEN_SHIFT
TMC4361A_STOPL_EVENT_MASK
TMC4361A_STOPL_EVENT_SHIFT
TMC4361A_STOPR_EVENT_MASK
TMC4361A_STOPR_EVENT_SHIFT
TMC4361A_VSTOPL_ACTIVE_MASK
TMC4361A_VSTOPL_ACTIVE_SHIFT
TMC4361A_HOME_ERROR_MASK
TMC4361A_HOME_ERROR_SHIFT
TMC4361A_XLATCH_DONE_MASK
TMC4361A_XLATCH_DONE_SHIFT
TMC4361A_FS_ACTIVE_MASK
TMC4361A_FS_ACTIVE_SHIFT
TMC4361A_ENC_FAIL_MASK
TMC4361A_ENC_FAIL_SHIFT
TMC4361A_N_ACTIVE_MASK
TMC4361A_N_ACTIVE_SHIFT
TMC4361A_ENC_DONE_MASK
TMC4361A_ENC_DONE_SHIFT
TMC4361A_SER_ENC_DATA_FAIL_MASK
TMC4361A_SER_ENC_DATA_FAIL_SHIFT
TMC4361A_SER_DATA_DONE_MASK
TMC4361A_SER_DATA_DONE_SHIFT
TMC4361A_SERIAL_ENC_FLAGS_MASK
TMC4361A_SERIAL_ENC_FLAGS_SHIFT
TMC4361A_COVER_DONE_MASK
TMC4361A_COVER_DONE_SHIFT
TMC4361A_ENC_VEL0_MASK
TMC4361A_ENC_VEL0_SHIFT
TMC4361A_CL_MAX_MASK
TMC4361A_CL_MAX_SHIFT
TMC4361A_CL_FIT_MASK
TMC4361A_CL_FIT_SHIFT
TMC4361A_MOTOR_EV_MASK
TMC4361A_MOTOR_EV_SHIFT
TMC4361A_RST_EV_MASK
TMC4361A_RST_EV_SHIFT
TMC4361A_TARGET_REACHED_MASK
TMC4361A_TARGET_REACHED_SHIFT
TMC4361A_POS_COMP_REACHED_MASK
TMC4361A_POS_COMP_REACHED_SHIFT
TMC4361A_VEL_REACHED_MASK
TMC4361A_VEL_REACHED_SHIFT
TMC4361A_VEL_STATE_00_MASK
TMC4361A_VEL_STATE_00_SHIFT
TMC4361A_VEL_STATE_01_MASK
TMC4361A_VEL_STATE_01_SHIFT
TMC4361A_VEL_STATE_10_MASK
TMC4361A_VEL_STATE_10_SHIFT
TMC4361A_RAMP_STATE_00_MASK
TMC4361A_RAMP_STATE_00_SHIFT
TMC4361A_RAMP_STATE_01_MASK
TMC4361A_RAMP_STATE_01_SHIFT
TMC4361A_RAMP_STATE_10_MASK
TMC4361A_RAMP_STATE_10_SHIFT
TMC4361A_MAX_PHASE_TRAP_MASK
TMC4361A_MAX_PHASE_TRAP_SHIFT
TMC4361A_FROZEN_MASK
TMC4361A_FROZEN_SHIFT
TMC4361A_STOPL_EVENT_MASK
TMC4361A_STOPL_EVENT_SHIFT
TMC4361A_STOPR_EVENT_MASK
TMC4361A_STOPR_EVENT_SHIFT
TMC4361A_VSTOPL_ACTIVE_MASK
TMC4361A_VSTOPL_ACTIVE_SHIFT
TMC4361A_HOME_ERROR_MASK
TMC4361A_HOME_ERROR_SHIFT
TMC4361A_XLATCH_DONE_MASK
TMC4361A_XLATCH_DONE_SHIFT
TMC4361A_FS_ACTIVE_MASK
TMC4361A_FS_ACTIVE_SHIFT
TMC4361A_ENC_FAIL_MASK
TMC4361A_ENC_FAIL_SHIFT
TMC4361A_N_ACTIVE_MASK
TMC4361A_N_ACTIVE_SHIFT
TMC4361A_ENC_DONE_MASK
TMC4361A_ENC_DONE_SHIFT
TMC4361A_SER_ENC_DATA_FAIL_MASK
TMC4361A_SER_ENC_DATA_FAIL_SHIFT
TMC4361A_SER_DATA_DONE_MASK
TMC4361A_SER_DATA_DONE_SHIFT
TMC4361A_SERIAL_ENC_FLAGS_MASK
TMC4361A_SERIAL_ENC_FLAGS_SHIFT
TMC4361A_COVER_DONE_MASK
TMC4361A_COVER_DONE_SHIFT
TMC4361A_ENC_VEL0_MASK
TMC4361A_ENC_VEL0_SHIFT
TMC4361A_CL_MAX_MASK
TMC4361A_CL_MAX_SHIFT
TMC4361A_CL_FIT_MASK
TMC4361A_CL_FIT_SHIFT
TMC4361A_MOTOR_EV_MASK
TMC4361A_MOTOR_EV_SHIFT
TMC4361A_RST_EV_MASK
TMC4361A_RST_EV_SHIFT
TMC4361A_TARGET_REACHED_MASK
TMC4361A_TARGET_REACHED_SHIFT
TMC4361A_POS_COMP_REACHED_MASK
TMC4361A_POS_COMP_REACHED_SHIFT
TMC4361A_VEL_REACHED_MASK
TMC4361A_VEL_REACHED_SHIFT
TMC4361A_VEL_STATE_00_MASK
TMC4361A_VEL_STATE_00_SHIFT
TMC4361A_VEL_STATE_01_MASK
TMC4361A_VEL_STATE_01_SHIFT
TMC4361A_VEL_STATE_10_MASK
TMC4361A_VEL_STATE_10_SHIFT
TMC4361A_RAMP_STATE_00_MASK
TMC4361A_RAMP_STATE_00_SHIFT
TMC4361A_RAMP_STATE_01_MASK
TMC4361A_RAMP_STATE_01_SHIFT
TMC4361A_RAMP_STATE_10_MASK
TMC4361A_RAMP_STATE_10_SHIFT
TMC4361A_MAX_PHASE_TRAP_MASK
TMC4361A_MAX_PHASE_TRAP_SHIFT
TMC4361A_FROZEN_MASK
TMC4361A_FROZEN_SHIFT
TMC4361A_STOPL_EVENT_MASK
TMC4361A_STOPL_EVENT_SHIFT
TMC4361A_STOPR_EVENT_MASK
TMC4361A_STOPR_EVENT_SHIFT
TMC4361A_VSTOPL_ACTIVE_MASK
TMC4361A_VSTOPL_ACTIVE_SHIFT
TMC4361A_HOME_ERROR_MASK
TMC4361A_HOME_ERROR_SHIFT
TMC4361A_XLATCH_DONE_MASK
TMC4361A_XLATCH_DONE_SHIFT
TMC4361A_FS_ACTIVE_MASK
TMC4361A_FS_ACTIVE_SHIFT
TMC4361A_ENC_FAIL_MASK
TMC4361A_ENC_FAIL_SHIFT
TMC4361A_N_ACTIVE_MASK
TMC4361A_N_ACTIVE_SHIFT
TMC4361A_ENC_DONE_MASK
TMC4361A_ENC_DONE_SHIFT
TMC4361A_SER_ENC_DATA_FAIL_MASK
TMC4361A_SER_ENC_DATA_FAIL_SHIFT
TMC4361A_SER_DATA_DONE_MASK
TMC4361A_SER_DATA_DONE_SHIFT
TMC4361A_SERIAL_ENC_FLAGS_MASK
TMC4361A_SERIAL_ENC_FLAGS_SHIFT
TMC4361A_COVER_DONE_MASK
TMC4361A_COVER_DONE_SHIFT
TMC4361A_ENC_VEL0_MASK
TMC4361A_ENC_VEL0_SHIFT
TMC4361A_CL_MAX_MASK
TMC4361A_CL_MAX_SHIFT
TMC4361A_CL_FIT_MASK
TMC4361A_CL_FIT_SHIFT
TMC4361A_MOTOR_EV_MASK
TMC4361A_MOTOR_EV_SHIFT
TMC4361A_RST_EV_MASK
TMC4361A_RST_EV_SHIFT
TMC4361A_TARGET_REACHED_F_MASK
TMC4361A_TARGET_REACHED_F_SHIFT
TMC4361A_POS_COMP_REACHED_F_MASK
TMC4361A_POS_COMP_REACHED_F_SHIFT
TMC4361A_VEL_REACHED_F_MASK
TMC4361A_VEL_REACHED_F_SHIFT
TMC4361A_VEL_STATE_F_MASK
TMC4361A_VEL_STATE_F_SHIFT
TMC4361A_RAMP_STATE_F_MASK
TMC4361A_RAMP_STATE_F_SHIFT
TMC4361A_STOPL_ACTIVE_F_MASK
TMC4361A_STOPL_ACTIVE_F_SHIFT
TMC4361A_STOPR_ACTIVE_F_MASK
TMC4361A_STOPR_ACTIVE_F_SHIFT
TMC4361A_VSTOPL_ACTIVE_F_MASK
TMC4361A_VSTOPL_ACTIVE_F_SHIFT
TMC4361A_VSTOPR_ACTIVE_F_MASK
TMC4361A_VSTOPR_ACTIVE_F_SHIFT
TMC4361A_ACTIVE_STALL_F_MASK
TMC4361A_ACTIVE_STALL_F_SHIFT
TMC4361A_HOME_ERROR_F_MASK
TMC4361A_HOME_ERROR_F_SHIFT
TMC4361A_FS_ACTIVE_F_MASK
TMC4361A_FS_ACTIVE_F_SHIFT
TMC4361A_ENC_FAIL_F_MASK
TMC4361A_ENC_FAIL_F_SHIFT
TMC4361A_N_ACTIVE_F_MASK
TMC4361A_N_ACTIVE_F_SHIFT
TMC4361A_ENC_LATCH_F_MASK
TMC4361A_ENC_LATCH_F_SHIFT
TMC4361A_MULTI_CYCLE_FAIL_F__SER_ENC_VAR_F_MASK
TMC4361A_MULTI_CYCLE_FAIL_F__SER_ENC_VAR_F_SHIFT
TMC4361A_SERIAL_ENC_FLAG_0_MASK
TMC4361A_SERIAL_ENC_FLAG_0_SHIFT
TMC4361A_SERIAL_ENC_FLAG_1_MASK
TMC4361A_SERIAL_ENC_FLAG_1_SHIFT
TMC4361A_SERIAL_ENC_FLAG_2_MASK
TMC4361A_SERIAL_ENC_FLAG_2_SHIFT
TMC4361A_SERIAL_ENC_FLAG_3_MASK
TMC4361A_SERIAL_ENC_FLAG_3_SHIFT
TMC4361A_STP_LENGTH_ADD_MASK
TMC4361A_STP_LENGTH_ADD_SHIFT
TMC4361A_DIR_SETUP_TIME_MASK
TMC4361A_DIR_SETUP_TIME_SHIFT
TMC4361A_START_OUT_ADD_MASK
TMC4361A_START_OUT_ADD_SHIFT
TMC4361A_GEAR_RATIO_MASK
TMC4361A_GEAR_RATIO_SHIFT
TMC4361A_START_DELAY_MASK
TMC4361A_START_DELAY_SHIFT
TMC4361A_CLK_GATING_DELAY_MASK
TMC4361A_CLK_GATING_DELAY_SHIFT
TMC4361A_STDBY_DELAY_MASK
TMC4361A_STDBY_DELAY_SHIFT
TMC4361A_FREEWHEEL_DELAY_MASK
TMC4361A_FREEWHEEL_DELAY_SHIFT
TMC4361A_VDRV_SCALE_LIMIT_MASK
TMC4361A_VDRV_SCALE_LIMIT_SHIFT
TMC4361A_PWM_VMAX_MASK
TMC4361A_PWM_VMAX_SHIFT
TMC4361A_UP_SCALE_DELAY_MASK
TMC4361A_UP_SCALE_DELAY_SHIFT
TMC4361A_CL_UPSCALE_DELAY_MASK
TMC4361A_CL_UPSCALE_DELAY_SHIFT
TMC4361A_UP_SCALE_DELAY_MASK
TMC4361A_UP_SCALE_DELAY_SHIFT
TMC4361A_HOLD_SCALE_DELAY_MASK
TMC4361A_HOLD_SCALE_DELAY_SHIFT
TMC4361A_CL_DNSCALE_DELAY_MASK
TMC4361A_CL_DNSCALE_DELAY_SHIFT
TMC4361A_HOLD_SCALE_DELAY_MASK
TMC4361A_HOLD_SCALE_DELAY_SHIFT
TMC4361A_DRV_SCALE_DELAY_MASK
TMC4361A_DRV_SCALE_DELAY_SHIFT
TMC4361A_BOOST_TIME_MASK
TMC4361A_BOOST_TIME_SHIFT
TMC4361A_CL_BETA_MASK
TMC4361A_CL_BETA_SHIFT
TMC4361A_CL_GAMMA_MASK
TMC4361A_CL_GAMMA_SHIFT
TMC4361A_SPI_SWITCH_VEL_MASK
TMC4361A_SPI_SWITCH_VEL_SHIFT
TMC4361A_DAC_ADDR_A_MASK
TMC4361A_DAC_ADDR_A_SHIFT
TMC4361A_DAC_ADDR_B_MASK
TMC4361A_DAC_ADDR_B_SHIFT
TMC4361A_HOME_SAFETY_MARGIN_MASK
TMC4361A_HOME_SAFETY_MARGIN_SHIFT
TMC4361A_PWM_FREQ_MASK
TMC4361A_PWM_FREQ_SHIFT
TMC4361A_CHOPSYNC_DIV_MASK
TMC4361A_CHOPSYNC_DIV_SHIFT
TMC4361A_OPERATION_MODE_MASK
TMC4361A_OPERATION_MODE_SHIFT
TMC4361A_RAMP_PROFILE_MASK
TMC4361A_RAMP_PROFILE_SHIFT
TMC4361A_XACTUAL_MASK
TMC4361A_XACTUAL_SHIFT
TMC4361A_VACTUAL_MASK
TMC4361A_VACTUAL_SHIFT
TMC4361A_AACTUAL_MASK
TMC4361A_AACTUAL_SHIFT
TMC4361A_VMAX_MASK
TMC4361A_VMAX_SHIFT
TMC4361A_VMAX_MASK
TMC4361A_VMAX_SHIFT
TMC4361A_VSTART_MASK
TMC4361A_VSTART_SHIFT
TMC4361A_VSTOP_MASK
TMC4361A_VSTOP_SHIFT
TMC4361A_VSTOP_MASK
TMC4361A_VSTOP_SHIFT
TMC4361A_VBREAK_MASK
TMC4361A_VBREAK_SHIFT
TMC4361A_FREQUENCY_MODE_MASK
TMC4361A_FREQUENCY_MODE_SHIFT
TMC4361A_DIRECT_MODE_MASK
TMC4361A_DIRECT_MODE_SHIFT
TMC4361A_FREQUENCY_MODE_MASK
TMC4361A_FREQUENCY_MODE_SHIFT
TMC4361A_DIRECT_MODE_MASK
TMC4361A_DIRECT_MODE_SHIFT
TMC4361A_FREQUENCY_MODE_MASK
TMC4361A_FREQUENCY_MODE_SHIFT
TMC4361A_SIGN_AACT_MASK
TMC4361A_SIGN_AACT_SHIFT
TMC4361A_DIRECT_MODE_MASK
TMC4361A_DIRECT_MODE_SHIFT
TMC4361A_SIGN_AACT_MASK
TMC4361A_SIGN_AACT_SHIFT
TMC4361A_FREQUENCY_MODE_MASK
TMC4361A_FREQUENCY_MODE_SHIFT
TMC4361A_DIRECT_MODE_MASK
TMC4361A_DIRECT_MODE_SHIFT
TMC4361A_FREQUENCY_MODE_MASK
TMC4361A_FREQUENCY_MODE_SHIFT
TMC4361A_DIRECT_MODE_MASK
TMC4361A_DIRECT_MODE_SHIFT
TMC4361A_FREQUENCY_MODE_MASK
TMC4361A_FREQUENCY_MODE_SHIFT
TMC4361A_DIRECT_MODE_MASK
TMC4361A_DIRECT_MODE_SHIFT
TMC4361A_FREQUENCY_MODE_MASK
TMC4361A_FREQUENCY_MODE_SHIFT
TMC4361A_DIRECT_MODE_MASK
TMC4361A_DIRECT_MODE_SHIFT
TMC4361A_FREQUENCY_MODE_MASK
TMC4361A_FREQUENCY_MODE_SHIFT
TMC4361A_DIRECT_MODE_MASK
TMC4361A_DIRECT_MODE_SHIFT
TMC4361A_FREQUENCY_MODE_MASK
TMC4361A_FREQUENCY_MODE_SHIFT
TMC4361A_DIRECT_MODE_MASK
TMC4361A_DIRECT_MODE_SHIFT
TMC4361A_CLK_FREQ_MASK
TMC4361A_CLK_FREQ_SHIFT
TMC4361A_POS_COMP_MASK
TMC4361A_POS_COMP_SHIFT
TMC4361A_VIRT_STOP_LEFT_MASK
TMC4361A_VIRT_STOP_LEFT_SHIFT
TMC4361A_VIRT_STOP_RIGHT_MASK
TMC4361A_VIRT_STOP_RIGHT_SHIFT
TMC4361A_X_HOME_MASK
TMC4361A_X_HOME_SHIFT
TMC4361A_X_LATCH_MASK
TMC4361A_X_LATCH_SHIFT
TMC4361A_X_LATCH_MASK
TMC4361A_X_LATCH_SHIFT
TMC4361A_X_RANGE_MASK
TMC4361A_X_RANGE_SHIFT
TMC4361A_XTARGET_MASK
TMC4361A_XTARGET_SHIFT
TMC4361A_X_PIPE0_MASK
TMC4361A_X_PIPE0_SHIFT
TMC4361A_X_PIPE1_MASK
TMC4361A_X_PIPE1_SHIFT
TMC4361A_X_PIPE2_MASK
TMC4361A_X_PIPE2_SHIFT
TMC4361A_X_PIPE3_MASK
TMC4361A_X_PIPE3_SHIFT
TMC4361A_X_PIPE4_MASK
TMC4361A_X_PIPE4_SHIFT
TMC4361A_X_PIPE5_MASK
TMC4361A_X_PIPE5_SHIFT
TMC4361A_X_PIPE6_MASK
TMC4361A_X_PIPE6_SHIFT
TMC4361A_X_PIPE7_MASK
TMC4361A_X_PIPE7_SHIFT
TMC4361A_SH_REG0_VMAX_MASK
TMC4361A_SH_REG0_VMAX_SHIFT
TMC4361A_SH_REG1_AMAX_MASK
TMC4361A_SH_REG1_AMAX_SHIFT
TMC4361A_SH_REG1_AMAX_MASK
TMC4361A_SH_REG1_AMAX_SHIFT
TMC4361A_SH_REG2_DMAX_MASK
TMC4361A_SH_REG2_DMAX_SHIFT
TMC4361A_SH_REG2_DMAX_MASK
TMC4361A_SH_REG2_DMAX_SHIFT
TMC4361A_SH_REG3_ASTART_MASK
TMC4361A_SH_REG3_ASTART_SHIFT
TMC4361A_SH_REG3_ASTART_MASK
TMC4361A_SH_REG3_ASTART_SHIFT
TMC4361A_SH_REG3_BOW1_MASK
TMC4361A_SH_REG3_BOW1_SHIFT
TMC4361A_SH_REG3_BOW1_MASK
TMC4361A_SH_REG3_BOW1_SHIFT
TMC4361A_SH_REG3_ASTART_MASK
TMC4361A_SH_REG3_ASTART_SHIFT
TMC4361A_SH_REG3_ASTART_MASK
TMC4361A_SH_REG3_ASTART_SHIFT
TMC4361A_SH_REG4_DFINAL_MASK
TMC4361A_SH_REG4_DFINAL_SHIFT
TMC4361A_SH_REG4_DFINAL_MASK
TMC4361A_SH_REG4_DFINAL_SHIFT
TMC4361A_SH_REG4_BOW2_MASK
TMC4361A_SH_REG4_BOW2_SHIFT
TMC4361A_SH_REG4_BOW2_MASK
TMC4361A_SH_REG4_BOW2_SHIFT
TMC4361A_SH_REG4_DFINAL_MASK
TMC4361A_SH_REG4_DFINAL_SHIFT
TMC4361A_SH_REG4_DFINAL_MASK
TMC4361A_SH_REG4_DFINAL_SHIFT
TMC4361A_SH_REG5_VBREAK_MASK
TMC4361A_SH_REG5_VBREAK_SHIFT
TMC4361A_SH_REG5_BOW3_MASK
TMC4361A_SH_REG5_BOW3_SHIFT
TMC4361A_SH_REG5_BOW3_MASK
TMC4361A_SH_REG5_BOW3_SHIFT
TMC4361A_SH_REG5_VBREAK_MASK
TMC4361A_SH_REG5_VBREAK_SHIFT
TMC4361A_SH_REG6_VSTART_MASK
TMC4361A_SH_REG6_VSTART_SHIFT
TMC4361A_SH_REG6_BOW4_MASK
TMC4361A_SH_REG6_BOW4_SHIFT
TMC4361A_SH_REG6_BOW4_MASK
TMC4361A_SH_REG6_BOW4_SHIFT
TMC4361A_SH_REG6_VSTART_MASK
TMC4361A_SH_REG6_VSTART_SHIFT
TMC4361A_SH_REG6_VSTOP_MASK
TMC4361A_SH_REG6_VSTOP_SHIFT
TMC4361A_SH_REG7_VSTOP_MASK
TMC4361A_SH_REG7_VSTOP_SHIFT
TMC4361A_SH_REG7_VMAX_MASK
TMC4361A_SH_REG7_VMAX_SHIFT
TMC4361A_SH_REG8_BOW1_MASK
TMC4361A_SH_REG8_BOW1_SHIFT
TMC4361A_SH_REG8_BOW1_MASK
TMC4361A_SH_REG8_BOW1_SHIFT
TMC4361A_SH_REG8_AMAX_MASK
TMC4361A_SH_REG8_AMAX_SHIFT
TMC4361A_SH_REG8_AMAX_MASK
TMC4361A_SH_REG8_AMAX_SHIFT
TMC4361A_SH_REG9_BOW2_MASK
TMC4361A_SH_REG9_BOW2_SHIFT
TMC4361A_SH_REG9_BOW2_MASK
TMC4361A_SH_REG9_BOW2_SHIFT
TMC4361A_SH_REG9_DMAX_MASK
TMC4361A_SH_REG9_DMAX_SHIFT
TMC4361A_SH_REG9_DMAX_MASK
TMC4361A_SH_REG9_DMAX_SHIFT
TMC4361A_SH_REG10_BOW3_MASK
TMC4361A_SH_REG10_BOW3_SHIFT
TMC4361A_SH_REG10_BOW3_MASK
TMC4361A_SH_REG10_BOW3_SHIFT
TMC4361A_SH_REG10_BOW1_MASK
TMC4361A_SH_REG10_BOW1_SHIFT
TMC4361A_SH_REG10_BOW1_MASK
TMC4361A_SH_REG10_BOW1_SHIFT
TMC4361A_SH_REG10_ASTART_MASK
TMC4361A_SH_REG10_ASTART_SHIFT
TMC4361A_SH_REG10_ASTART_MASK
TMC4361A_SH_REG10_ASTART_SHIFT
TMC4361A_SH_REG11_BOW4_MASK
TMC4361A_SH_REG11_BOW4_SHIFT
TMC4361A_SH_REG11_BOW4_MASK
TMC4361A_SH_REG11_BOW4_SHIFT
TMC4361A_SH_REG11_BOW2_MASK
TMC4361A_SH_REG11_BOW2_SHIFT
TMC4361A_SH_REG11_BOW2_MASK
TMC4361A_SH_REG11_BOW2_SHIFT
TMC4361A_SH_REG11_DFINAL_MASK
TMC4361A_SH_REG11_DFINAL_SHIFT
TMC4361A_SH_REG11_DFINAL_MASK
TMC4361A_SH_REG11_DFINAL_SHIFT
TMC4361A_OPERATION_MODE_MASK
TMC4361A_OPERATION_MODE_SHIFT
TMC4361A_RAMP_PROFILE_MASK
TMC4361A_RAMP_PROFILE_SHIFT
TMC4361A_SH_REG12_BOW3_MASK
TMC4361A_SH_REG12_BOW3_SHIFT
TMC4361A_SH_REG12_BOW3_MASK
TMC4361A_SH_REG12_BOW3_SHIFT
TMC4361A_SH_REG12_VBREAK_MASK
TMC4361A_SH_REG12_VBREAK_SHIFT
TMC4361A_SH_REG13_BOW4_MASK
TMC4361A_SH_REG13_BOW4_SHIFT
TMC4361A_SH_REG13_BOW4_MASK
TMC4361A_SH_REG13_BOW4_SHIFT
TMC4361A_SH_REG13_VSTART_MASK
TMC4361A_SH_REG13_VSTART_SHIFT
TMC4361A_SH_REG13_VSTOP_MASK
TMC4361A_SH_REG13_VSTOP_SHIFT
TMC4361A_DFREEZE_MASK
TMC4361A_DFREEZE_SHIFT
TMC4361A_IFREEZE_MASK
TMC4361A_IFREEZE_SHIFT
TMC4361A_CLK_GATING_REG_MASK
TMC4361A_CLK_GATING_REG_SHIFT
TMC4361A_RESET_REG_MASK
TMC4361A_RESET_REG_SHIFT
TMC4361A_ENC_POS_MASK
TMC4361A_ENC_POS_SHIFT
TMC4361A_ENC_LATCH_MASK
TMC4361A_ENC_LATCH_SHIFT
TMC4361A_ENC_RESET_VAL_MASK
TMC4361A_ENC_RESET_VAL_SHIFT
TMC4361A_ENC_POS_DEV_MASK
TMC4361A_ENC_POS_DEV_SHIFT
TMC4361A_CL_TR_TOLERANCE_MASK
TMC4361A_CL_TR_TOLERANCE_SHIFT
TMC4361A_ENC_POS_DEV_TOL_MASK
TMC4361A_ENC_POS_DEV_TOL_SHIFT
TMC4361A_ENC_CONST_MASK
TMC4361A_ENC_CONST_SHIFT
TMC4361A_ENC_IN_RES_MASK
TMC4361A_ENC_IN_RES_SHIFT
TMC4361A_MANUAL_ENC_CONST_MASK
TMC4361A_MANUAL_ENC_CONST_SHIFT
TMC4361A_ENC_OUT_RES_MASK
TMC4361A_ENC_OUT_RES_SHIFT
TMC4361A_SER_CLK_IN_HIGH_MASK
TMC4361A_SER_CLK_IN_HIGH_SHIFT
TMC4361A_SER_CLK_IN_LOW_MASK
TMC4361A_SER_CLK_IN_LOW_SHIFT
TMC4361A_SSI_IN_CLK_DELAY_MASK
TMC4361A_SSI_IN_CLK_DELAY_SHIFT
TMC4361A_SSI_IN_WTIME_MASK
TMC4361A_SSI_IN_WTIME_SHIFT
TMC4361A_SSI_IN_CLK_DELAY_MASK
TMC4361A_SSI_IN_CLK_DELAY_SHIFT
TMC4361A_SSI_IN_WTIME_MASK
TMC4361A_SSI_IN_WTIME_SHIFT
TMC4361A_SER_PTIME_MASK
TMC4361A_SER_PTIME_SHIFT
TMC4361A_CL_OFFSET_MASK
TMC4361A_CL_OFFSET_SHIFT
TMC4361A_PID_VEL_MASK
TMC4361A_PID_VEL_SHIFT
TMC4361A_CL_VMAX_CALC_P_MASK
TMC4361A_CL_VMAX_CALC_P_SHIFT
TMC4361A_PID_P_MASK
TMC4361A_PID_P_SHIFT
TMC4361A_PID_ISUM_RD_MASK
TMC4361A_PID_ISUM_RD_SHIFT
TMC4361A_CL_VMAX_CALC_I_MASK
TMC4361A_CL_VMAX_CALC_I_SHIFT
TMC4361A_PID_I_MASK
TMC4361A_PID_I_SHIFT
TMC4361A_CL_DELTA_P_MASK
TMC4361A_CL_DELTA_P_SHIFT
TMC4361A_PID_D_MASK
TMC4361A_PID_D_SHIFT
TMC4361A_PID_E_MASK
TMC4361A_PID_E_SHIFT
TMC4361A_PID_I_CLIP_MASK
TMC4361A_PID_I_CLIP_SHIFT
TMC4361A_PID_D_CLKDIV_MASK
TMC4361A_PID_D_CLKDIV_SHIFT
TMC4361A_PID_DV_CLIP_MASK
TMC4361A_PID_DV_CLIP_SHIFT
TMC4361A_CL_TOLERANCE_MASK
TMC4361A_CL_TOLERANCE_SHIFT
TMC4361A_PID_TOLERANCE_MASK
TMC4361A_PID_TOLERANCE_SHIFT
TMC4361A_FS_VEL_MASK
TMC4361A_FS_VEL_SHIFT
TMC4361A_DC_VEL_MASK
TMC4361A_DC_VEL_SHIFT
TMC4361A_CL_VMIN_EMF_MASK
TMC4361A_CL_VMIN_EMF_SHIFT
TMC4361A_DC_TIME_MASK
TMC4361A_DC_TIME_SHIFT
TMC4361A_DC_SG_MASK
TMC4361A_DC_SG_SHIFT
TMC4361A_DC_BLKTIME_MASK
TMC4361A_DC_BLKTIME_SHIFT
TMC4361A_CL_VADD_EMF_MASK
TMC4361A_CL_VADD_EMF_SHIFT
TMC4361A_DC_LSPTM_MASK
TMC4361A_DC_LSPTM_SHIFT
TMC4361A_ENC_VEL_ZERO_MASK
TMC4361A_ENC_VEL_ZERO_SHIFT
TMC4361A_ENC_VMEAN_WAIT_MASK
TMC4361A_ENC_VMEAN_WAIT_SHIFT
TMC4361A_ENC_VMEAN_FILTER_MASK
TMC4361A_ENC_VMEAN_FILTER_SHIFT
TMC4361A_ENC_VMEAN_INT_MASK
TMC4361A_ENC_VMEAN_INT_SHIFT
TMC4361A_SER_ENC_VARIATION_MASK
TMC4361A_SER_ENC_VARIATION_SHIFT
TMC4361A_ENC_VMEAN_FILTER_MASK
TMC4361A_ENC_VMEAN_FILTER_SHIFT
TMC4361A_CL_CYCLE_MASK
TMC4361A_CL_CYCLE_SHIFT
TMC4361A_V_ENC_MASK
TMC4361A_V_ENC_SHIFT
TMC4361A_V_ENC_MEAN_MASK
TMC4361A_V_ENC_MEAN_SHIFT
TMC4361A_VSTALL_LIMIT_MASK
TMC4361A_VSTALL_LIMIT_SHIFT
TMC4361A_ADDR_TO_ENC_MASK
TMC4361A_ADDR_TO_ENC_SHIFT
TMC4361A_DATA_TO_ENC_MASK
TMC4361A_DATA_TO_ENC_SHIFT
TMC4361A_ADDR_FROM_ENC_MASK
TMC4361A_ADDR_FROM_ENC_SHIFT
TMC4361A_DATA_FROM_ENC_MASK
TMC4361A_DATA_FROM_ENC_SHIFT
TMC4361A_POLLING_STATUS_MASK
TMC4361A_POLLING_STATUS_SHIFT
TMC4361A_COVER_LOW_MASK
TMC4361A_COVER_LOW_SHIFT
TMC4361A_POLLING_STATUS_MASK
TMC4361A_POLLING_STATUS_SHIFT
TMC4361A_COVER_LOW_MASK
TMC4361A_COVER_LOW_SHIFT
TMC4361A_POLLING_REG_GSTAT_MASK
TMC4361A_POLLING_REG_GSTAT_SHIFT
TMC4361A_POLLING_REG_PWM_SCALE_MASK
TMC4361A_POLLING_REG_PWM_SCALE_SHIFT
TMC4361A_POLLING_REG_LOST_STEPS_MASK
TMC4361A_POLLING_REG_LOST_STEPS_SHIFT
TMC4361A_COVER_HIGH_MASK
TMC4361A_COVER_HIGH_SHIFT
TMC4361A_POLLING_REG_GSTAT_MASK
TMC4361A_POLLING_REG_GSTAT_SHIFT
TMC4361A_POLLING_REG_PWM_SCALE_MASK
TMC4361A_POLLING_REG_PWM_SCALE_SHIFT
TMC4361A_POLLING_REG_LOST_STEPS_MASK
TMC4361A_POLLING_REG_LOST_STEPS_SHIFT
TMC4361A_COVER_HIGH_MASK
TMC4361A_COVER_HIGH_SHIFT
TMC4361A_COVER_DRV_LOW_MASK
TMC4361A_COVER_DRV_LOW_SHIFT
TMC4361A_COVER_DRV_HIGH_MASK
TMC4361A_COVER_DRV_HIGH_SHIFT
TMC4361A_MSLUT_0_MASK
TMC4361A_MSLUT_0_SHIFT
TMC4361A_MSLUT_1_MASK
TMC4361A_MSLUT_1_SHIFT
TMC4361A_MSLUT_2_MASK
TMC4361A_MSLUT_2_SHIFT
TMC4361A_MSLUT_3_MASK
TMC4361A_MSLUT_3_SHIFT
TMC4361A_MSLUT_4_MASK
TMC4361A_MSLUT_4_SHIFT
TMC4361A_MSLUT_5_MASK
TMC4361A_MSLUT_5_SHIFT
TMC4361A_MSLUT_6_MASK
TMC4361A_MSLUT_6_SHIFT
TMC4361A_MSLUT_7_MASK
TMC4361A_MSLUT_7_SHIFT
TMC4361A_MSLUTSEL_MASK
TMC4361A_MSLUTSEL_SHIFT
TMC4361A_MSCNT_MASK
TMC4361A_MSCNT_SHIFT
TMC4361A_MSOFFSET_MASK
TMC4361A_MSOFFSET_SHIFT
TMC4361A_CURRENTA_MASK
TMC4361A_CURRENTA_SHIFT
TMC4361A_CURRENTB_MASK
TMC4361A_CURRENTB_SHIFT
TMC4361A_CURRENTA_SPI_MASK
TMC4361A_CURRENTA_SPI_SHIFT
TMC4361A_CURRENTB_SPI_MASK
TMC4361A_CURRENTB_SPI_SHIFT
TMC4361A_TZEROWAIT_MASK
TMC4361A_TZEROWAIT_SHIFT
TMC4361A_SCALE_PARAM_MASK
TMC4361A_SCALE_PARAM_SHIFT
TMC4361A_CIRCULAR_DEC_MASK
TMC4361A_CIRCULAR_DEC_SHIFT
TMC4361A_ENC_COMP_XOFFSET_MASK
TMC4361A_ENC_COMP_XOFFSET_SHIFT
TMC4361A_ENC_COMP_YOFFSET_MASK
TMC4361A_ENC_COMP_YOFFSET_SHIFT
TMC4361A_START_SIN_MASK
TMC4361A_START_SIN_SHIFT
TMC4361A_START_SIN90_120_MASK
TMC4361A_START_SIN90_120_SHIFT
TMC4361A_DAC_OFFSET_MASK
TMC4361A_DAC_OFFSET_SHIFT
TMC4361A_DAC_OFFSET_MASK
TMC4361A_DAC_OFFSET_SHIFT
TMC4361A_VERSION_NO_MASK
TMC4361A_VERSION_NO_SHIFT
file TMC4361A/TMC4361A_Register.h

Defines

TMC4361A_GENERAL_CONF
TMC4361A_REFERENCE_CONF
TMC4361A_START_CONF
TMC4361A_INPUT_FILT_CONF
TMC4361A_SPIOUT_CONF
TMC4361A_CURRENT_CONF
TMC4361A_SCALE_VALUES
TMC4361A_ENC_IN_CONF
TMC4361A_ENC_IN_DATA
TMC4361A_ENC_OUT_DATA
TMC4361A_STEP_CONF
TMC4361A_SPI_STATUS_SELECTION
TMC4361A_EVENT_CLEAR_CONF
TMC4361A_INTR_CONF
TMC4361A_EVENTS
TMC4361A_STATUS
TMC4361A_STP_LENGTH_ADD
TMC4361A_DIR_SETUP_TIME
TMC4361A_START_OUT_ADD
TMC4361A_GEAR_RATIO
TMC4361A_START_DELAY
TMC4361A_CLK_GATING_DELAY
TMC4361A_STDBY_DELAY
TMC4361A_FREEWHEEL_DELAY
TMC4361A_VDRV_SCALE_LIMIT
TMC4361A_PWM_VMAX
TMC4361A_UP_SCALE_DELAY
TMC4361A_CL_UPSCALE_DELAY
TMC4361A_HOLD_SCALE_DELAY
TMC4361A_CL_DOWNSCALE_DELAY
TMC4361A_DRV_SCALE_DELAY
TMC4361A_BOOST_TIME
TMC4361A_CL_BETA
TMC4361A_CL_GAMMA
TMC4361A_DAC_ADDR_A
TMC4361A_DAC_ADDR_B
TMC4361A_SPI_SWITCH_VEL
TMC4361A_HOME_SAFETY_MARGIN
TMC4361A_PWM_FREQ
TMC4361A_CHOPSYNC_DIV
TMC4361A_RAMPMODE
TMC4361A_XACTUAL
TMC4361A_VACTUAL
TMC4361A_AACTUAL
TMC4361A_VMAX
TMC4361A_VSTART
TMC4361A_VSTOP
TMC4361A_VBREAK
TMC4361A_AMAX
TMC4361A_DMAX
TMC4361A_ASTART
TMC4361A_SIGN_AACT
TMC4361A_DFINAL
TMC4361A_DSTOP
TMC4361A_BOW1
TMC4361A_BOW2
TMC4361A_BOW3
TMC4361A_BOW4
TMC4361A_CLK_FREQ
TMC4361A_POS_COMP
TMC4361A_VIRT_STOP_LEFT
TMC4361A_VIRT_STOP_RIGHT
TMC4361A_X_HOME
TMC4361A_X_LATCH_RD
TMC4361A_REV_CNT_RD
TMC4361A_X_RANGE_WR
TMC4361A_X_TARGET
TMC4361A_X_PIPE0
TMC4361A_X_PIPE1
TMC4361A_X_PIPE2
TMC4361A_X_PIPE3
TMC4361A_X_PIPE4
TMC4361A_X_PIPE5
TMC4361A_X_PIPE6
TMC4361A_X_PIPE7
TMC4361A_SH_REG0
TMC4361A_SH_REG1
TMC4361A_SH_REG2
TMC4361A_SH_REG3
TMC4361A_SH_REG4
TMC4361A_SH_REG5
TMC4361A_SH_REG6
TMC4361A_SH_REG7
TMC4361A_SH_REG8
TMC4361A_SH_REG9
TMC4361A_SH_REG10
TMC4361A_SH_REG11
TMC4361A_SH_REG12
TMC4361A_SH_REG13
TMC4361A_DFREEZE
TMC4361A_IFREEZE
TMC4361A_CLK_GATING_REG
TMC4361A_RESET_REG
TMC4361A_ENC_POS
TMC4361A_ENC_LATCH_RD
TMC4361A_ENC_RESET_VAL_WR
TMC4361A_ENC_POS_DEV_RD
TMC4361A_CL_TR_TOLERANCE_WR
TMC4361A_ENC_POS_DEV_TOL_WR
TMC4361A_ENC_IN_RES_WR
TMC4361A_ENC_CONST_RD
TMC4361A_MANUAL_ENC_CONST0
TMC4361A_ENC_OUT_RES
TMC4361A_SER_CLK_IN_HIGH_WR
TMC4361A_SER_CLK_IN_LOW_WR
TMC4361A_SSI_IN_CLK_DELAY_WR
TMC4361A_SSI_IN_WTIME_WR
TMC4361A_SER_PTIME_WR
TMC4361A_CL_OFFSET
TMC4361A_PID_P_WR
TMC4361A_CL_VMAX_CALC_P_WR
TMC4361A_PID_VEL_RD
TMC4361A_PID_I_WR
TMC4361A_CL_VMAX_CALC_I_WR
TMC4361A_PID_ISUM_RD
TMC4361A_PID_D_WR
TMC4361A_CL_DELTA_P_WR
TMC4361A_PID_I_CLIP_WR
TMC4361A_PID_D_CLKDIV_WR
TMC4361A_PID_E_RD
TMC4361A_PID_DV_CLIP_WR
TMC4361A_PID_TOLERANCE_WR
TMC4361A_CL_TOLERANCE_WR
TMC4361A_FS_VEL_WR
TMC4361A_DC_VEL_WR
TMC4361A_CL_VMIN_EMF_WR
TMC4361A_DC_TIME_WR
TMC4361A_DC_SG_WR
TMC4361A_DC_BLKTIME_WR
TMC4361A_CL_VADD_EMF
TMC4361A_DC_LSPTM_WR
TMC4361A_ENC_VEL_ZERO_WR
TMC4361A_ENC_VMEAN_WAIT_WR
TMC4361A_ENC_VMEAN_FILTER_WR
TMC4361A_ENC_VMEAN_INT_WR
TMC4361A_SER_ENC_VARIATION_WR
TMC4361A_CL_CYCLE_WR
TMC4361A_SYNCHRO_SET
TMC4361A_V_ENC_RD
TMC4361A_V_ENC_MEAN_RD
TMC4361A_VSTALL_LIMIT_WR
TMC4361A_ADDR_TO_ENC
TMC4361A_DATA_TO_ENC
TMC4361A_ADDR_FROM_ENC
TMC4361A_DATA_FROM_ENC
TMC4361A_COVER_LOW_WR
TMC4361A_POLLING_STATUS_RD
TMC4361A_COVER_HIGH_WR
TMC4361A_POLLING_REG_WR
TMC4361A_COVER_DRV_LOW_RD
TMC4361A_COVER_DRV_HIGH_RD
TMC4361A_MSLUT_0_WR
TMC4361A_MSLUT_1_WR
TMC4361A_MSLUT_2_WR
TMC4361A_MSLUT_3_WR
TMC4361A_MSLUT_4_WR
TMC4361A_MSLUT_5_WR
TMC4361A_MSLUT_6_WR
TMC4361A_MSLUT_7_WR
TMC4361A_MSLUTSEL_WR
TMC4361A_MSCNT_RD
TMC4361A_MSOFFSET_WR
TMC4361A_CURRENTA_RD
TMC4361A_CURRENTB_RD
TMC4361A_CURRENTA_SPI_RD
TMC4361A_CURRENTB_SPI_RD
TMC4361A_TZEROWAIT_WR
TMC4361A_SCALE_PARAM_RD
TMC4361A_CIRCULAR_DEC_WR
TMC4361A_ENC_COMP_XOFFSET
TMC4361A_ENC_COMP_YOFFSET
TMC4361A_ENC_COMP_AMPL
TMC4361A_START_SIN_WR
TMC4361A_START_SIN90_120_WR
TMC4361A_DAC_OFFSET_WR
TMC4361A_VERSION_NO_RD
file TMC43xx/TMC4361A_Register.h

Defines

TMC4361A_GENERAL_CONF
TMC4361A_REFERENCE_CONF
TMC4361A_START_CONF
TMC4361A_INPUT_FILT_CONF
TMC4361A_SPIOUT_CONF
TMC4361A_CURRENT_CONF
TMC4361A_SCALE_VALUES
TMC4361A_ENC_IN_CONF
TMC4361A_ENC_IN_DATA
TMC4361A_ENC_OUT_DATA
TMC4361A_STEP_CONF
TMC4361A_SPI_STATUS_SELECTION
TMC4361A_EVENT_CLEAR_CONF
TMC4361A_INTR_CONF
TMC4361A_EVENTS
TMC4361A_STATUS
TMC4361A_STP_LENGTH_ADD
TMC4361A_DIR_SETUP_TIME
TMC4361A_START_OUT_ADD
TMC4361A_GEAR_RATIO
TMC4361A_START_DELAY
TMC4361A_CLK_GATING_DELAY
TMC4361A_STDBY_DELAY
TMC4361A_FREEWHEEL_DELAY
TMC4361A_VDRV_SCALE_LIMIT
TMC4361A_PWM_VMAX
TMC4361A_UP_SCALE_DELAY
TMC4361A_CL_UPSCALE_DELAY
TMC4361A_HOLD_SCALE_DELAY
TMC4361A_CL_DOWNSCALE_DELAY
TMC4361A_DRV_SCALE_DELAY
TMC4361A_BOOST_TIME
TMC4361A_CL_BETA
TMC4361A_CL_GAMMA
TMC4361A_DAC_ADDR_A
TMC4361A_DAC_ADDR_B
TMC4361A_SPI_SWITCH_VEL
TMC4361A_HOME_SAFETY_MARGIN
TMC4361A_PWM_FREQ
TMC4361A_CHOPSYNC_DIV
TMC4361A_RAMPMODE
TMC4361A_XACTUAL
TMC4361A_VACTUAL
TMC4361A_AACTUAL
TMC4361A_VMAX
TMC4361A_VSTART
TMC4361A_VSTOP
TMC4361A_VBREAK
TMC4361A_AMAX
TMC4361A_DMAX
TMC4361A_ASTART
TMC4361A_SIGN_AACT
TMC4361A_DFINAL
TMC4361A_DSTOP
TMC4361A_BOW1
TMC4361A_BOW2
TMC4361A_BOW3
TMC4361A_BOW4
TMC4361A_CLK_FREQ
TMC4361A_POS_COMP
TMC4361A_VIRT_STOP_LEFT
TMC4361A_VIRT_STOP_RIGHT
TMC4361A_X_HOME
TMC4361A_X_LATCH_RD
TMC4361A_REV_CNT_RD
TMC4361A_X_RANGE_WR
TMC4361A_X_TARGET
TMC4361A_X_PIPE0
TMC4361A_X_PIPE1
TMC4361A_X_PIPE2
TMC4361A_X_PIPE3
TMC4361A_X_PIPE4
TMC4361A_X_PIPE5
TMC4361A_X_PIPE6
TMC4361A_X_PIPE7
TMC4361A_SH_REG0
TMC4361A_SH_REG1
TMC4361A_SH_REG2
TMC4361A_SH_REG3
TMC4361A_SH_REG4
TMC4361A_SH_REG5
TMC4361A_SH_REG6
TMC4361A_SH_REG7
TMC4361A_SH_REG8
TMC4361A_SH_REG9
TMC4361A_SH_REG10
TMC4361A_SH_REG11
TMC4361A_SH_REG12
TMC4361A_SH_REG13
TMC4361A_DFREEZE
TMC4361A_IFREEZE
TMC4361A_CLK_GATING_REG
TMC4361A_RESET_REG
TMC4361A_ENC_POS
TMC4361A_ENC_LATCH_RD
TMC4361A_ENC_RESET_VAL_WR
TMC4361A_ENC_POS_DEV_RD
TMC4361A_CL_TR_TOLERANCE_WR
TMC4361A_ENC_POS_DEV_TOL_WR
TMC4361A_ENC_IN_RES_WR
TMC4361A_ENC_CONST_RD
TMC4361A_MANUAL_ENC_CONST0
TMC4361A_ENC_OUT_RES
TMC4361A_SER_CLK_IN_HIGH_WR
TMC4361A_SER_CLK_IN_LOW_WR
TMC4361A_SSI_IN_CLK_DELAY_WR
TMC4361A_SSI_IN_WTIME_WR
TMC4361A_SER_PTIME_WR
TMC4361A_CL_OFFSET
TMC4361A_PID_P_WR
TMC4361A_CL_VMAX_CALC_P_WR
TMC4361A_PID_VEL_RD
TMC4361A_PID_I_WR
TMC4361A_CL_VMAX_CALC_I_WR
TMC4361A_PID_ISUM_RD
TMC4361A_PID_D_WR
TMC4361A_CL_DELTA_P_WR
TMC4361A_PID_I_CLIP_WR
TMC4361A_PID_D_CLKDIV_WR
TMC4361A_PID_E_RD
TMC4361A_PID_DV_CLIP_WR
TMC4361A_PID_TOLERANCE_WR
TMC4361A_CL_TOLERANCE_WR
TMC4361A_FS_VEL_WR
TMC4361A_DC_VEL_WR
TMC4361A_CL_VMIN_EMF_WR
TMC4361A_DC_TIME_WR
TMC4361A_DC_SG_WR
TMC4361A_DC_BLKTIME_WR
TMC4361A_CL_VADD_EMF
TMC4361A_DC_LSPTM_WR
TMC4361A_ENC_VEL_ZERO_WR
TMC4361A_ENC_VMEAN_WAIT_WR
TMC4361A_ENC_VMEAN_FILTER_WR
TMC4361A_ENC_VMEAN_INT_WR
TMC4361A_SER_ENC_VARIATION_WR
TMC4361A_CL_CYCLE_WR
TMC4361A_SYNCHRO_SET
TMC4361A_V_ENC_RD
TMC4361A_V_ENC_MEAN_RD
TMC4361A_VSTALL_LIMIT_WR
TMC4361A_ADDR_TO_ENC
TMC4361A_DATA_TO_ENC
TMC4361A_ADDR_FROM_ENC
TMC4361A_DATA_FROM_ENC
TMC4361A_COVER_LOW_WR
TMC4361A_POLLING_STATUS_RD
TMC4361A_COVER_HIGH_WR
TMC4361A_POLLING_REG_WR
TMC4361A_COVER_DRV_LOW_RD
TMC4361A_COVER_DRV_HIGH_RD
TMC4361A_MSLUT_0_WR
TMC4361A_MSLUT_1_WR
TMC4361A_MSLUT_2_WR
TMC4361A_MSLUT_3_WR
TMC4361A_MSLUT_4_WR
TMC4361A_MSLUT_5_WR
TMC4361A_MSLUT_6_WR
TMC4361A_MSLUT_7_WR
TMC4361A_MSLUTSEL_WR
TMC4361A_MSCNT_RD
TMC4361A_MSOFFSET_WR
TMC4361A_CURRENTA_RD
TMC4361A_CURRENTB_RD
TMC4361A_CURRENTA_SPI_RD
TMC4361A_CURRENTB_SPI_RD
TMC4361A_TZEROWAIT_WR
TMC4361A_SCALE_PARAM_RD
TMC4361A_CIRCULAR_DEC_WR
TMC4361A_ENC_COMP_XOFFSET
TMC4361A_ENC_COMP_YOFFSET
TMC4361A_ENC_COMP_AMPL
TMC4361A_START_SIN_WR
TMC4361A_START_SIN90_120_WR
TMC4361A_DAC_OFFSET_WR
TMC4361A_VERSION_NO_RD
TMC4361A_COVER_DONE
TMC4361A_RAMP_HOLD
TMC4361A_RAMP_TRAPEZ
TMC4361A_RAMP_SSHAPE
TMC4361A_RAMP_POSITION
TMC4361A_RAMP_HOLD
file Configs.h
file TMC4331A_Register.h

Defines

TMC4331A_GENERAL_CONF
TMC4331A_REFERENCE_CONF
TMC4331A_START_CONF
TMC4331A_INPUT_FILT_CONF
TMC4331A_SPIOUT_CONF
TMC4331A_CURRENT_CONF
TMC4331A_SCALE_VALUES
TMC4331A_STEP_CONF
TMC4331A_SPI_STATUS_SELECTION
TMC4331A_EVENT_CLEAR_CONF
TMC4331A_INTR_CONF
TMC4331A_EVENTS
TMC4331A_STATUS
TMC4331A_STP_LENGTH_ADD
TMC4331A_DIR_SETUP_TIME
TMC4331A_START_OUT_ADD
TMC4331A_GEAR_RATIO
TMC4331A_START_DELAY
TMC4331A_CLK_GATING_DELAY
TMC4331A_STDBY_DELAY
TMC4331A_FREEWHEEL_DELAY
TMC4331A_VDRV_SCALE_LIMIT
TMC4331A_PWM_VMAX
TMC4331A_UP_SCALE_DELAY
TMC4331A_HOLD_SCALE_DELAY
TMC4331A_DRV_SCALE_DELAY
TMC4331A_BOOST_TIME
TMC4331A_DAC_ADDR_A
TMC4331A_DAC_ADDR_B
TMC4331A_SPI_SWITCH_VEL
TMC4331A_HOME_SAFETY_MARGIN
TMC4331A_PWM_FREQ
TMC4331A_CHOPSYNC_DIV
TMC4331A_RAMPMODE
TMC4331A_XACTUAL
TMC4331A_VACTUAL
TMC4331A_AACTUAL
TMC4331A_VMAX
TMC4331A_VSTART
TMC4331A_VSTOP
TMC4331A_VBREAK
TMC4331A_AMAX
TMC4331A_DMAX
TMC4331A_ASTART
TMC4331A_SIGN_AACT
TMC4331A_DFINAL
TMC4331A_DSTOP
TMC4331A_BOW1
TMC4331A_BOW2
TMC4331A_BOW3
TMC4331A_BOW4
TMC4331A_CLK_FREQ
TMC4331A_POS_COMP
TMC4331A_VIRT_STOP_LEFT
TMC4331A_VIRT_STOP_RIGHT
TMC4331A_X_HOME
TMC4331A_X_LATCH_RD
TMC4331A_REV_CNT_RD
TMC4331A_X_RANGE_WR
TMC4331A_X_TARGET
TMC4331A_X_PIPE0
TMC4331A_X_PIPE1
TMC4331A_X_PIPE2
TMC4331A_X_PIPE3
TMC4331A_X_PIPE4
TMC4331A_X_PIPE5
TMC4331A_X_PIPE6
TMC4331A_X_PIPE7
TMC4331A_SH_REG0
TMC4331A_SH_REG1
TMC4331A_SH_REG2
TMC4331A_SH_REG3
TMC4331A_SH_REG4
TMC4331A_SH_REG5
TMC4331A_SH_REG6
TMC4331A_SH_REG7
TMC4331A_SH_REG8
TMC4331A_SH_REG9
TMC4331A_SH_REG10
TMC4331A_SH_REG11
TMC4331A_SH_REG12
TMC4331A_SH_REG13
TMC4331A_CLK_GATING_REG
TMC4331A_RESET_REG
TMC4331A_FS_VEL_WR
TMC4331A_DC_VEL_WR
TMC4331A_DC_TIME_WR
TMC4331A_DC_SG_WR
TMC4331A_DC_BLKTIME_WR
TMC4331A_DC_LSPTM_WR
TMC4331A_SYNCHRO_SET
TMC4331A_VSTALL_LIMIT_WR
TMC4331A_COVER_LOW_WR
TMC4331A_POLLING_STATUS_RD
TMC4331A_COVER_HIGH_WR
TMC4331A_POLLING_REG_WR
TMC4331A_COVER_DRV_LOW_RD
TMC4331A_COVER_DRV_HIGH_RD
TMC4331A_MSLUT_0_WR
TMC4331A_MSLUT_1_WR
TMC4331A_MSLUT_2_WR
TMC4331A_MSLUT_3_WR
TMC4331A_MSLUT_4_WR
TMC4331A_MSLUT_5_WR
TMC4331A_MSLUT_6_WR
TMC4331A_MSLUT_7_WR
TMC4331A_MSLUTSEL_WR
TMC4331A_MSCNT_RD
TMC4331A_MSOFFSET_WR
TMC4331A_CURRENTA_RD
TMC4331A_CURRENTB_RD
TMC4331A_CURRENTA_SPI_RD
TMC4331A_CURRENTB_SPI_RD
TMC4331A_TZEROWAIT_WR
TMC4331A_SCALE_PARAM_RD
TMC4331A_CIRCULAR_DEC_WR
TMC4331A_START_SIN_WR
TMC4331A_START_SIN90_120_WR
TMC4331A_DAC_OFFSET_WR
TMC4331A_VERSION_NO_RD
TMC4331A_COVER_DONE
TMC4331A_RAMP_HOLD
TMC4331A_RAMP_TRAPEZ
TMC4331A_RAMP_SSHAPE
TMC4331A_RAMP_POSITION
TMC4331A_RAMP_HOLD
file TMC4361_Register.h

Defines

TMC4361_GENERAL_CONF
TMC4361_REFERENCE_CONF
TMC4361_START_CONF
TMC4361_INPUT_FILT_CONF
TMC4361_SPIOUT_CONF
TMC4361_CURRENT_CONF
TMC4361_SCALE_VALUES
TMC4361_ENC_IN_CONF
TMC4361_ENC_IN_DATA
TMC4361_ENC_OUT_DATA
TMC4361_STEP_CONF
TMC4361_SPI_STATUS_SELECTION
TMC4361_EVENT_CLEAR_CONF
TMC4361_INTR_CONF
TMC4361_EVENTS
TMC4361_STATUS
TMC4361_STP_LENGTH_ADD
TMC4361_DIR_SETUP_TIME
TMC4361_START_OUT_ADD
TMC4361_GEAR_RATIO
TMC4361_START_DELAY
TMC4361_CLK_GATING_DELAY
TMC4361_STDBY_DELAY
TMC4361_FREEWHEEL_DELAY
TMC4361_VDRV_SCALE_LIMIT
TMC4361_PWM_VMAX
TMC4361_UP_SCALE_DELAY
TMC4361_CL_UPSCALE_DELAY
TMC4361_HOLD_SCALE_DELAY
TMC4361_CL_DOWNSCALE_DELAY
TMC4361_DRV_SCALE_DELAY
TMC4361_BOOST_TIME
TMC4361_CL_BETA
TMC4361_CL_GAMMA
TMC4361_DAC_ADDR_A
TMC4361_DAC_ADDR_B
TMC4361_SPI_SWITCH_VEL
TMC4361_HOME_SAFETY_MARGIN
TMC4361_PWM_FREQ
TMC4361_CHOPSYNC_DIV
TMC4361_RAMPMODE
TMC4361_XACTUAL
TMC4361_VACTUAL
TMC4361_AACTUAL
TMC4361_VMAX
TMC4361_VSTART
TMC4361_VSTOP
TMC4361_VBREAK
TMC4361_AMAX
TMC4361_DMAX
TMC4361_ASTART
TMC4361_SIGN_AACT
TMC4361_DFINAL
TMC4361_DSTOP
TMC4361_BOW1
TMC4361_BOW2
TMC4361_BOW3
TMC4361_BOW4
TMC4361_CLK_FREQ
TMC4361_POS_COMP
TMC4361_VIRT_STOP_LEFT
TMC4361_VIRT_STOP_RIGHT
TMC4361_X_HOME
TMC4361_X_LATCH_RD
TMC4361_REV_CNT_RD
TMC4361_X_RANGE_WR
TMC4361_X_TARGET
TMC4361_X_PIPE0
TMC4361_X_PIPE1
TMC4361_X_PIPE2
TMC4361_X_PIPE3
TMC4361_X_PIPE4
TMC4361_X_PIPE5
TMC4361_X_PIPE6
TMC4361_X_PIPE7
TMC4361_SH_REG0
TMC4361_SH_REG1
TMC4361_SH_REG2
TMC4361_SH_REG3
TMC4361_SH_REG4
TMC4361_SH_REG5
TMC4361_SH_REG6
TMC4361_SH_REG7
TMC4361_SH_REG8
TMC4361_SH_REG9
TMC4361_SH_REG10
TMC4361_SH_REG11
TMC4361_SH_REG12
TMC4361_SH_REG13
TMC4361_DFREEZE
TMC4361_IFREEZE
TMC4361_CLK_GATING_REG
TMC4361_ENC_POS
TMC4361_ENC_LATCH_RD
TMC4361_ENC_RESET_VAL_WR
TMC4361_ENC_POS_DEV_RD
TMC4361_CL_TR_TOLERANCE_WR
TMC4361_ENC_POS_DEV_TOL_WR
TMC4361_ENC_IN_RES_WR
TMC4361_ENC_CONST_RD
TMC4361_MANUAL_ENC_CONST0
TMC4361_ENC_OUT_RES
TMC4361_SER_CLK_IN_HIGH_WR
TMC4361_SER_CLK_IN_LOW_WR
TMC4361_SSI_IN_CLK_DELAY_WR
TMC4361_SSI_IN_WTIME_WR
TMC4361_SER_PTIME_WR
TMC4361_CL_OFFSET
TMC4361_PID_P_WR
TMC4361_CL_VMAX_CALC_P_WR
TMC4361_PID_VEL_RD
TMC4361_PID_I_WR
TMC4361_CL_VMAX_CALC_I_WR
TMC4361_PID_ISUM_RD
TMC4361_PID_D_WR
TMC4361_CL_DELTA_P_WR
TMC4361_PID_I_CLIP_WR
TMC4361_PID_D_CLKDIV_WR
TMC4361_PID_E_RD
TMC4361_PID_DV_CLIP_WR
TMC4361_PID_TOLERANCE_WR
TMC4361_CL_TOLERANCE_WR
TMC4361_FS_VEL_WR
TMC4361_DC_VEL_WR
TMC4361_CL_VMIN_EMF_WR
TMC4361_DC_TIME_WR
TMC4361_DC_SG_WR
TMC4361_DC_BLKTIME_WR
TMC4361_CL_VADD_EMF
TMC4361_DC_LSPTM_WR
TMC4361_ENC_VEL_ZERO_WR
TMC4361_ENC_VMEAN_WAIT_WR
TMC4361_ENC_VMEAN_FILTER_WR
TMC4361_ENC_VMEAN_INT_WR
TMC4361_SER_ENC_VARIATION_WR
TMC4361_CL_CYCLE_WR
TMC4361_SYNCHRO_SET
TMC4361_V_ENC_RD
TMC4361_V_ENC_MEAN_RD
TMC4361_VSTALL_LIMIT_WR
TMC4361_ADDR_TO_ENC
TMC4361_DATA_TO_ENC
TMC4361_ADDR_FROM_ENC
TMC4361_DATA_FROM_ENC
TMC4361_COVER_LOW_WR
TMC4361_COVER_HIGH_WR
TMC4361_COVER_DRV_LOW_RD
TMC4361_COVER_DRV_HIGH_RD
TMC4361_MSLUT_0_WR
TMC4361_MSLUT_1_WR
TMC4361_MSLUT_2_WR
TMC4361_MSLUT_3_WR
TMC4361_MSLUT_4_WR
TMC4361_MSLUT_5_WR
TMC4361_MSLUT_6_WR
TMC4361_MSLUT_7_WR
TMC4361_MSLUTSEL_WR
TMC4361_MSCNT_RD
TMC4361_MSOFFSET_WR
TMC4361_CURRENTA_RD
TMC4361_CURRENTB_RD
TMC4361_CURRENTA_SPI_RD
TMC4361_CURRENTB_SPI_RD
TMC4361_TZEROWAIT_WR
TMC4361_SCALE_PARAM_RD
TMC4361_CIRCULAR_DEC_WR
TMC4361_ENC_COMP_XOFFSET
TMC4361_ENC_COMP_YOFFSET
TMC4361_ENC_COMP_AMPL
TMC4361_START_SIN_WR
TMC4361_START_SIN90_120_WR
TMC4361_DAC_OFFSET_WR
TMC4361_VERSION_NO_RD
TMC4361_COVER_DONE
TMC4361_RAMP_HOLD
TMC4361_RAMP_TRAPEZ
TMC4361_RAMP_SSHAPE
TMC4361_RAMP_POSITION
file TMC43xx.c
#include “TMC43xx.h”
#include “TMC4361A_Register.h”

Defines

TMC4361A
DRVTYPE_TMC5130

Functions

int32_t tmc43xx_spi_readInt(uint8_t axis, uint8_t address)
void tmc43xx_spi_writeInt(uint8_t axis, uint8_t address, int32_t value)
void tmc43xx_writeBytes(uint8_t Axis, uint8_t Address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc43xx_writeInt(uint8_t Axis, uint8_t Address, int32_t Value)
int32_t tmc43xx_readInt(uint8_t Axis, uint8_t Address)
void tmc43xx_setBits(uint8_t Axis, uint8_t Address, uint32_t BitMask)
void tmc43xx_clearBits(uint8_t Axis, uint8_t Address, uint32_t BitMask)
void tmc43xx_writeBits(uint8_t Axis, uint8_t Address, uint32_t Value, uint8_t Start, uint8_t Size)
uint32_t tmc43xx_peekEvents(uint8_t Axis)
uint32_t tmc43xx_readAndClearEvents(uint8_t Axis, uint32_t EventMask)
void tmc43xx_hardStop(uint8_t Axis)
void tmc43xx_init(uint8_t numberOfMotors)
uint8_t tmc43xx_getHomeInput(uint8_t Motor)
uint8_t tmc43xx_moveToNextFullstep(uint8_t Axis)

Variables

uint8_t tmc43xx_VMaxModified
const TMotorConfig MotorConfig = {64, 8, 200, 0}
const TClosedLoopConfig ClosedLoopConfig = {0, 300000, 600000, 255, 256, 0, 100, 240, 0, 1000, 10000, 10000, 20, 10, 0, 1073741823, 65536, 100, 100, 0, 7, 500, 0,}
file TMC43xx.h
#include “tmc/helpers/API_Header.h”

Defines

TMC43xx_WRITE
TMC43xx_GCONF_USE_AVSTART
TMC43xx_GCONF_DIRECT_ACC_EN
TMC43xx_GCONF_DIRECT_BOW_EN
TMC43xx_GCONF_STEP_INACT_POL
TMC43xx_GCONF_TOGGLE_STEP
TMC43xx_GCONF_POL_DIR_OUT
TMC43xx_GCONF_INT_SD
TMC43xx_GCONF_EXT_SD_HIGH
TMC43xx_GCONF_EXT_SD_LOW
TMC43xx_GCONF_EXT_SD_TOGGLE
TMC43xx_GCONF_DIR_IN_POL
TMC43xx_GCONF_SD_INDIRECT
TMC43xx_GCONF_ENC_INC
TMC43xx_GCONF_ENC_SSI
TMC43xx_GCONF_ENC_BISS
TMC43xx_GCONF_ENC_SPI
TMC43xx_GCONF_ENC_DIFF_DIS
TMC43xx_GCONF_STDBY_CLOCK_LOW
TMC43xx_GCONF_STDBY_CLOCK_HIGH
TMC43xx_GCONF_STDBY_CHOPSYNC
TMC43xx_GCONF_STDBY_CLOCK_INT
TMC43xx_GCONF_INTR_POL
TMC43xx_GCONF_TARGET_REACHED_POL
TMC43xx_GCONF_CLK_GATING_EN
TMC43xx_GCONF_CLK_GATING_STDBY_EN
TMC43xx_GCONF_FS_EN
TMC43xx_GCONF_FS_SDOUT
TMC43xx_GCONF_DCSTEP_OFF
TMC43xx_GCONF_DCSTEP_AUTO
TMC43xx_GCONF_DCSTEP_TMC21xx
TMC43xx_GCONF_DCSTEP_TMC26x
TMC43xx_GCONF_PWM_OUT_EN
TMC43xx_GCONF_SER_ENC_OUT_EN
TMC43xx_GCONF_SER_ENC_OUT_DIFF
TMC43xx_GCONF_AUTO_DIRECT_SD_OFF
TMC43xx_GCONF_CIRC_CNT_XLATCH
TMC43xx_GCONF_REV_DIR
TMC43xx_GCONF_INTR_TR_PU_PD_EN
TMC43xx_GCONF_INTR_WIRED_AND
TMC43xx_GCONF_TR_WIRED_AND
TMC43xx_SPIOUT_OFF
TMC43xx_SPIOUT_TMC23x
TMC43xx_SPIOUT_TMC24x
TMC43xx_SPIOUT_TMC26x_389
TMC43xx_SPIOUT_TMC26x_389_SD
TMC43xx_SPIOUT_TMC21xx_SD
TMC43xx_SPIOUT_TMC21xx
TMC43xx_SPIOUT_SCALE
TMC43xx_SPIOUT_SINLUT
TMC43xx_SPIOUT_DACADDR
TMC43xx_SPIOUT_DAC
TMC43xx_SPIOUT_DAC_INV
TMC43xx_SPIOUT_DAC_MAPPED
TMC43xx_SPIOUT_COVER_ONLY
TMC43xx_SPIOUT_MD_OFF
TMC43xx_SPIOUT_MD_FALLING
TMC43xx_SPIOUT_MD_NO_STANDBY
TMC43xx_SPIOUT_MD_ALWAYS
TMC43xx_SPIOUT_STDBY_ON_STALL
TMC43xx_SPIOUT_STALL_FLAG
TMC43xx_STALL_LOAD_LIMIT(x)
TMC43xx_SPIOUT_PHASE_SHIFT
TMC43xx_SPIOUT_THREE_PHASE_EN
TMC43xx_SPIOUT_SCALE_VAL_TR_EN
TMC43xx_SPIOUT_DISABLE_POLLING
TMC43xx_SPIOUT_ENABLE_SHADOW_DATAGRAMS
TMC43xx_SPIOUT_POLL_BLOCK_MULTI(x)
TMC43xx_SPIOUT_COVER_DONE_NOT_FOR_CURRENT
TMC43xx_ENC_IN_MODE_OL
TMC43xx_ENC_IN_MODE_CL
TMC43xx_ENC_IN_MODE_PID_0
TMC43xx_ENC_IN_MODE
TMC43xx_ENC_IN_CL_CALIBRATION_EN
TMC43xx_ENC_IN_CL_EMF_EN
TMC43xx_ENC_IN_CL_VLIMIT_EN
TMC43xx_ENC_IN_CL_VELOCITY_EN
TMC43xx_ENC_IN_SER_VAR_LIMIT
TMC43xx_CURCONF_HOLD_EN
TMC43xx_CURCONF_DRIVE_EN
TMC43xx_CURCONF_BOOST_ACC_EN
TMC43xx_CURCONF_BOOST_DEC_EN
TMC43xx_CURCONF_BOOST_START_EN
TMC43xx_CURCONF_SEC_DRIVE_EN
TMC43xx_CURCONF_FREEWHEELING_EN
TMC43xx_CURCONF_CL_SCALE_EN
TMC43xx_CURCONF_PWM_SCALE_REF
TMC43xx_CURCONF_PWM_AMPL(x)
TMC43xx_SCALEVAL_BOOST(x)
TMC43xx_SCALEVAL_DRV1(x)
TMC43xx_SCALEVAL_DRV2(x)
TMC43xx_SCALEVAL_HOLD(x)
TMC43xx_EV_TARGET_REACHED
TMC43xx_EV_POSCOMP_REACHED
TMC43xx_EV_VELOCITY_REACHED
TMC43xx_EV_VZERO
TMC43xx_EV_VPOSITIVE
TMC43xx_EV_VNEGATIVE
TMC43xx_EV_AZERO
TMC43xx_EV_APOSITIVE
TMC43xx_EV_ANEGATIVE
TMC43xx_EV_MAX_PHASE_TRAP
TMC43xx_EV_FROZEN
TMC43xx_EV_STOP_LEFT
TMC43xx_EV_STOP_RIGHT
TMC43xx_EV_VIRT_STOP_LEFT
TMC43xx_EV_VIRT_STOP_RIGHT
TMC43xx_EV_HOME_ERROR
TMC43xx_EV_XLATCH_DONE
TMC43xx_EV_FS_ACTIVE
TMC43xx_EV_ENC_FAIL
TMC43xx_EV_N_ACTIVE
TMC43xx_EV_ENC_DONE
TMC43xx_EV_SER_ENC_DATA_FAIL
TMC43xx_EV_CRC_FAIL
TMC43xx_EV_SER_DATA_DONE
TMC43xx_EV_BISS_FLAG
TMC43xx_EV_COVER_DONE
TMC43xx_EV_ENC_VZERO
TMC43xx_EV_CL_MAX
TMC43xx_EV_CL_FIT
TMC43xx_EV_STOP_ON_STALL
TMC43xx_EV_MOTOR
TMC43xx_EV_RST
TMC43xx_ST_TARGET_REACHED
TMC43xx_ST_POSCOMP_REACHED
TMC43xx_ST_VEL_REACHED
TMC43xx_ST_VEL_POS
TMC43xx_ST_VEL_NEG
TMC43xx_ST_RAMP_ACC
TMC43xx_ST_RAMP_DEC
TMC43xx_ST_STOP_LEFT_ACTIVE
TMC43xx_ST_STOP_RIGHT_ACTIVE
TMC43xx_ST_VIRT_STOP_LEFT_ACTIVE
TMC43xx_ST_VIRT_STOP_RIGHT_ACTIVE
TMC43xx_ST_HOME_ERROR
TMC43xx_ST_ENC_FAIL
TMC43xx_RAMPMODE_VEL_HOLD
TMC43xx_RAMPMODE_VEL_TRAPEZ
TMC43xx_RAMPMODE_VEL_SSHAPE
TMC43xx_RAMPMODE_POS_HOLD
TMC43xx_RAMPMODE_POS_TRAPEZ
TMC43xx_RAMPMODE_POS_SSHAPE
TMC43xx_REFCONF_STOP_LEFT_EN
TMC43xx_REFCONF_STOP_RIGHT_EN
TMC43xx_REFCONF_POL_STOP_LEFT
TMC43xx_REFCONF_POL_STOP_RIGHT
TMC43xx_REFCONF_INV_STOP_DIR
TMC43xx_REFCONF_SOFT_STOP_EN
TMC43xx_REFCONF_VIRT_LEFT_LIM_EN
TMC43xx_REFCONF_VIRT_RIGHT_LIM_EN
TMC43xx_REFCONF_VIRT_STOP_HARD
TMC43xx_REFCONF_VIRT_STOP_LINEAR
TMC43xx_REFCONF_CIRCULAR
TMC43xx_REFCONF_STOP_ON_STALL
TMC43xx_REFCONF_DRV_AFTER_STALL
TMC43xx_REFCONF_CIRCULAR_ENC_EN

Functions

void tmc43xx_writeBytes(uint8_t Axis, uint8_t Address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc43xx_writeInt(uint8_t Axis, uint8_t Address, int32_t Value)
int32_t tmc43xx_readInt(uint8_t Axis, uint8_t Address)
void tmc43xx_setBits(uint8_t Axis, uint8_t Address, uint32_t BitMask)
void tmc43xx_clearBits(uint8_t Axis, uint8_t Address, uint32_t BitMask)
void tmc43xx_writeBits(uint8_t Axis, uint8_t Address, uint32_t Value, uint8_t Start, uint8_t Size)
uint32_t tmc43xx_peekEvents(uint8_t Axis)
uint32_t tmc43xx_readAndClearEvents(uint8_t Axis, uint32_t EventMask)
uint8_t tmc43xx_getHomeInput(uint8_t Motor)
uint8_t tmc43xx_moveToNextFullstep(uint8_t Axis)
void tmc43xx_hardStop(uint8_t Axis)
void tmc43xx_init(uint8_t numberOfMotors)
file TMC457.c
#include “TMC457.h”

Defines

MIRROR(x)

Functions

static void ReadWrite457(uint8_t *Read, uint8_t *Write)
void Write457Zero(uint8_t Address)

Clear a TMC457 register.

Write zero to a TMC457 register (and to its software copy).

Parameters:

Address – Address of the register

void Write457Int(uint8_t Address, int32_t Value)

Write integer to a TMC457 register.

Write a value to a TMC457 register (and to its software copy).

Parameters:

  • Address – TMC457 register address

  • Value – Value to be written to the TMC457 register

void Write457Wavetable(uint16_t RAMAddress, uint16_t Value)

Write to the TMC457 wavetable RAM.

Write a 16 bit value to the given location of the wavetable RAM of the TMC457.

Parameters:

  • RAMAddress – Address into TMC457 wavetable RAM

  • Value – 16 bit value to be written

int32_t Read457Int(uint8_t Address)

Read TMC457 register.

Read a TMC457 register and return its value. If this is a write-only register then the contents will be taken from the software copy.

Parameters:

Address – register to be read from

Returns:

contents of that register

uint16_t Read457Wavetable(uint16_t RAMAddress)

Read a value from the TMC457 wavetable RAM.

This function reads a 16 bit value from the TMC457 wavetable RAM.

Parameters:

RAMAddress – Address in wavetable RAM

Returns:

Value read from the wavetable RAM

void Set457RampMode(uint32_t RampMode)

Set ramp mode of the TMC457.

Change the ramp mode of the TMC457. To be used with the TMC457_RM_xxx constants.

Parameters:

RampMode – Ramp mode to be set

void Init457Wavetable(uint32_t Resolution, int32_t Offset)

Initialize wavetable for the given microstep resolution.

This function initializes the TMC457 wavetable for a given microstep resolution. An offset can also be given (depending on the motor this optimizes the zero crossing).

Parameters:

  • Resolution – Microstep resolution (0..11, 0=2048, 1=1024, …)

  • Offset – Wavetable offset (mostly 0)

void Init457(void)

Intialize the TMC457.

This function does the necessary initializations on the TMC457.

void HardStop()

Stop the motor immediately.

Stop motor immediately.

This function stops the motor immediately (hard stop) by switching to velocity mode and then zeroing the V_TARGT and V_ACTUAL registers.

This function stops the motor immediately, without using the decelaration ramp.

Variables

static const uint16_t IntSinTable[4096]
static const uint8_t TMC457RegisterReadable[128] = {1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1}
static int32_t TMC457SoftwareCopy[128]
file TMC457.h
#include “tmc/helpers/API_Header.h”
#include “TMC457_Register.h”

Functions

void Write457Zero(uint8_t Address)

Clear a TMC457 register.

Write zero to a TMC457 register (and to its software copy).

Parameters:

Address – Address of the register

void Write457Int(uint8_t Address, int32_t Value)

Write integer to a TMC457 register.

Write a value to a TMC457 register (and to its software copy).

Parameters:

  • Address – TMC457 register address

  • Value – Value to be written to the TMC457 register

void Write457Wavetable(uint16_t RAMAddress, uint16_t Value)

Write to the TMC457 wavetable RAM.

Write a 16 bit value to the given location of the wavetable RAM of the TMC457.

Parameters:

  • RAMAddress – Address into TMC457 wavetable RAM

  • Value – 16 bit value to be written

int32_t Read457Int(uint8_t Address)

Read TMC457 register.

Read a TMC457 register and return its value. If this is a write-only register then the contents will be taken from the software copy.

Parameters:

Address – register to be read from

Returns:

contents of that register

uint16_t Read457Wavetable(uint16_t RAMAddress)

Read a value from the TMC457 wavetable RAM.

This function reads a 16 bit value from the TMC457 wavetable RAM.

Parameters:

RAMAddress – Address in wavetable RAM

Returns:

Value read from the wavetable RAM

void Set457RampMode(uint32_t RampMode)

Set ramp mode of the TMC457.

Change the ramp mode of the TMC457. To be used with the TMC457_RM_xxx constants.

Parameters:

RampMode – Ramp mode to be set

void Init457Wavetable(uint32_t Resolution, int32_t Offset)

Initialize wavetable for the given microstep resolution.

This function initializes the TMC457 wavetable for a given microstep resolution. An offset can also be given (depending on the motor this optimizes the zero crossing).

Parameters:

  • Resolution – Microstep resolution (0..11, 0=2048, 1=1024, …)

  • Offset – Wavetable offset (mostly 0)

void Init457(void)

Intialize the TMC457.

This function does the necessary initializations on the TMC457.

void HardStop()

Stop the motor immediately.

Stop motor immediately.

This function stops the motor immediately (hard stop) by switching to velocity mode and then zeroing the V_TARGT and V_ACTUAL registers.

This function stops the motor immediately, without using the decelaration ramp.

file TMC457_Register.h

Defines

TMC457_MODE
TMC457_XACTUAL
TMC457_VACTUAL
TMC457_VMAX
TMC457_VTARGET
TMC457_AMAX
TMC457_DMAX
TMC457_DSTOP
TMC457_BOWMAX
TMC457_XTARGET
TMC457_XCOMPARE
TMC457_STATUS
TMC457_AACTUAL
TMC457_SDSCALE
TMC457_AMAX_DMAX
TMC457_ENC_CONST
TMC457_ENC_X
TMC457_ENC_CLRMODE
TMC457_ENC_STATUS
TMC457_ENC_LATCH
TMC457_XLATCH
TMC457_ENC_WARNDIST
TMC457_VENC_US_CONST
TMC457_VENC_US_POS
TMC457_VENC_US_SEL
TMC457_PID_P
TMC457_PID_I
TMC457_PID_D
TMC457_PID_ICLIP
TMC457_PID_ISUM
TMC457_PID_DCLKDIV
TMC457_PID_DV_CPU
TMC457_PID_DV_CLIP
TMC457_PID_E
TMC457_PID_VACTUAL
TMC457_PID_TOLERANCE
TMC457_PULSE_MAX
TMC457_PULSE_XSTEP_DIV
TMC457_STEP_DIR_MODE
TMC457_MICROSTEP_POS
TMC457_STDBY_DELAY
TMC457_PULSE_LENGTH
TMC457_SWITCH_MODE
TMC457_SWITCH_STATUS
TMC457_POSLIM_LEFT
TMC457_POSLIM_RIGHT
TMC457_SEQ_MODE
TMC457_SEQ_DAC_SCALE
TMC457_SEQ_STALL_THRESHOLD
TMC457_SEQ_DRIVER_STATUS
TMC457_CHOP_CLK_DIV
TMC457_VERSION
TMC457_INT_MASK
TMC457_INT_FLAGS
TMC457_WAVETAB
TMC457_WRITE
TMC457_RM_POSITION
TMC457_RM_RESERVED
TMC457_RM_VELOCITY
TMC457_RM_HOLD
TMC457_RM_SHAFT
TMC457_RM_PID
TMC457_RM_PID_BASE
TMC457_ST_X_REACHED
TMC457_ST_V_REACHED
TMC457_ST_V_ZERO
TMC457_ST_ENC_WARN
TMC457_IRQ_TARGET
TMC457_IRQ_DEVIATION
TMC457_IRQ_ENCN
TMC457_IRQ_STOP
TMC457_IRQ_DRVSTATUS
TMC457_IRQ_REFL
TMC457_IRQ_REFR
TMC457_IRQ_XCOMP
TMC457_DRV_ERROR
TMC457_DRV_OTPW
TMC457_DRV_STALL
file TMC4671.c
#include “TMC4671.h”

Defines

STATE_NOTHING_TO_DO
STATE_START_INIT
STATE_WAIT_INIT_TIME
STATE_ESTIMATE_OFFSET

Functions

uint8_t tmc4671_readwriteByte(uint8_t motor, uint8_t data, uint8_t lastTransfer)
int32_t tmc4671_readInt(uint8_t motor, uint8_t address)
void tmc4671_writeInt(uint8_t motor, uint8_t address, int32_t value)
uint16_t tmc4671_readRegister16BitValue(uint8_t motor, uint8_t address, uint8_t channel)
void tmc4671_writeRegister16BitValue(uint8_t motor, uint8_t address, uint8_t channel, uint16_t value)
void tmc4671_switchToMotionMode(uint8_t motor, uint8_t mode)
void tmc4671_setTargetTorque_raw(uint8_t motor, int32_t targetTorque)
int32_t tmc4671_getTargetTorque_raw(uint8_t motor)
int32_t tmc4671_getActualTorque_raw(uint8_t motor)
int32_t tmc4671_getActualRampTorque_raw(uint8_t motor)
void tmc4671_setTargetTorque_mA(uint8_t motor, uint16_t torqueMeasurementFactor, int32_t targetTorque)
int32_t tmc4671_getTargetTorque_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
int32_t tmc4671_getActualTorque_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
int32_t tmc4671_getTargetTorqueFluxSum_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
int32_t tmc4671_getActualTorqueFluxSum_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
int32_t tmc4671_getActualRampTorque_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
void tmc4671_setTargetFlux_raw(uint8_t motor, int32_t targetFlux)
int32_t tmc4671_getTargetFlux_raw(uint8_t motor)
int32_t tmc4671_getActualFlux_raw(uint8_t motor)
void tmc4671_setTargetFlux_mA(uint8_t motor, uint16_t torqueMeasurementFactor, int32_t targetFlux)
int32_t tmc4671_getTargetFlux_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
int32_t tmc4671_getActualFlux_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
void tmc4671_setTorqueFluxLimit_mA(uint8_t motor, uint16_t torqueMeasurementFactor, int32_t max)
int32_t tmc4671_getTorqueFluxLimit_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
void tmc4671_setTargetVelocity(uint8_t motor, int32_t targetVelocity)
int32_t tmc4671_getTargetVelocity(uint8_t motor)
int32_t tmc4671_getActualVelocity(uint8_t motor)
int32_t tmc4671_getActualRampVelocity(uint8_t motor)
void tmc4671_setAbsolutTargetPosition(uint8_t motor, int32_t targetPosition)
void tmc4671_setRelativeTargetPosition(uint8_t motor, int32_t relativePosition)
int32_t tmc4671_getTargetPosition(uint8_t motor)
void tmc4671_setActualPosition(uint8_t motor, int32_t actualPosition)
int32_t tmc4671_getActualPosition(uint8_t motor)
int32_t tmc4671_getActualRampPosition(uint8_t motor)
void tmc4671_doEncoderInitializationMode0(uint8_t motor, uint8_t *initState, uint16_t initWaitTime, uint16_t *actualInitWaitTime, uint16_t startVoltage, uint16_t *last_Phi_E_Selection, uint32_t *last_UQ_UD_EXT, int16_t *last_PHI_E_EXT)
int16_t tmc4671_getS16CircleDifference(int16_t newValue, int16_t oldValue)
void tmc4671_doEncoderInitializationMode2(uint8_t motor, uint8_t *initState, uint16_t *actualInitWaitTime, int16_t *hall_phi_e_old, int16_t *hall_phi_e_new, int16_t *hall_actual_coarse_offset, uint16_t *last_Phi_E_Selection)
void tmc4671_checkEncderInitialization(uint8_t motor, uint32_t actualSystick, uint8_t initMode, uint8_t *initState, uint16_t initWaitTime, uint16_t *actualInitWaitTime, uint16_t startVoltage, int16_t *hall_phi_e_old, int16_t *hall_phi_e_new, int16_t *hall_actual_coarse_offset, uint16_t *last_Phi_E_Selection, uint32_t *last_UQ_UD_EXT, int16_t *last_PHI_E_EXT)
void tmc4671_periodicJob(uint8_t motor, uint32_t actualSystick, uint8_t initMode, uint8_t *initState, uint16_t initWaitTime, uint16_t *actualInitWaitTime, uint16_t startVoltage, int16_t *hall_phi_e_old, int16_t *hall_phi_e_new, int16_t *hall_actual_coarse_offset, uint16_t *last_Phi_E_Selection, uint32_t *last_UQ_UD_EXT, int16_t *last_PHI_E_EXT)
void tmc4671_startEncoderInitialization(uint8_t mode, uint8_t *initMode, uint8_t *initState)
void tmc4671_updatePhiSelectionAndInitialize(uint8_t motor, uint8_t actualPhiESelection, uint8_t desiredPhiESelection, uint8_t initMode, uint8_t *initState)
void tmc4671_disablePWM(uint8_t motor)
uint8_t tmc4671_getMotorType(uint8_t motor)
void tmc4671_setMotorType(uint8_t motor, uint8_t motorType)
uint8_t tmc4671_getPolePairs(uint8_t motor)
void tmc4671_setPolePairs(uint8_t motor, uint8_t polePairs)
uint16_t tmc4671_getAdcI0Offset(uint8_t motor)
void tmc4671_setAdcI0Offset(uint8_t motor, uint16_t offset)
uint16_t tmc4671_getAdcI1Offset(uint8_t motor)
void tmc4671_setAdcI1Offset(uint8_t motor, uint16_t offset)
void tmc4671_setTorqueFluxPI(uint8_t motor, uint16_t pParameter, uint16_t iParameter)
void tmc4671_setVelocityPI(uint8_t motor, uint16_t pParameter, uint16_t iParameter)
void tmc4671_setPositionPI(uint8_t motor, uint16_t pParameter, uint16_t iParameter)
int32_t tmc4671_readFieldWithDependency(uint8_t motor, uint8_t reg, uint8_t dependsReg, uint32_t dependsValue, uint32_t mask, uint8_t shift)
file TMC4671.h
#include “tmc/helpers/API_Header.h”
#include “TMC4671_Register.h”
#include “TMC4671_Constants.h”
#include “TMC4671_Fields.h”

Defines

BIT_0_TO_15
BIT_16_TO_31
TMC4671_FIELD_READ(tdef, address, mask, shift)
TMC4671_FIELD_UPDATE(tdef, address, mask, shift, value)

Functions

int32_t tmc4671_readInt(uint8_t motor, uint8_t address)
void tmc4671_writeInt(uint8_t motor, uint8_t address, int32_t value)
uint16_t tmc4671_readRegister16BitValue(uint8_t motor, uint8_t address, uint8_t channel)
void tmc4671_writeRegister16BitValue(uint8_t motor, uint8_t address, uint8_t channel, uint16_t value)
void tmc4671_periodicJob(uint8_t motor, uint32_t actualSystick, uint8_t initMode, uint8_t *initState, uint16_t initWaitTime, uint16_t *actualInitWaitTime, uint16_t startVoltage, int16_t *hall_phi_e_old, int16_t *hall_phi_e_new, int16_t *hall_actual_coarse_offset, uint16_t *last_Phi_E_Selection, uint32_t *last_UQ_UD_EXT, int16_t *last_PHI_E_EXT)
void tmc4671_startEncoderInitialization(uint8_t mode, uint8_t *initMode, uint8_t *initState)
void tmc4671_updatePhiSelectionAndInitialize(uint8_t motor, uint8_t actualPhiESelection, uint8_t desiredPhiESelection, uint8_t initMode, uint8_t *initState)
void tmc4671_switchToMotionMode(uint8_t motor, uint8_t mode)
void tmc4671_setTargetTorque_raw(uint8_t motor, int32_t targetTorque)
int32_t tmc4671_getTargetTorque_raw(uint8_t motor)
int32_t tmc4671_getActualTorque_raw(uint8_t motor)
int32_t tmc4671_getActualRampTorque_raw(uint8_t motor)
void tmc4671_setTargetTorque_mA(uint8_t motor, uint16_t torqueMeasurementFactor, int32_t targetTorque)
int32_t tmc4671_getTargetTorque_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
int32_t tmc4671_getActualTorque_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
int32_t tmc4671_getTargetTorqueFluxSum_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
int32_t tmc4671_getActualTorqueFluxSum_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
int32_t tmc4671_getActualRampTorque_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
void tmc4671_setTargetFlux_raw(uint8_t motor, int32_t targetFlux)
int32_t tmc4671_getTargetFlux_raw(uint8_t motor)
int32_t tmc4671_getActualFlux_raw(uint8_t motor)
void tmc4671_setTargetFlux_mA(uint8_t motor, uint16_t torqueMeasurementFactor, int32_t targetFlux)
int32_t tmc4671_getTargetFlux_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
int32_t tmc4671_getActualFlux_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
void tmc4671_setTorqueFluxLimit_mA(uint8_t motor, uint16_t torqueMeasurementFactor, int32_t max)
int32_t tmc4671_getTorqueFluxLimit_mA(uint8_t motor, uint16_t torqueMeasurementFactor)
void tmc4671_setTargetVelocity(uint8_t motor, int32_t targetVelocity)
int32_t tmc4671_getTargetVelocity(uint8_t motor)
int32_t tmc4671_getActualVelocity(uint8_t motor)
int32_t tmc4671_getActualRampVelocity(uint8_t motor)
void tmc4671_setAbsolutTargetPosition(uint8_t motor, int32_t targetPosition)
void tmc4671_setRelativeTargetPosition(uint8_t motor, int32_t relativePosition)
int32_t tmc4671_getTargetPosition(uint8_t motor)
void tmc4671_setActualPosition(uint8_t motor, int32_t actualPosition)
int32_t tmc4671_getActualPosition(uint8_t motor)
int32_t tmc4671_getActualRampPosition(uint8_t motor)
void tmc4671_disablePWM(uint8_t motor)
uint8_t tmc4671_getMotorType(uint8_t motor)
void tmc4671_setMotorType(uint8_t motor, uint8_t motorType)
uint8_t tmc4671_getPolePairs(uint8_t motor)
void tmc4671_setPolePairs(uint8_t motor, uint8_t polePairs)
uint16_t tmc4671_getAdcI0Offset(uint8_t motor)
void tmc4671_setAdcI0Offset(uint8_t motor, uint16_t offset)
uint16_t tmc4671_getAdcI1Offset(uint8_t motor)
void tmc4671_setAdcI1Offset(uint8_t motor, uint16_t offset)
void tmc4671_setTorqueFluxPI(uint8_t motor, uint16_t pParameter, uint16_t iParameter)
void tmc4671_setVelocityPI(uint8_t motor, uint16_t pParameter, uint16_t iParameter)
void tmc4671_setPositionPI(uint8_t motor, uint16_t pParameter, uint16_t iParameter)
int32_t tmc4671_readFieldWithDependency(uint8_t motor, uint8_t reg, uint8_t dependsReg, uint32_t dependsValue, uint32_t mask, uint8_t shift)
file TMC4671_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC4671_MOTORS
TMC4671_STATUS_FLAGS_REF_MASK
TMC4671_STATUS_FLAGS_REF_SHIFT
file TMC4671_Fields.h

Defines

TMC4671_SI_TYPE_MASK
TMC4671_SI_TYPE_SHIFT
TMC4671_SI_VERSION_MASK
TMC4671_SI_VERSION_SHIFT
TMC4671_SI_DATE_MASK
TMC4671_SI_DATE_SHIFT
TMC4671_SI_TIME_MASK
TMC4671_SI_TIME_SHIFT
TMC4671_SI_VARIANT_MASK
TMC4671_SI_VARIANT_SHIFT
TMC4671_SI_BUILD_MASK
TMC4671_SI_BUILD_SHIFT
TMC4671_CHIP_INFO_ADDRESS_MASK
TMC4671_CHIP_INFO_ADDRESS_SHIFT
TMC4671_ADC_I0_RAW_MASK
TMC4671_ADC_I0_RAW_SHIFT
TMC4671_ADC_I1_RAW_MASK
TMC4671_ADC_I1_RAW_SHIFT
TMC4671_ADC_VM_RAW_MASK
TMC4671_ADC_VM_RAW_SHIFT
TMC4671_ADC_AGPI_A_RAW_MASK
TMC4671_ADC_AGPI_A_RAW_SHIFT
TMC4671_ADC_AGPI_B_RAW_MASK
TMC4671_ADC_AGPI_B_RAW_SHIFT
TMC4671_ADC_AENC_UX_RAW_MASK
TMC4671_ADC_AENC_UX_RAW_SHIFT
TMC4671_ADC_AENC_VN_RAW_MASK
TMC4671_ADC_AENC_VN_RAW_SHIFT
TMC4671_ADC_AENC_WY_RAW_MASK
TMC4671_ADC_AENC_WY_RAW_SHIFT
TMC4671_ADC_RAW_ADDR_MASK
TMC4671_ADC_RAW_ADDR_SHIFT
TMC4671_CFG_DSMODULATOR_A_MASK
TMC4671_CFG_DSMODULATOR_A_SHIFT
TMC4671_MCLK_POLARITY_A_MASK
TMC4671_MCLK_POLARITY_A_SHIFT
TMC4671_MDAT_POLARITY_A_MASK
TMC4671_MDAT_POLARITY_A_SHIFT
TMC4671_SEL_NCLK_MCLK_I_A_MASK
TMC4671_SEL_NCLK_MCLK_I_A_SHIFT
TMC4671_BLANKING_A_MASK
TMC4671_BLANKING_A_SHIFT
TMC4671_CFG_DSMODULATOR_B_MASK
TMC4671_CFG_DSMODULATOR_B_SHIFT
TMC4671_MCLK_POLARITY_B_MASK
TMC4671_MCLK_POLARITY_B_SHIFT
TMC4671_MDAT_POLARITY_B_MASK
TMC4671_MDAT_POLARITY_B_SHIFT
TMC4671_SEL_NCLK_MCLK_I_B_MASK
TMC4671_SEL_NCLK_MCLK_I_B_SHIFT
TMC4671_BLANKING_B_MASK
TMC4671_BLANKING_B_SHIFT
TMC4671_DSADC_MCLK_A_MASK
TMC4671_DSADC_MCLK_A_SHIFT
TMC4671_DSADC_MCLK_B_MASK
TMC4671_DSADC_MCLK_B_SHIFT
TMC4671_DSADC_MDEC_A_MASK
TMC4671_DSADC_MDEC_A_SHIFT
TMC4671_DSADC_MDEC_B_MASK
TMC4671_DSADC_MDEC_B_SHIFT
TMC4671_ADC_I1_OFFSET_MASK
TMC4671_ADC_I1_OFFSET_SHIFT
TMC4671_ADC_I1_SCALE_MASK
TMC4671_ADC_I1_SCALE_SHIFT
TMC4671_ADC_I0_OFFSET_MASK
TMC4671_ADC_I0_OFFSET_SHIFT
TMC4671_ADC_I0_SCALE_MASK
TMC4671_ADC_I0_SCALE_SHIFT
TMC4671_ADC_I0_SELECT_MASK
TMC4671_ADC_I0_SELECT_SHIFT
TMC4671_ADC_I1_SELECT_MASK
TMC4671_ADC_I1_SELECT_SHIFT
TMC4671_ADC_I_UX_SELECT_MASK
TMC4671_ADC_I_UX_SELECT_SHIFT
TMC4671_ADC_I_V_SELECT_MASK
TMC4671_ADC_I_V_SELECT_SHIFT
TMC4671_ADC_I_WY_SELECT_MASK
TMC4671_ADC_I_WY_SELECT_SHIFT
TMC4671_ADC_I0_EXT_MASK
TMC4671_ADC_I0_EXT_SHIFT
TMC4671_ADC_I1_EXT_MASK
TMC4671_ADC_I1_EXT_SHIFT
TMC4671_ADC_I0_MASK
TMC4671_ADC_I0_SHIFT
TMC4671_ADC_I1_MASK
TMC4671_ADC_I1_SHIFT
TMC4671_ADC_VW_MASK
TMC4671_ADC_VW_SHIFT
TMC4671_ADC_AGPI_A_MASK
TMC4671_ADC_AGPI_A_SHIFT
TMC4671_ADC_AGPI_B_MASK
TMC4671_ADC_AGPI_B_SHIFT
TMC4671_ADC_AENC_UX_MASK
TMC4671_ADC_AENC_UX_SHIFT
TMC4671_ADC_AENC_VN_MASK
TMC4671_ADC_AENC_VN_SHIFT
TMC4671_ADC_AENC_WY_MASK
TMC4671_ADC_AENC_WY_SHIFT
TMC4671_AENC_0_OFFSET_MASK
TMC4671_AENC_0_OFFSET_SHIFT
TMC4671_AENC_0_SCALE_MASK
TMC4671_AENC_0_SCALE_SHIFT
TMC4671_AENC_1_OFFSET_MASK
TMC4671_AENC_1_OFFSET_SHIFT
TMC4671_AENC_1_SCALE_MASK
TMC4671_AENC_1_SCALE_SHIFT
TMC4671_AENC_2_OFFSET_MASK
TMC4671_AENC_2_OFFSET_SHIFT
TMC4671_AENC_2_SCALE_MASK
TMC4671_AENC_2_SCALE_SHIFT
TMC4671_AENC_0_SELECT_MASK
TMC4671_AENC_0_SELECT_SHIFT
TMC4671_AENC_1_SELECT_MASK
TMC4671_AENC_1_SELECT_SHIFT
TMC4671_AENC_2_SELECT_MASK
TMC4671_AENC_2_SELECT_SHIFT
TMC4671_ADC_IUX_MASK
TMC4671_ADC_IUX_SHIFT
TMC4671_ADC_IWY_MASK
TMC4671_ADC_IWY_SHIFT
TMC4671_ADC_IV_MASK
TMC4671_ADC_IV_SHIFT
TMC4671_AENC_UX_MASK
TMC4671_AENC_UX_SHIFT
TMC4671_AENC_WY_MASK
TMC4671_AENC_WY_SHIFT
TMC4671_AENC_VN_MASK
TMC4671_AENC_VN_SHIFT
TMC4671_PWM_POLARITIES_0_MASK
TMC4671_PWM_POLARITIES_0_SHIFT
TMC4671_PWM_POLARITIES_1_MASK
TMC4671_PWM_POLARITIES_1_SHIFT
TMC4671_PWM_POLARITIES_2_MASK
TMC4671_PWM_POLARITIES_2_SHIFT
TMC4671_PWM_POLARITIES_3_MASK
TMC4671_PWM_POLARITIES_3_SHIFT
TMC4671_PWM_POLARITIES_4_MASK
TMC4671_PWM_POLARITIES_4_SHIFT
TMC4671_PWM_POLARITIES_5_MASK
TMC4671_PWM_POLARITIES_5_SHIFT
TMC4671_PWM_POLARITIES_6_MASK
TMC4671_PWM_POLARITIES_6_SHIFT
TMC4671_PWM_POLARITIES_7_MASK
TMC4671_PWM_POLARITIES_7_SHIFT
TMC4671_PWM_MAXCNT_MASK
TMC4671_PWM_MAXCNT_SHIFT
TMC4671_PWM_BBM_L_MASK
TMC4671_PWM_BBM_L_SHIFT
TMC4671_PWM_BBM_H_MASK
TMC4671_PWM_BBM_H_SHIFT
TMC4671_PWM_CHOP_MASK
TMC4671_PWM_CHOP_SHIFT
TMC4671_PWM_SV_MASK
TMC4671_PWM_SV_SHIFT
TMC4671_N_POLE_PAIRS_MASK
TMC4671_N_POLE_PAIRS_SHIFT
TMC4671_MOTOR_TYPE_MASK
TMC4671_MOTOR_TYPE_SHIFT
TMC4671_PHI_E_EXT_MASK
TMC4671_PHI_E_EXT_SHIFT
TMC4671_PHI_M_EXT_MASK
TMC4671_PHI_M_EXT_SHIFT
TMC4671_POSITION_EXT_MASK
TMC4671_POSITION_EXT_SHIFT
TMC4671_OPENLOOP_PHI_DIRECTION_MASK
TMC4671_OPENLOOP_PHI_DIRECTION_SHIFT
TMC4671_OPENLOOP_ACCELERATION_MASK
TMC4671_OPENLOOP_ACCELERATION_SHIFT
TMC4671_OPENLOOP_VELOCITY_TARGET_MASK
TMC4671_OPENLOOP_VELOCITY_TARGET_SHIFT
TMC4671_OPENLOOP_VELOCITY_ACTUAL_MASK
TMC4671_OPENLOOP_VELOCITY_ACTUAL_SHIFT
TMC4671_OPENLOOP_PHI_MASK
TMC4671_OPENLOOP_PHI_SHIFT
TMC4671_UD_EXT_MASK
TMC4671_UD_EXT_SHIFT
TMC4671_UQ_EXT_MASK
TMC4671_UQ_EXT_SHIFT
TMC4671_APOL_MASK
TMC4671_APOL_SHIFT
TMC4671_BPOL_MASK
TMC4671_BPOL_SHIFT
TMC4671_NPOL_MASK
TMC4671_NPOL_SHIFT
TMC4671_USE_ABN_AS_N_MASK
TMC4671_USE_ABN_AS_N_SHIFT
TMC4671_CLN_MASK
TMC4671_CLN_SHIFT
TMC4671_ABN_DIRECTION_MASK
TMC4671_ABN_DIRECTION_SHIFT
TMC4671_ABN_DECODER_PPR_MASK
TMC4671_ABN_DECODER_PPR_SHIFT
TMC4671_ABN_DECODER_COUNT_MASK
TMC4671_ABN_DECODER_COUNT_SHIFT
TMC4671_ABN_DECODER_COUNT_N_MASK
TMC4671_ABN_DECODER_COUNT_N_SHIFT
TMC4671_ABN_DECODER_PHI_M_OFFSET_MASK
TMC4671_ABN_DECODER_PHI_M_OFFSET_SHIFT
TMC4671_ABN_DECODER_PHI_E_OFFSET_MASK
TMC4671_ABN_DECODER_PHI_E_OFFSET_SHIFT
TMC4671_ABN_DECODER_PHI_M_MASK
TMC4671_ABN_DECODER_PHI_M_SHIFT
TMC4671_ABN_DECODER_PHI_E_MASK
TMC4671_ABN_DECODER_PHI_E_SHIFT
TMC4671_APOL_MASK
TMC4671_APOL_SHIFT
TMC4671_BPOL_MASK
TMC4671_BPOL_SHIFT
TMC4671_NPOL_MASK
TMC4671_NPOL_SHIFT
TMC4671_USE_ABN_AS_N_MASK
TMC4671_USE_ABN_AS_N_SHIFT
TMC4671_CLN_MASK
TMC4671_CLN_SHIFT
TMC4671_ABN_2_DIRECTION_MASK
TMC4671_ABN_2_DIRECTION_SHIFT
TMC4671_ABN_2_DECODER_PPR_MASK
TMC4671_ABN_2_DECODER_PPR_SHIFT
TMC4671_ABN_2_DECODER_COUNT_MASK
TMC4671_ABN_2_DECODER_COUNT_SHIFT
TMC4671_ABN_2_DECODER_COUNT_N_MASK
TMC4671_ABN_2_DECODER_COUNT_N_SHIFT
TMC4671_ABN_2_DECODER_PHI_M_OFFSET_MASK
TMC4671_ABN_2_DECODER_PHI_M_OFFSET_SHIFT
TMC4671_ABN_2_DECODER_PHI_M_MASK
TMC4671_ABN_2_DECODER_PHI_M_SHIFT
TMC4671_HALL_MODE_MASK
TMC4671_HALL_MODE_SHIFT
TMC4671_HALL_POLARITY_MASK
TMC4671_HALL_POLARITY_SHIFT
TMC4671_HALL_INTERPOLATION_MASK
TMC4671_HALL_INTERPOLATION_SHIFT
TMC4671_HALL_DIRECTION_MASK
TMC4671_HALL_DIRECTION_SHIFT
TMC4671_HALL_BLANK_MASK
TMC4671_HALL_BLANK_SHIFT
TMC4671_HALL_POSITION_000_MASK
TMC4671_HALL_POSITION_000_SHIFT
TMC4671_HALL_POSITION_060_MASK
TMC4671_HALL_POSITION_060_SHIFT
TMC4671_HALL_POSITION_120_MASK
TMC4671_HALL_POSITION_120_SHIFT
TMC4671_HALL_POSITION_180_MASK
TMC4671_HALL_POSITION_180_SHIFT
TMC4671_HALL_POSITION_240_MASK
TMC4671_HALL_POSITION_240_SHIFT
TMC4671_HALL_POSITION_300_MASK
TMC4671_HALL_POSITION_300_SHIFT
TMC4671_HALL_PHI_M_OFFSET_MASK
TMC4671_HALL_PHI_M_OFFSET_SHIFT
TMC4671_HALL_PHI_E_OFFSET_MASK
TMC4671_HALL_PHI_E_OFFSET_SHIFT
TMC4671_HALL_DPHI_MAX_MASK
TMC4671_HALL_DPHI_MAX_SHIFT
TMC4671_HALL_PHI_E_MASK
TMC4671_HALL_PHI_E_SHIFT
TMC4671_HALL_PHI_E_INTERPOLATED_MASK
TMC4671_HALL_PHI_E_INTERPOLATED_SHIFT
TMC4671_HALL_PHI_M_MASK
TMC4671_HALL_PHI_M_SHIFT
TMC4671_AENC_DECODER_MODE_0_MASK
TMC4671_AENC_DECODER_MODE_0_SHIFT
TMC4671_AENC_DECODER_MODE_12_MASK
TMC4671_AENC_DECODER_MODE_12_SHIFT
TMC4671_AENC_DECODER_N_THRESHOLD_MASK
TMC4671_AENC_DECODER_N_THRESHOLD_SHIFT
TMC4671_AENC_DECODER_N_MASK_MASK
TMC4671_AENC_DECODER_N_FIELDS
TMC4671_AENC_DECODER_PHI_A_RAW_MASK
TMC4671_AENC_DECODER_PHI_A_RAW_SHIFT
TMC4671_AENC_DECODER_PHI_A_OFFSET_MASK
TMC4671_AENC_DECODER_PHI_A_OFFSET_SHIFT
TMC4671_AENC_DECODER_PHI_A_MASK
TMC4671_AENC_DECODER_PHI_A_SHIFT
TMC4671_AENC_DECODER_PPR_MASK
TMC4671_AENC_DECODER_PPR_SHIFT
TMC4671_AENC_DECODER_COUNT_MASK
TMC4671_AENC_DECODER_COUNT_SHIFT
TMC4671_AENC_DECODER_COUNT_N_MASK
TMC4671_AENC_DECODER_COUNT_N_SHIFT
TMC4671_AENC_DECODER_PHI_M_OFFSET_MASK
TMC4671_AENC_DECODER_PHI_M_OFFSET_SHIFT
TMC4671_AENC_DECODER_PHI_E_OFFSET_MASK
TMC4671_AENC_DECODER_PHI_E_OFFSET_SHIFT
TMC4671_AENC_DECODER_PHI_M_MASK
TMC4671_AENC_DECODER_PHI_M_SHIFT
TMC4671_AENC_DECODER_PHI_E_MASK
TMC4671_AENC_DECODER_PHI_E_SHIFT
TMC4671_AENC_DECODER_POSITION_MASK
TMC4671_AENC_DECODER_POSITION_SHIFT
TMC4671_BIQUAD_X_A_1_MASK
TMC4671_BIQUAD_X_A_1_SHIFT
TMC4671_BIQUAD_X_A_2_MASK
TMC4671_BIQUAD_X_A_2_SHIFT
TMC4671_BIQUAD_X_B_0_MASK
TMC4671_BIQUAD_X_B_0_SHIFT
TMC4671_BIQUAD_X_B_1_MASK
TMC4671_BIQUAD_X_B_1_SHIFT
TMC4671_BIQUAD_X_B_2_MASK
TMC4671_BIQUAD_X_B_2_SHIFT
TMC4671_BIQUAD_X_ENABLE_MASK
TMC4671_BIQUAD_X_ENABLE_SHIFT
TMC4671_BIQUAD_V_A_1_MASK
TMC4671_BIQUAD_V_A_1_SHIFT
TMC4671_BIQUAD_V_A_2_MASK
TMC4671_BIQUAD_V_A_2_SHIFT
TMC4671_BIQUAD_V_B_0_MASK
TMC4671_BIQUAD_V_B_0_SHIFT
TMC4671_BIQUAD_V_B_1_MASK
TMC4671_BIQUAD_V_B_1_SHIFT
TMC4671_BIQUAD_V_B_2_MASK
TMC4671_BIQUAD_V_B_2_SHIFT
TMC4671_BIQUAD_V_ENABLE_MASK
TMC4671_BIQUAD_V_ENABLE_SHIFT
TMC4671_BIQUAD_T_A_1_MASK
TMC4671_BIQUAD_T_A_1_SHIFT
TMC4671_BIQUAD_T_A_2_MASK
TMC4671_BIQUAD_T_A_2_SHIFT
TMC4671_BIQUAD_T_B_0_MASK
TMC4671_BIQUAD_T_B_0_SHIFT
TMC4671_BIQUAD_T_B_1_MASK
TMC4671_BIQUAD_T_B_1_SHIFT
TMC4671_BIQUAD_T_B_2_MASK
TMC4671_BIQUAD_T_B_2_SHIFT
TMC4671_BIQUAD_T_ENABLE_MASK
TMC4671_BIQUAD_T_ENABLE_SHIFT
TMC4671_BIQUAD_F_A_1_MASK
TMC4671_BIQUAD_F_A_1_SHIFT
TMC4671_BIQUAD_F_A_2_MASK
TMC4671_BIQUAD_F_A_2_SHIFT
TMC4671_BIQUAD_F_B_0_MASK
TMC4671_BIQUAD_F_B_0_SHIFT
TMC4671_BIQUAD_F_B_1_MASK
TMC4671_BIQUAD_F_B_1_SHIFT
TMC4671_BIQUAD_F_B_2_MASK
TMC4671_BIQUAD_F_B_2_SHIFT
TMC4671_BIQUAD_F_ENABLE_MASK
TMC4671_BIQUAD_F_ENABLE_SHIFT
TMC4671_PRBS_AMPLITUDE_MASK
TMC4671_PRBS_AMPLITUDE_SHIFT
TMC4671_PRBS_DOWN_SAMPLING_RATIO_MASK
TMC4671_PRBS_DOWN_SAMPLING_RATIO_SHIFT
TMC4671_FEED_FORWARD_VELOCITY_GAIN_MASK
TMC4671_FEED_FORWARD_VELOCITY_GAIN_SHIFT
TMC4671_FEED_FORWARD_VELICITY_FILTER_CONSTANT_MASK
TMC4671_FEED_FORWARD_VELICITY_FILTER_CONSTANT_SHIFT
TMC4671_FEED_FORWARD_TORQUE_GAIN_MASK
TMC4671_FEED_FORWARD_TORQUE_GAIN_SHIFT
TMC4671_FEED_FORWARD_TORGUE_FILTER_CONSTANT_MASK
TMC4671_FEED_FORWARD_TORGUE_FILTER_CONSTANT_SHIFT
TMC4671_VELOCITY_METER_PPTM_MIN_POS_DEV_MASK
TMC4671_VELOCITY_METER_PPTM_MIN_POS_DEV_SHIFT
TMC4671_REF_SWITCH_CONFIG_MASK
TMC4671_REF_SWITCH_CONFIG_SHIFT
TMC4671_ENCODER_INIT_HALL_ENABLE_MASK
TMC4671_ENCODER_INIT_HALL_ENABLE_SHIFT
TMC4671_CONFIG_ADDR_MASK
TMC4671_CONFIG_ADDR_SHIFT
TMC4671_VELOCITY_SELECTION_MASK
TMC4671_VELOCITY_SELECTION_SHIFT
TMC4671_VELOCITY_METER_SELECTION_MASK
TMC4671_VELOCITY_METER_SELECTION_SHIFT
TMC4671_POSITION_SELECTION_MASK
TMC4671_POSITION_SELECTION_SHIFT
TMC4671_PHI_E_SELECTION_MASK
TMC4671_PHI_E_SELECTION_SHIFT
TMC4671_PHI_E_MASK
TMC4671_PHI_E_SHIFT
TMC4671_PID_FLUX_I_MASK
TMC4671_PID_FLUX_I_SHIFT
TMC4671_PID_FLUX_P_MASK
TMC4671_PID_FLUX_P_SHIFT
TMC4671_PID_TORQUE_I_MASK
TMC4671_PID_TORQUE_I_SHIFT
TMC4671_PID_TORQUE_P_MASK
TMC4671_PID_TORQUE_P_SHIFT
TMC4671_PID_VELOCITY_I_MASK
TMC4671_PID_VELOCITY_I_SHIFT
TMC4671_PID_VELOCITY_P_MASK
TMC4671_PID_VELOCITY_P_SHIFT
TMC4671_PID_POSITION_I_MASK
TMC4671_PID_POSITION_I_SHIFT
TMC4671_PID_POSITION_P_MASK
TMC4671_PID_POSITION_P_SHIFT
TMC4671_PID_TORQUE_FLUX_TARGET_DDT_LIMITS_MASK
TMC4671_PID_TORQUE_FLUX_TARGET_DDT_LIMITS_SHIFT
TMC4671_PIDOUT_UQ_UD_LIMITS_MASK
TMC4671_PIDOUT_UQ_UD_LIMITS_SHIFT
TMC4671_PID_TORQUE_FLUX_LIMITS_MASK
TMC4671_PID_TORQUE_FLUX_LIMITS_SHIFT
TMC4671_PID_ACCELERATION_LIMIT_MASK
TMC4671_PID_ACCELERATION_LIMIT_SHIFT
TMC4671_PID_VELOCITY_LIMIT_MASK
TMC4671_PID_VELOCITY_LIMIT_SHIFT
TMC4671_PID_POSITION_LIMIT_LOW_MASK
TMC4671_PID_POSITION_LIMIT_LOW_SHIFT
TMC4671_PID_POSITION_LIMIT_HIGH_MASK
TMC4671_PID_POSITION_LIMIT_HIGH_SHIFT
TMC4671_MODE_MOTION_MASK
TMC4671_MODE_MOTION_SHIFT
TMC4671_MODE_RAMP_MASK
TMC4671_MODE_RAMP_SHIFT
TMC4671_MODE_FF_MASK
TMC4671_MODE_FF_SHIFT
TMC4671_MODE_PID_SMPL_MASK
TMC4671_MODE_PID_SMPL_SHIFT
TMC4671_MODE_PID_TYPE_MASK
TMC4671_MODE_PID_TYPE_SHIFT
TMC4671_PID_FLUX_TARGET_MASK
TMC4671_PID_FLUX_TARGET_SHIFT
TMC4671_PID_TORQUE_TARGET_MASK
TMC4671_PID_TORQUE_TARGET_SHIFT
TMC4671_PID_FLUX_OFFSET_MASK
TMC4671_PID_FLUX_OFFSET_SHIFT
TMC4671_PID_TORQUE_OFFSET_MASK
TMC4671_PID_TORQUE_OFFSET_SHIFT
TMC4671_PID_VELOCITY_TARGET_MASK
TMC4671_PID_VELOCITY_TARGET_SHIFT
TMC4671_PID_VELOCITY_OFFSET_MASK
TMC4671_PID_VELOCITY_OFFSET_SHIFT
TMC4671_PID_POSITION_TARGET_MASK
TMC4671_PID_POSITION_TARGET_SHIFT
TMC4671_PID_FLUX_ACTUAL_MASK
TMC4671_PID_FLUX_ACTUAL_SHIFT
TMC4671_PID_TORQUE_ACTUAL_MASK
TMC4671_PID_TORQUE_ACTUAL_SHIFT
TMC4671_PID_VELOCITY_ACTUAL_MASK
TMC4671_PID_VELOCITY_ACTUAL_SHIFT
TMC4671_PID_POSITION_ACTUAL_MASK
TMC4671_PID_POSITION_ACTUAL_SHIFT
TMC4671_PID_TORQUE_ERROR_MASK
TMC4671_PID_TORQUE_ERROR_SHIFT
TMC4671_PID_FLUX_ERROR_MASK
TMC4671_PID_FLUX_ERROR_SHIFT
TMC4671_PID_VELOCITY_ERROR_MASK
TMC4671_PID_VELOCITY_ERROR_SHIFT
TMC4671_PID_POSITION_ERROR_MASK
TMC4671_PID_POSITION_ERROR_SHIFT
TMC4671_PID_TORQUE_ERROR_SUM_MASK
TMC4671_PID_TORQUE_ERROR_SUM_SHIFT
TMC4671_PID_FLUX_ERROR_SUM_MASK
TMC4671_PID_FLUX_ERROR_SUM_SHIFT
TMC4671_PID_VELOCITY_ERROR_SUM_MASK
TMC4671_PID_VELOCITY_ERROR_SUM_SHIFT
TMC4671_PID_POSITION_ERROR_SUM_MASK
TMC4671_PID_POSITION_ERROR_SUM_SHIFT
TMC4671_PID_ERROR_ADDR_MASK
TMC4671_PID_ERROR_ADDR_SHIFT
TMC4671_PIDIN_TARGET_TORQUE_MASK
TMC4671_PIDIN_TARGET_TORQUE_SHIFT
TMC4671_PIDIN_TARGET_FLUX_MASK
TMC4671_PIDIN_TARGET_FLUX_SHIFT
TMC4671_PIDIN_TARGET_VELOCITY_MASK
TMC4671_PIDIN_TARGET_VELOCITY_SHIFT
TMC4671_PIDIN_TARGET_POSITION_MASK
TMC4671_PIDIN_TARGET_POSITION_SHIFT
TMC4671_PIDOUT_TARGET_TORQUE_MASK
TMC4671_PIDOUT_TARGET_TORQUE_SHIFT
TMC4671_PIDOUT_TARGET_FLUX_MASK
TMC4671_PIDOUT_TARGET_FLUX_SHIFT
TMC4671_PIDOUT_TARGET_VELOCITY_MASK
TMC4671_PIDOUT_TARGET_VELOCITY_SHIFT
TMC4671_PIDOUT_TARGET_POSITION_MASK
TMC4671_PIDOUT_TARGET_POSITION_SHIFT
TMC4671_FOC_IUX_MASK
TMC4671_FOC_IUX_SHIFT
TMC4671_FOC_IWY_MASK
TMC4671_FOC_IWY_SHIFT
TMC4671_FOC_IV_MASK
TMC4671_FOC_IV_SHIFT
TMC4671_FOC_IA_MASK
TMC4671_FOC_IA_SHIFT
TMC4671_FOC_IB_MASK
TMC4671_FOC_IB_SHIFT
TMC4671_FOC_ID_MASK
TMC4671_FOC_ID_SHIFT
TMC4671_FOC_IQ_MASK
TMC4671_FOC_IQ_SHIFT
TMC4671_FOC_UD_MASK
TMC4671_FOC_UD_SHIFT
TMC4671_FOC_UQ_MASK
TMC4671_FOC_UQ_SHIFT
TMC4671_FOC_UD_LIMITED_MASK
TMC4671_FOC_UD_LIMITED_SHIFT
TMC4671_FOC_UQ_LIMITED_MASK
TMC4671_FOC_UQ_LIMITED_SHIFT
TMC4671_FOC_UA_MASK
TMC4671_FOC_UA_SHIFT
TMC4671_FOC_UB_MASK
TMC4671_FOC_UB_SHIFT
TMC4671_FOC_UUX_MASK
TMC4671_FOC_UUX_SHIFT
TMC4671_FOC_UWY_MASK
TMC4671_FOC_UWY_SHIFT
TMC4671_FOC_UV_MASK
TMC4671_FOC_UV_SHIFT
TMC4671_PWM_UX_MASK
TMC4671_PWM_UX_SHIFT
TMC4671_PWM_WY_MASK
TMC4671_PWM_WY_SHIFT
TMC4671_PWM_V_MASK
TMC4671_PWM_V_SHIFT
TMC4671_ADC_I_0_MASK
TMC4671_ADC_I_0_SHIFT
TMC4671_ADC_I_1_MASK
TMC4671_ADC_I_1_SHIFT
TMC4671_PID_FLUX_ACTUAL_DIV256_MASK
TMC4671_PID_FLUX_ACTUAL_DIV256_SHIFT
TMC4671_PID_TORQUE_ACTUAL_DIV256_MASK
TMC4671_PID_TORQUE_ACTUAL_DIV256_SHIFT
TMC4671_PID_FLUX_TARGET_DIV256_MASK
TMC4671_PID_FLUX_TARGET_DIV256_SHIFT
TMC4671_PID_TORQUE_TARGET_DIV256_MASK
TMC4671_PID_TORQUE_TARGET_DIV256_SHIFT
TMC4671_PID_VELOCITY_ACTUAL_DIV256_MASK
TMC4671_PID_VELOCITY_ACTUAL_DIV256_SHIFT
TMC4671_PID_VELOCITY_TARGET_DIV256_MASK
TMC4671_PID_VELOCITY_TARGET_DIV256_SHIFT
TMC4671_PID_VELOCITY_ACTUAL_LSB_MASK
TMC4671_PID_VELOCITY_ACTUAL_LSB_SHIFT
TMC4671_PID_VELOCITY_TARGET_LSB_MASK
TMC4671_PID_VELOCITY_TARGET_LSB_SHIFT
TMC4671_PID_POSITION_ACTUAL_DIV256_MASK
TMC4671_PID_POSITION_ACTUAL_DIV256_SHIFT
TMC4671_PID_POSITION_TARGET_DIV256_MASK
TMC4671_PID_POSITION_TARGET_DIV256_SHIFT
TMC4671_PID_POSITION_ACTUAL_LSB_MASK
TMC4671_PID_POSITION_ACTUAL_LSB_SHIFT
TMC4671_PID_POSITION_TARGET_LSB_MASK
TMC4671_PID_POSITION_TARGET_LSB_SHIFT
TMC4671_FF_VELOCITY_MASK
TMC4671_FF_VELOCITY_SHIFT
TMC4671_FF_TORQUE_MASK
TMC4671_FF_TORQUE_SHIFT
TMC4671_ACTUAL_VELOCITY_PPTM_MASK
TMC4671_ACTUAL_VELOCITY_PPTM_SHIFT
TMC4671_REF_SWITCH_STATUS_MASK
TMC4671_REF_SWITCH_STATUS_SHIFT
TMC4671_HOME_POSITION_MASK
TMC4671_HOME_POSITION_SHIFT
TMC4671_LEFT_POSITION_MASK
TMC4671_LEFT_POSITION_SHIFT
TMC4671_RIGHT_POSITION_MASK
TMC4671_RIGHT_POSITION_SHIFT
TMC4671_ENC_INIT_HALL_STATUS_MASK
TMC4671_ENC_INIT_HALL_STATUS_SHIFT
TMC4671_ENC_INIT_HALL_PHI_E_ABN_OFFSET_MASK
TMC4671_ENC_INIT_HALL_PHI_E_ABN_OFFSET_SHIFT
TMC4671_ENC_INIT_HALL_PHI_E_AENC_OFFSET_MASK
TMC4671_ENC_INIT_HALL_PHI_E_AENC_OFFSET_SHIFT
TMC4671_ENC_INIT_HALL_PHI_A_AENC_OFFSET_MASK
TMC4671_ENC_INIT_HALL_PHI_A_AENC_OFFSET_SHIFT
TMC4671_ENC_INIT_MINI_MOVE_STATUS_MASK
TMC4671_ENC_INIT_MINI_MOVE_STATUS_SHIFT
TMC4671_ENC_INIT_MINI_MOVE_U_D_MASK
TMC4671_ENC_INIT_MINI_MOVE_U_D_SHIFT
TMC4671_ENC_INIT_MINI_MOVE_PHI_E_OFFSET_MASK
TMC4671_ENC_INIT_MINI_MOVE_PHI_E_OFFSET_SHIFT
TMC4671_ENC_INIT_MINI_MOVE_PHI_E_MASK
TMC4671_ENC_INIT_MINI_MOVE_PHI_E_SHIFT
TMC4671_DEBUG_VALUE_0_MASK
TMC4671_DEBUG_VALUE_0_SHIFT
TMC4671_DEBUG_VALUE_1_MASK
TMC4671_DEBUG_VALUE_1_SHIFT
TMC4671_DEBUG_VALUE_2_MASK
TMC4671_DEBUG_VALUE_2_SHIFT
TMC4671_DEBUG_VALUE_3_MASK
TMC4671_DEBUG_VALUE_3_SHIFT
TMC4671_DEBUG_VALUE_4_MASK
TMC4671_DEBUG_VALUE_4_SHIFT
TMC4671_DEBUG_VALUE_5_MASK
TMC4671_DEBUG_VALUE_5_SHIFT
TMC4671_DEBUG_VALUE_6_MASK
TMC4671_DEBUG_VALUE_6_SHIFT
TMC4671_DEBUG_VALUE_7_MASK
TMC4671_DEBUG_VALUE_7_SHIFT
TMC4671_DEBUG_VALUE_8_MASK
TMC4671_DEBUG_VALUE_8_SHIFT
TMC4671_DEBUG_VALUE_9_MASK
TMC4671_DEBUG_VALUE_9_SHIFT
TMC4671_DEBUG_VALUE_10_MASK
TMC4671_DEBUG_VALUE_10_SHIFT
TMC4671_DEBUG_VALUE_11_MASK
TMC4671_DEBUG_VALUE_11_SHIFT
TMC4671_DEBUG_VALUE_12_MASK
TMC4671_DEBUG_VALUE_12_SHIFT
TMC4671_DEBUG_VALUE_13_MASK
TMC4671_DEBUG_VALUE_13_SHIFT
TMC4671_DEBUG_VALUE_14_MASK
TMC4671_DEBUG_VALUE_14_SHIFT
TMC4671_DEBUG_VALUE_15_MASK
TMC4671_DEBUG_VALUE_15_SHIFT
TMC4671_DEBUG_VALUE_16_MASK
TMC4671_DEBUG_VALUE_16_SHIFT
TMC4671_DEBUG_VALUE_17_MASK
TMC4671_DEBUG_VALUE_17_SHIFT
TMC4671_DEBUG_VALUE_18_MASK
TMC4671_DEBUG_VALUE_18_SHIFT
TMC4671_DEBUG_VALUE_19_MASK
TMC4671_DEBUG_VALUE_19_SHIFT
TMC4671_CONFIG_REG_0_MASK
TMC4671_CONFIG_REG_0_SHIFT
TMC4671_CONFIG_REG_1_MASK
TMC4671_CONFIG_REG_1_SHIFT
TMC4671_CTRL_PARAM_0_MASK
TMC4671_CTRL_PARAM_0_SHIFT
TMC4671_CTRL_PARAM_1_MASK
TMC4671_CTRL_PARAM_1_SHIFT
TMC4671_CTRL_PARAM_2_MASK
TMC4671_CTRL_PARAM_2_SHIFT
TMC4671_CTRL_PARAM_3_MASK
TMC4671_CTRL_PARAM_3_SHIFT
TMC4671_STATUS_REG_0_MASK
TMC4671_STATUS_REG_0_SHIFT
TMC4671_STATUS_REG_1_MASK
TMC4671_STATUS_REG_1_SHIFT
TMC4671_STATUS_PARAM_0_MASK
TMC4671_STATUS_PARAM_0_SHIFT
TMC4671_STATUS_PARAM_1_MASK
TMC4671_STATUS_PARAM_1_SHIFT
TMC4671_STATUS_PARAM_2_MASK
TMC4671_STATUS_PARAM_2_SHIFT
TMC4671_STATUS_PARAM_3_MASK
TMC4671_STATUS_PARAM_3_SHIFT
TMC4671_INTERIM_ADDR_MASK
TMC4671_INTERIM_ADDR_SHIFT
TMC4671_WATCHDOG_CFG_MASK
TMC4671_WATCHDOG_CFG_SHIFT
TMC4671_ADC_VM_LIMIT_LOW_MASK
TMC4671_ADC_VM_LIMIT_LOW_SHIFT
TMC4671_ADC_VM_LIMIT_HIGH_MASK
TMC4671_ADC_VM_LIMIT_HIGH_SHIFT
TMC4671_A_OF_ABN_RAW_MASK
TMC4671_A_OF_ABN_RAW_SHIFT
TMC4671_B_OF_ABN_RAW_MASK
TMC4671_B_OF_ABN_RAW_SHIFT
TMC4671_N_OF_ABN_RAW_MASK
TMC4671_N_OF_ABN_RAW_SHIFT
TMC4671_A_OF_ABN_2_RAW_MASK
TMC4671_A_OF_ABN_2_RAW_SHIFT
TMC4671_B_OF_ABN_2_RAW_MASK
TMC4671_B_OF_ABN_2_RAW_SHIFT
TMC4671_N_OF_ABN_2_RAW_MASK
TMC4671_N_OF_ABN_2_RAW_SHIFT
TMC4671_HALL_UX_OF_HALL_RAW_MASK
TMC4671_HALL_UX_OF_HALL_RAW_SHIFT
TMC4671_HALL_V_OF_HALL_RAW_MASK
TMC4671_HALL_V_OF_HALL_RAW_SHIFT
TMC4671_HALL_WY_OF_HALL_RAW_MASK
TMC4671_HALL_WY_OF_HALL_RAW_SHIFT
TMC4671_REF_SW_R_RAW_MASK
TMC4671_REF_SW_R_RAW_SHIFT
TMC4671_REF_SW_H_RAW_MASK
TMC4671_REF_SW_H_RAW_SHIFT
TMC4671_REF_SW_L_RAW_MASK
TMC4671_REF_SW_L_RAW_SHIFT
TMC4671_ENABLE_IN_RAW_MASK
TMC4671_ENABLE_IN_RAW_SHIFT
TMC4671_STP_OF_DIRSTP_RAW_MASK
TMC4671_STP_OF_DIRSTP_RAW_SHIFT
TMC4671_DIR_OF_DIRSTP_RAW_MASK
TMC4671_DIR_OF_DIRSTP_RAW_SHIFT
TMC4671_PWM_IN_RAW_MASK
TMC4671_PWM_IN_RAW_SHIFT
TMC4671_HALL_UX_FILT_MASK
TMC4671_HALL_UX_FILT_SHIFT
TMC4671_HALL_V_FILT_MASK
TMC4671_HALL_V_FILT_SHIFT
TMC4671_HALL_WY_FILT_MASK
TMC4671_HALL_WY_FILT_SHIFT
TMC4671_PWM_IDLE_L_RAW_MASK
TMC4671_PWM_IDLE_L_RAW_SHIFT
TMC4671_PWM_IDLE_H_RAW_MASK
TMC4671_PWM_IDLE_H_RAW_SHIFT
TMC4671_OUTPUTS_RAW_0_MASK
TMC4671_OUTPUTS_RAW_0_SHIFT
TMC4671_OUTPUTS_RAW_1_MASK
TMC4671_OUTPUTS_RAW_1_SHIFT
TMC4671_OUTPUTS_RAW_2_MASK
TMC4671_OUTPUTS_RAW_2_SHIFT
TMC4671_OUTPUTS_RAW_3_MASK
TMC4671_OUTPUTS_RAW_3_SHIFT
TMC4671_OUTPUTS_RAW_4_MASK
TMC4671_OUTPUTS_RAW_4_SHIFT
TMC4671_OUTPUTS_RAW_5_MASK
TMC4671__OUTPUTS_RAW_5_SHIFT
TMC4671_OUTPUTS_RAW_6_MASK
TMC4671_OUTPUTS_RAW_6_SHIFT
TMC4671_OUTPUTS_RAW_7_MASK
TMC4671_OUTPUTS_RAW_7_SHIFT
TMC4671_STEP_WIDTH_MASK
TMC4671_STEP_WIDTH_SHIFT
TMC4671_UART_BPS_MASK
TMC4671_UART_BPS_SHIFT
TMC4671_ADDR_A_MASK
TMC4671_ADDR_A_SHIFT
TMC4671_ADDR_B_MASK
TMC4671_ADDR_B_SHIFT
TMC4671_ADDR_C_MASK
TMC4671_ADDR_C_SHIFT
TMC4671_ADDR_D_MASK
TMC4671_ADDR_D_SHIFT
TMC4671_GPIO_DSADCI_CONFIG_MASK
TMC4671_GPIO_DSADCI_CONFIG_SHIFT
TMC4671_STATUS_FLAGS_0_MASK
TMC4671_STATUS_FLAGS_0_SHIFT
TMC4671_STATUS_FLAGS_1_MASK
TMC4671_STATUS_FLAGS_1_SHIFT
TMC4671_STATUS_FLAGS_2_MASK
TMC4671_STATUS_FLAGS_2_SHIFT
TMC4671_STATUS_FLAGS_3_MASK
TMC4671_STATUS_FLAGS_3_SHIFT
TMC4671_STATUS_FLAGS_4_MASK
TMC4671_STATUS_FLAGS_4_SHIFT
TMC4671_STATUS_FLAGS_5_MASK
TMC4671_STATUS_FLAGS_5_SHIFT
TMC4671_STATUS_FLAGS_6_MASK
TMC4671_STATUS_FLAGS_6_SHIFT
TMC4671_STATUS_FLAGS_7_MASK
TMC4671_STATUS_FLAGS_7_SHIFT
TMC4671_STATUS_FLAGS_8_MASK
TMC4671_STATUS_FLAGS_8_SHIFT
TMC4671_STATUS_FLAGS_9_MASK
TMC4671_STATUS_FLAGS_9_SHIFT
TMC4671_STATUS_FLAGS_10_MASK
TMC4671_STATUS_FLAGS_10_SHIFT
TMC4671_STATUS_FLAGS_11_MASK
TMC4671_STATUS_FLAGS_11_SHIFT
TMC4671_STATUS_FLAGS_12_MASK
TMC4671_STATUS_FLAGS_12_SHIFT
TMC4671_STATUS_FLAGS_13_MASK
TMC4671_STATUS_FLAGS_13_SHIFT
TMC4671_STATUS_FLAGS_14_MASK
TMC4671_STATUS_FLAGS_14_SHIFT
TMC4671_STATUS_FLAGS_15_MASK
TMC4671_STATUS_FLAGS_15_SHIFT
TMC4671_STATUS_FLAGS_16_MASK
TMC4671_STATUS_FLAGS_16_SHIFT
TMC4671_STATUS_FLAGS_17_MASK
TMC4671_STATUS_FLAGS_17_SHIFT
TMC4671_STATUS_FLAGS_18_MASK
TMC4671_STATUS_FLAGS_18_SHIFT
TMC4671_STATUS_FLAGS_19_MASK
TMC4671_STATUS_FLAGS_19_SHIFT
TMC4671_STATUS_FLAGS_20_MASK
TMC4671_STATUS_FLAGS_20_SHIFT
TMC4671_STATUS_FLAGS_21_MASK
TMC4671_STATUS_FLAGS_21_SHIFT
TMC4671_STATUS_FLAGS_22_MASK
TMC4671_STATUS_FLAGS_22_SHIFT
TMC4671_STATUS_FLAGS_23_MASK
TMC4671_STATUS_FLAGS_23_SHIFT
TMC4671_STATUS_FLAGS_24_MASK
TMC4671_STATUS_FLAGS_24_SHIFT
TMC4671_STATUS_FLAGS_25_MASK
TMC4671_STATUS_FLAGS_25_SHIFT
TMC4671_STATUS_FLAGS_26_MASK
TMC4671_STATUS_FLAGS_26_SHIFT
TMC4671_STATUS_FLAGS_27_MASK
TMC4671_STATUS_FLAGS_27_SHIFT
TMC4671_STATUS_FLAGS_28_MASK
TMC4671_STATUS_FLAGS_28_SHIFT
TMC4671_STATUS_FLAGS_29_MASK
TMC4671_STATUS_FLAGS_29_SHIFT
TMC4671_STATUS_FLAGS_30_MASK
TMC4671_STATUS_FLAGS_30_SHIFT
TMC4671_STATUS_FLAGS_31_MASK
TMC4671_STATUS_FLAGS_31_SHIFT
TMC4671_WARNING_MASK_MASK
TMC4671_WARNING_FIELDS
file TMC4671_Register.h

Defines

TMC4671_CHIPINFO_DATA
TMC4671_CHIPINFO_ADDR
TMC4671_ADC_RAW_DATA
TMC4671_ADC_RAW_ADDR
TMC4671_dsADC_MCFG_B_MCFG_A
TMC4671_dsADC_MCLK_A
TMC4671_dsADC_MCLK_B
TMC4671_dsADC_MDEC_B_MDEC_A
TMC4671_ADC_I1_SCALE_OFFSET
TMC4671_ADC_I0_SCALE_OFFSET
TMC4671_ADC_I_SELECT
TMC4671_ADC_I1_I0_EXT
TMC4671_DS_ANALOG_INPUT_STAGE_CFG
TMC4671_AENC_0_SCALE_OFFSET
TMC4671_AENC_1_SCALE_OFFSET
TMC4671_AENC_2_SCALE_OFFSET
TMC4671_AENC_SELECT
TMC4671_ADC_IWY_IUX
TMC4671_ADC_IV
TMC4671_AENC_WY_UX
TMC4671_AENC_VN
TMC4671_PWM_POLARITIES
TMC4671_PWM_MAXCNT
TMC4671_PWM_BBM_H_BBM_L
TMC4671_PWM_SV_CHOP
TMC4671_MOTOR_TYPE_N_POLE_PAIRS
TMC4671_PHI_E_EXT
TMC4671_PHI_M_EXT
TMC4671_POSITION_EXT
TMC4671_OPENLOOP_MODE
TMC4671_OPENLOOP_ACCELERATION
TMC4671_OPENLOOP_VELOCITY_TARGET
TMC4671_OPENLOOP_VELOCITY_ACTUAL
TMC4671_OPENLOOP_PHI
TMC4671_UQ_UD_EXT
TMC4671_ABN_DECODER_MODE
TMC4671_ABN_DECODER_PPR
TMC4671_ABN_DECODER_COUNT
TMC4671_ABN_DECODER_COUNT_N
TMC4671_ABN_DECODER_PHI_E_PHI_M_OFFSET
TMC4671_ABN_DECODER_PHI_E_PHI_M
TMC4671_ABN_2_DECODER_MODE
TMC4671_ABN_2_DECODER_PPR
TMC4671_ABN_2_DECODER_COUNT
TMC4671_ABN_2_DECODER_COUNT_N
TMC4671_ABN_2_DECODER_PHI_M_OFFSET
TMC4671_ABN_2_DECODER_PHI_M
TMC4671_HALL_MODE
TMC4671_HALL_POSITION_060_000
TMC4671_HALL_POSITION_180_120
TMC4671_HALL_POSITION_300_240
TMC4671_HALL_PHI_E_PHI_M_OFFSET
TMC4671_HALL_DPHI_MAX
TMC4671_HALL_PHI_E_INTERPOLATED_PHI_E
TMC4671_HALL_PHI_M
TMC4671_AENC_DECODER_MODE
TMC4671_AENC_DECODER_N_MASK_N_THRESHOLD
TMC4671_AENC_DECODER_PHI_A_RAW
TMC4671_AENC_DECODER_PHI_A_OFFSET
TMC4671_AENC_DECODER_PHI_A
TMC4671_AENC_DECODER_PPR
TMC4671_AENC_DECODER_COUNT
TMC4671_AENC_DECODER_COUNT_N
TMC4671_AENC_DECODER_PHI_E_PHI_M_OFFSET
TMC4671_AENC_DECODER_PHI_E_PHI_M
TMC4671_AENC_DECODER_POSITION
TMC4671_CONFIG_DATA
TMC4671_CONFIG_ADDR
TMC4671_VELOCITY_SELECTION
TMC4671_POSITION_SELECTION
TMC4671_PHI_E_SELECTION
TMC4671_PHI_E
TMC4671_PID_FLUX_P_FLUX_I
TMC4671_PID_TORQUE_P_TORQUE_I
TMC4671_PID_VELOCITY_P_VELOCITY_I
TMC4671_PID_POSITION_P_POSITION_I
TMC4671_PID_TORQUE_FLUX_TARGET_DDT_LIMITS
TMC4671_PIDOUT_UQ_UD_LIMITS
TMC4671_PID_TORQUE_FLUX_LIMITS
TMC4671_PID_ACCELERATION_LIMIT
TMC4671_PID_VELOCITY_LIMIT
TMC4671_PID_POSITION_LIMIT_LOW
TMC4671_PID_POSITION_LIMIT_HIGH
TMC4671_MODE_RAMP_MODE_MOTION
TMC4671_PID_TORQUE_FLUX_TARGET
TMC4671_PID_TORQUE_FLUX_OFFSET
TMC4671_PID_VELOCITY_TARGET
TMC4671_PID_VELOCITY_OFFSET
TMC4671_PID_POSITION_TARGET
TMC4671_PID_TORQUE_FLUX_ACTUAL
TMC4671_PID_VELOCITY_ACTUAL
TMC4671_PID_POSITION_ACTUAL
TMC4671_PID_ERROR_DATA
TMC4671_PID_ERROR_ADDR
TMC4671_INTERIM_DATA
TMC4671_INTERIM_ADDR
TMC4671_WATCHDOG_CFG
TMC4671_ADC_VM_LIMITS
TMC4671_INPUTS_RAW
TMC4671_OUTPUTS_RAW
TMC4671_STEP_WIDTH
TMC4671_UART_BPS
TMC4671_UART_ADDRS
TMC4671_GPIO_dsADCI_CONFIG
TMC4671_STATUS_FLAGS
TMC4671_STATUS_MASK
TMC4671_NO_MOTOR
TMC4671_SINGLE_PHASE_DC
TMC4671_TWO_PHASE_STEPPER
TMC4671_THREE_PHASE_BLDC
TMC4671_MOTION_MODE_STOPPED
TMC4671_MOTION_MODE_TORQUE
TMC4671_MOTION_MODE_VELOCITY
TMC4671_MOTION_MODE_POSITION
TMC4671_MOTION_MODE_PRBS_FLUX
TMC4671_MOTION_MODE_PRBS_TORQUE
TMC4671_MOTION_MODE_PRBS_VELOCITY
TMC4671_MOTION_MODE_PRBS_POSITION
TMC4671_MOTION_MODE_UQ_UD_EXT
TMC4671_PHI_E_EXTERNAL
TMC4671_PHI_E_OPEN_LOOP
TMC4671_PHI_E_ABN
TMC4671_PHI_E_HALL
TMC4671_PHI_E_AENC
TMC4671_PHI_A_AENC
TMC4671_VELOCITY_PHI_E_SELECTION
TMC4671_VELOCITY_PHI_E_EXT
TMC4671_VELOCITY_PHI_E_OPENLOOP
TMC4671_VELOCITY_PHI_E_ABN
TMC4671_VELOCITY_PHI_E_HAL
TMC4671_VELOCITY_PHI_E_AENC
TMC4671_VELOCITY_PHI_A_AENC
TMC4671_VELOCITY_PHI_M_ABN
TMC4671_VELOCITY_PHI_M_ABN_2
TMC4671_VELOCITY_PHI_M_AENC
TMC4671_VELOCITY_PHI_M_HAL
TMC4671_POSITION_PHI_E_SELECTION
TMC4671_POSITION_PHI_E_EXT
TMC4671_POSITION_PHI_E_OPENLOOP
TMC4671_POSITION_PHI_E_ABN
TMC4671_POSITION_PHI_E_HAL
TMC4671_POSITION_PHI_E_AENC
TMC4671_POSITION_PHI_A_AENC
TMC4671_POSITION_PHI_M_ABN
TMC4671_POSITION_PHI_M_ABN_2
TMC4671_POSITION_PHI_M_AENC
TMC4671_POSITION_PHI_M_HAL
file TMC4671_Variants.h

Defines

CHIPINFO_ADDR_SI_TYPE
CHIPINFO_ADDR_SI_VERSION
CHIPINFO_ADDR_SI_DATA
CHIPINFO_ADDR_SI_TIME
CHIPINFO_ADDR_SI_VARIANT
CHIPINFO_ADDR_SI_BUILD
ADC_RAW_ADDR_ADC_I1_RAW_ADC_I0_RAW
ADC_RAW_ADDR_ADC_AGPI_A_RAW_ADC_VM_RAW
ADC_RAW_ADDR_ADC_AENC_UX_RAW_ADC_AGPI_B_RAW
ADC_RAW_ADDR_ADC_AENC_WY_RAW_ADC_AENC_VN_RAW
CONFIG_ADDR_biquad_x_a_1
CONFIG_ADDR_biquad_x_a_2
CONFIG_ADDR_biquad_x_b_0
CONFIG_ADDR_biquad_x_b_1
CONFIG_ADDR_biquad_x_b_2
CONFIG_ADDR_biquad_x_enable
CONFIG_ADDR_biquad_v_a_1
CONFIG_ADDR_biquad_v_a_2
CONFIG_ADDR_biquad_v_b_0
CONFIG_ADDR_biquad_v_b_1
CONFIG_ADDR_biquad_v_b_2
CONFIG_ADDR_biquad_v_enable
CONFIG_ADDR_biquad_t_a_1
CONFIG_ADDR_biquad_t_a_2
CONFIG_ADDR_biquad_t_b_0
CONFIG_ADDR_biquad_t_b_1
CONFIG_ADDR_biquad_t_b_2
CONFIG_ADDR_biquad_t_enable
CONFIG_ADDR_biquad_f_a_1
CONFIG_ADDR_biquad_f_a_2
CONFIG_ADDR_biquad_f_b_0
CONFIG_ADDR_biquad_f_b_1
CONFIG_ADDR_biquad_f_b_2
CONFIG_ADDR_biquad_f_enable
CONFIG_ADDR_prbs_amplitude
CONFIG_ADDR_prbs_down_sampling_ratio
CONFIG_ADDR_feed_forward_velocity_gain
CONFIG_ADDR_feed_forward_velicity_filter_constant
CONFIG_ADDR_feed_forward_torque_gain
CONFIG_ADDR_feed_forward_torgue_filter_constant
CONFIG_ADDR_VELOCITY_METER_PPTM_MIN_POS_DEV
CONFIG_ADDR_ref_switch_config
CONFIG_ADDR_Encoder_Init_hall_Enable
CONFIG_ADDR_SINGLE_PIN_IF_STATUS_CFG
CONFIG_ADDR_SINGLE_PIN_IF_SCALE_OFFSET
PID_ERROR_ADDR_PID_TORQUE_ERROR
PID_ERROR_ADDR_PID_FLUX_ERROR
PID_ERROR_ADDR_PID_VELOCITY_ERROR
PID_ERROR_ADDR_PID_POSITION_ERROR
PID_ERROR_ADDR_PID_TORQUE_ERROR_SUM
PID_ERROR_ADDR_PID_FLUX_ERROR_SUM
PID_ERROR_ADDR_PID_VELOCITY_ERROR_SUM
PID_ERROR_ADDR_PID_POSITION_ERROR_SUM
INTERIM_ADDR_PIDIN_TARGET_TORQUE
INTERIM_ADDR_PIDIN_TARGET_FLUX
INTERIM_ADDR_PIDIN_TARGET_VELOCITY
INTERIM_ADDR_PIDIN_TARGET_POSITION
INTERIM_ADDR_PIDOUT_TARGET_TORQUE
INTERIM_ADDR_PIDOUT_TARGET_FLUX
INTERIM_ADDR_PIDOUT_TARGET_VELOCITY
INTERIM_ADDR_PIDOUT_TARGET_POSITION
INTERIM_ADDR_FOC_IWY_IUX
INTERIM_ADDR_FOC_IV
INTERIM_ADDR_FOC_IB_IA
INTERIM_ADDR_FOC_IQ_ID
INTERIM_ADDR_FOC_UQ_UD
INTERIM_ADDR_FOC_UQ_UD_LIMITED
INTERIM_ADDR_FOC_UB_UA
INTERIM_ADDR_FOC_UWY_UUX
INTERIM_ADDR_FOC_UV
INTERIM_ADDR_PWM_WY_UX
INTERIM_ADDR_PWM_UV
INTERIM_ADDR_ADC_I1_I0
INTERIM_ADDR_PID_TORQUE_TARGET_FLUX_TARGET_TORQUE_ACTUAL_FLUX_ACTUAL_DIV256
INTERIM_ADDR_PID_TORQUE_TARGET_TORQUE_ACTUAL
INTERIM_ADDR_PID_FLUX_TARGET_FLUX_ACTUAL
INTERIM_ADDR_PID_VELOCITY_TARGET_VELOCITY_ACTUAL_DIV256
INTERIM_ADDR_PID_VELOCITY_TARGET_VELOCITY_ACTUAL
INTERIM_ADDR_PID_POSITION_TARGET_POSITION_ACTUAL_DIV256
INTERIM_ADDR_PID_POSITION_TARGET_POSITION_ACTUAL
INTERIM_ADDR_FF_VELOCITY
INTERIM_ADDR_FF_TORQUE
INTERIM_ADDR_ACTUAL_VELOCITY_PPTM
INTERIM_ADDR_REF_SWITCH_STATUS
INTERIM_ADDR_HOME_POSITION
INTERIM_ADDR_LEFT_POSITION
INTERIM_ADDR_RIGHT_POSITION
INTERIM_ADDR_ENC_INIT_HALL_STATUS
INTERIM_ADDR_ENC_INIT_HALL_PHI_E_ABN_OFFSET
INTERIM_ADDR_ENC_INIT_HALL_PHI_E_AENC_OFFSET
INTERIM_ADDR_ENC_INIT_HALL_PHI_A_AENC_OFFSET
INTERIM_ADDR_enc_init_mini_move_u_d_status
INTERIM_ADDR_enc_init_mini_move_phi_e_phi_e_offset
INTERIM_ADDR_SINGLE_PIN_IF_PWM_DUTY_CYCLE_TORQUE_TARGET
INTERIM_ADDR_SINGLE_PIN_IF_VELOCITY_TARGET
INTERIM_ADDR_SINGLE_PIN_IF_POSITION_TARGET
INTERIM_ADDR_DEBUG_VALUE_1_0
INTERIM_ADDR_DEBUG_VALUE_3_2
INTERIM_ADDR_DEBUG_VALUE_5_4
INTERIM_ADDR_DEBUG_VALUE_7_6
INTERIM_ADDR_DEBUG_VALUE_9_8
INTERIM_ADDR_DEBUG_VALUE_11_10
INTERIM_ADDR_DEBUG_VALUE_13_12
INTERIM_ADDR_DEBUG_VALUE_15_14
INTERIM_ADDR_DEBUG_VALUE_16
INTERIM_ADDR_DEBUG_VALUE_17
INTERIM_ADDR_DEBUG_VALUE_18
INTERIM_ADDR_DEBUG_VALUE_19
INTERIM_ADDR_CONFIG_REG_0
INTERIM_ADDR_CONFIG_REG_1
INTERIM_ADDR_CTRL_PARAM_10
INTERIM_ADDR_CTRL_PARAM_32
INTERIM_ADDR_STATUS_REG_0
INTERIM_ADDR_STATUS_REG_1
INTERIM_ADDR_STATUS_PARAM_10
INTERIM_ADDR_STATUS_PARAM_32
file TMC5031.c
#include “TMC5031.h”

Defines

R30
R32
R3A
R60
R61
R62
R63
R64
R65
R66
R67
R68
R69
R6C

Functions

void tmc5031_writeDatagram(uint8_t motor, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc5031_writeInt(uint8_t motor, uint8_t address, int value)
int32_t tmc5031_readInt(uint8_t motor, uint8_t address)
void tmc5031_initConfig(TMC5031TypeDef *tmc5031)
void tmc5031_writeConfiguration(TMC5031TypeDef *tmc5031, ConfigurationTypeDef *TMC5031_config)
void tmc5031_periodicJob(uint8_t motor, uint32_t tick, TMC5031TypeDef *tmc5031, ConfigurationTypeDef *TMC5031_config)
uint8_t tmc5031_reset(ConfigurationTypeDef *TMC5031_config)
uint8_t tmc5031_restore(ConfigurationTypeDef *TMC5031_config)

Variables

const uint8_t tmc5031_defaultRegisterAccess[TMC5031_REGISTER_COUNT] = {3, 1, 1, 2, 7, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0, 3, 3, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 3, 0, 0, 2, 2, 2, 2, 3, 1, 1, 0, 3, 3, 2, 1, 1, 0, 0, 0, 3, 3, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 3, 0, 0, 2, 2, 2, 2, 3, 1, 1, 0, 3, 3, 2, 1, 1, 0, 0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 3, 2, 2, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 3, 2, 2, 1}
const int32_t tmc5031_defaultRegisterResetState[TMC5031_REGISTER_COUNT] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R30, 0, R32, 0, 0, 0, 0, 0, 0, 0, R3A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R30, 0, R32, 0, 0, 0, 0, 0, 0, 0, R3A, 0, 0, 0, 0, 0, R60, R61, R62, R63, R64, R65, R66, R67, R68, R69, 0, 0, R6C, 0, 0, 0, R60, R61, R62, R63, R64, R65, R66, R67, R68, R69, 0, 0, R6C, 0, 0, 0}
file TMC5031.h
#include “tmc/helpers/API_Header.h”
#include “TMC5031_Register.h”
#include “TMC5031_Constants.h”
#include “TMC5031_Fields.h”

Defines

TMC5031_FIELD_READ(motor, address, mask, shift)
TMC5031_FIELD_WRITE(motor, address, mask, shift, value)
TMC5031_FIELD_UPDATE(motor, address, mask, shift, value)

Functions

void tmc5031_initConfig(TMC5031TypeDef *TMC5031)
void tmc5031_periodicJob(uint8_t motor, uint32_t tick, TMC5031TypeDef *TMC5031, ConfigurationTypeDef *TMC5031_config)
uint8_t tmc5031_reset(ConfigurationTypeDef *TMC5031_config)
uint8_t tmc5031_restore(ConfigurationTypeDef *TMC5031_config)
file TMC5031_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC5031_REGISTER_COUNT
TMC5031_MOTORS
TMC5031_WRITE_BIT
TMC5031_ADDRESS_MASK
TMC5031_MAX_VELOCITY
TMC5031_MAX_ACCELERATION
TMC5031_MODE_POSITION
TMC5031_MODE_VELPOS
TMC5031_MODE_VELNEG
TMC5031_MODE_HOLD
file TMC5031_Fields.h

Defines

TMC5031_POSCMP_ENABLE_MASK
TMC5031_POSCMP_ENABLE_SHIFT
TMC5031_TEST_MODE_MASK
TMC5031_TEST_MODE_SHIFT
TMC5031_SHAFT1_MASK
TMC5031_SHAFT1_SHIFT
TMC5031_SHAFT2_MASK
TMC5031_SHAFT2_SHIFT
TMC5031_LOCK_GCONF_MASK
TMC5031_LOCK_GCONF_SHIFT
TMC5031_RESET_MASK
TMC5031_RESET_SHIFT
TMC5031_DRV_ERR1_MASK
TMC5031_DRV_ERR1_SHIFT
TMC5031_UV_CP_MASK
TMC5031_UV_CP_SHIFT
TMC5031_TEST_SEL_MASK
TMC5031_TEST_SEL_SHIFT
TMC5031_DRV_ENN_MASK
TMC5031_DRV_ENN_SHIFT
TMC5031_VERSION_MASK
TMC5031_VERSION_SHIFT
TMC5031_X_COMPARE_MASK
TMC5031_X_COMPARE_SHIFT
TMC5031_RAMPMODE_MASK
TMC5031_RAMPMODE_SHIFT
TMC5031_XACTUAL_MASK
TMC5031_XACTUAL_SHIFT
TMC5031_VACTUAL_MASK
TMC5031_VACTUAL_SHIFT
TMC5031_VSTART_MASK
TMC5031_VSTART_SHIFT
TMC5031_A1_MASK
TMC5031_A1_SHIFT
TMC5031_V1__MASK
TMC5031_V1__SHIFT
TMC5031_AMAX_MASK
TMC5031_AMAX_SHIFT
TMC5031_VMAX_MASK
TMC5031_VMAX_SHIFT
TMC5031_DMAX_MASK
TMC5031_DMAX_SHIFT
TMC5031_D1_MASK
TMC5031_D1_SHIFT
TMC5031_VSTOP_MASK
TMC5031_VSTOP_SHIFT
TMC5031_TZEROWAIT_MASK
TMC5031_TZEROWAIT_SHIFT
TMC5031_XTARGET_MASK
TMC5031_XTARGET_SHIFT
TMC5031_RAMPMODE_MASK
TMC5031_RAMPMODE_SHIFT
TMC5031_XACTUAL_MASK
TMC5031_XACTUAL_SHIFT
TMC5031_VACTUAL_MASK
TMC5031_VACTUAL_SHIFT
TMC5031_VSTART_MASK
TMC5031_VSTART_SHIFT
TMC5031_A1_MASK
TMC5031_A1_SHIFT
TMC5031_V1__MASK
TMC5031_V1__SHIFT
TMC5031_AMAX_MASK
TMC5031_AMAX_SHIFT
TMC5031_VMAX_MASK
TMC5031_VMAX_SHIFT
TMC5031_DMAX_MASK
TMC5031_DMAX_SHIFT
TMC5031_D1_MASK
TMC5031_D1_SHIFT
TMC5031_VSTOP_MASK
TMC5031_VSTOP_SHIFT
TMC5031_TZEROWAIT_MASK
TMC5031_TZEROWAIT_SHIFT
TMC5031_XTARGET_MASK
TMC5031_XTARGET_SHIFT
TMC5031_IHOLD_MASK
TMC5031_IHOLD_SHIFT
TMC5031_IRUN_MASK
TMC5031_IRUN_SHIFT
TMC5031_IHOLDDELAY_MASK
TMC5031_IHOLDDELAY_SHIFT
TMC5031_VCOOLTHRS_MASK
TMC5031_VCOOLTHRS_SHIFT
TMC5031_VHIGH_MASK
TMC5031_VHIGH_SHIFT
TMC5031_STOP_L_ENABLE_MASK
TMC5031_STOP_L_ENABLE_SHIFT
TMC5031_STOP_R_ENABLE_MASK
TMC5031_STOP_R_ENABLE_SHIFT
TMC5031_POL_STOP_L_MASK
TMC5031_POL_STOP_L_SHIFT
TMC5031_POL_STOP_R_MASK
TMC5031_POL_STOP_R_SHIFT
TMC5031_SWAP_LR_MASK
TMC5031_SWAP_LR_SHIFT
TMC5031_LATCH_L_ACTIVE_MASK
TMC5031_LATCH_L_ACTIVE_SHIFT
TMC5031_LATCH_L_INACTIVE_MASK
TMC5031_LATCH_L_INACTIVE_SHIFT
TMC5031_LATCH_R_ACTIVE_MASK
TMC5031_LATCH_R_ACTIVE_SHIFT
TMC5031_LATCH_R_INACTIVE_MASK
TMC5031_LATCH_R_INACTIVE_SHIFT
TMC5031_SG_STOP_MASK
TMC5031_SG_STOP_SHIFT
TMC5031_EN_SOFTSTOP_MASK
TMC5031_EN_SOFTSTOP_SHIFT
TMC5031_STATUS_STOP_L_MASK
TMC5031_STATUS_STOP_L_SHIFT
TMC5031_STATUS_STOP_R_MASK
TMC5031_STATUS_STOP_R_SHIFT
TMC5031_STATUS_LATCH_L_MASK
TMC5031_STATUS_LATCH_L_SHIFT
TMC5031_STATUS_LATCH_R_MASK
TMC5031_STATUS_LATCH_R_SHIFT
TMC5031_EVENT_STOP_L_MASK
TMC5031_EVENT_STOP_L_SHIFT
TMC5031_EVENT_STOP_R_MASK
TMC5031_EVENT_STOP_R_SHIFT
TMC5031_EVENT_STOP_SG_MASK
TMC5031_EVENT_STOP_SG_SHIFT
TMC5031_EVENT_POS_REACHED_MASK
TMC5031_EVENT_POS_REACHED_SHIFT
TMC5031_VELOCITY_REACHED_MASK
TMC5031_VELOCITY_REACHED_SHIFT
TMC5031_POSITION_REACHED_MASK
TMC5031_POSITION_REACHED_SHIFT
TMC5031_VZERO_MASK
TMC5031_VZERO_SHIFT
TMC5031_T_ZEROWAIT_ACTIVE_MASK
TMC5031_T_ZEROWAIT_ACTIVE_SHIFT
TMC5031_SECOND_MOVE_MASK
TMC5031_SECOND_MOVE_SHIFT
TMC5031_STATUS_SG_MASK
TMC5031_STATUS_SG_SHIFT
TMC5031_XLATCH_MASK
TMC5031_XLATCH_SHIFT
TMC5031_IHOLD_MASK
TMC5031_IHOLD_SHIFT
TMC5031_IRUN_MASK
TMC5031_IRUN_SHIFT
TMC5031_IHOLDDELAY_MASK
TMC5031_IHOLDDELAY_SHIFT
TMC5031_VCOOLTHRS_MASK
TMC5031_VCOOLTHRS_SHIFT
TMC5031_VHIGH_MASK
TMC5031_VHIGH_SHIFT
TMC5031_STOP_L_ENABLE_MASK
TMC5031_STOP_L_ENABLE_SHIFT
TMC5031_STOP_R_ENABLE_MASK
TMC5031_STOP_R_ENABLE_SHIFT
TMC5031_POL_STOP_L_MASK
TMC5031_POL_STOP_L_SHIFT
TMC5031_POL_STOP_R_MASK
TMC5031_POL_STOP_R_SHIFT
TMC5031_SWAP_LR_MASK
TMC5031_SWAP_LR_SHIFT
TMC5031_LATCH_L_ACTIVE_MASK
TMC5031_LATCH_L_ACTIVE_SHIFT
TMC5031_LATCH_L_INACTIVE_MASK
TMC5031_LATCH_L_INACTIVE_SHIFT
TMC5031_LATCH_R_ACTIVE_MASK
TMC5031_LATCH_R_ACTIVE_SHIFT
TMC5031_LATCH_R_INACTIVE_MASK
TMC5031_LATCH_R_INACTIVE_SHIFT
TMC5031_SG_STOP_MASK
TMC5031_SG_STOP_SHIFT
TMC5031_EN_SOFTSTOP_MASK
TMC5031_EN_SOFTSTOP_SHIFT
TMC5031_STATUS_STOP_L_MASK
TMC5031_STATUS_STOP_L_SHIFT
TMC5031_STATUS_STOP_R_MASK
TMC5031_STATUS_STOP_R_SHIFT
TMC5031_STATUS_LATCH_L_MASK
TMC5031_STATUS_LATCH_L_SHIFT
TMC5031_STATUS_LATCH_R_MASK
TMC5031_STATUS_LATCH_R_SHIFT
TMC5031_EVENT_STOP_L_MASK
TMC5031_EVENT_STOP_L_SHIFT
TMC5031_EVENT_STOP_R_MASK
TMC5031_EVENT_STOP_R_SHIFT
TMC5031_EVENT_STOP_SG_MASK
TMC5031_EVENT_STOP_SG_SHIFT
TMC5031_EVENT_POS_REACHED_MASK
TMC5031_EVENT_POS_REACHED_SHIFT
TMC5031_VELOCITY_REACHED_MASK
TMC5031_VELOCITY_REACHED_SHIFT
TMC5031_POSITION_REACHED_MASK
TMC5031_POSITION_REACHED_SHIFT
TMC5031_VZERO_MASK
TMC5031_VZERO_SHIFT
TMC5031_T_ZEROWAIT_ACTIVE_MASK
TMC5031_T_ZEROWAIT_ACTIVE_SHIFT
TMC5031_SECOND_MOVE_MASK
TMC5031_SECOND_MOVE_SHIFT
TMC5031_STATUS_SG_MASK
TMC5031_STATUS_SG_SHIFT
TMC5031_XLATCH_MASK
TMC5031_XLATCH_SHIFT
TMC5031_OFS0_MASK
TMC5031_OFS0_SHIFT
TMC5031_OFS1_MASK
TMC5031_OFS1_SHIFT
TMC5031_OFS2_MASK
TMC5031_OFS2_SHIFT
TMC5031_OFS3_MASK
TMC5031_OFS3_SHIFT
TMC5031_OFS4_MASK
TMC5031_OFS4_SHIFT
TMC5031_OFS5_MASK
TMC5031_OFS5_SHIFT
TMC5031_OFS6_MASK
TMC5031_OFS6_SHIFT
TMC5031_OFS7_MASK
TMC5031_OFS7_SHIFT
TMC5031_OFS8_MASK
TMC5031_OFS8_SHIFT
TMC5031_OFS9_MASK
TMC5031_OFS9_SHIFT
TMC5031_OFS10_MASK
TMC5031_OFS10_SHIFT
TMC5031_OFS11_MASK
TMC5031_OFS11_SHIFT
TMC5031_OFS12_MASK
TMC5031_OFS12_SHIFT
TMC5031_OFS13_MASK
TMC5031_OFS13_SHIFT
TMC5031_OFS14_MASK
TMC5031_OFS14_SHIFT
TMC5031_OFS15_MASK
TMC5031_OFS15_SHIFT
TMC5031_OFS16_MASK
TMC5031_OFS16_SHIFT
TMC5031_OFS17_MASK
TMC5031_OFS17_SHIFT
TMC5031_OFS18_MASK
TMC5031_OFS18_SHIFT
TMC5031_OFS19_MASK
TMC5031_OFS19_SHIFT
TMC5031_OFS20_MASK
TMC5031_OFS20_SHIFT
TMC5031_OFS21_MASK
TMC5031_OFS21_SHIFT
TMC5031_OFS22_MASK
TMC5031_OFS22_SHIFT
TMC5031_OFS23_MASK
TMC5031_OFS23_SHIFT
TMC5031_OFS24_MASK
TMC5031_OFS24_SHIFT
TMC5031_OFS25_MASK
TMC5031_OFS25_SHIFT
TMC5031_OFS26_MASK
TMC5031_OFS26_SHIFT
TMC5031_OFS27_MASK
TMC5031_OFS27_SHIFT
TMC5031_OFS28_MASK
TMC5031_OFS28_SHIFT
TMC5031_OFS29_MASK
TMC5031_OFS29_SHIFT
TMC5031_OFS30_MASK
TMC5031_OFS30_SHIFT
TMC5031_OFS31_MASK
TMC5031_OFS31_SHIFT
TMC5031_OFS32_MASK
TMC5031_OFS32_SHIFT
TMC5031_OFS33_MASK
TMC5031_OFS33_SHIFT
TMC5031_OFS34_MASK
TMC5031_OFS34_SHIFT
TMC5031_OFS35_MASK
TMC5031_OFS35_SHIFT
TMC5031_OFS36_MASK
TMC5031_OFS36_SHIFT
TMC5031_OFS37_MASK
TMC5031_OFS37_SHIFT
TMC5031_OFS38_MASK
TMC5031_OFS38_SHIFT
TMC5031_OFS39_MASK
TMC5031_OFS39_SHIFT
TMC5031_OFS40_MASK
TMC5031_OFS40_SHIFT
TMC5031_OFS41_MASK
TMC5031_OFS41_SHIFT
TMC5031_OFS42_MASK
TMC5031_OFS42_SHIFT
TMC5031_OFS43_MASK
TMC5031_OFS43_SHIFT
TMC5031_OFS44_MASK
TMC5031_OFS44_SHIFT
TMC5031_OFS45_MASK
TMC5031_OFS45_SHIFT
TMC5031_OFS46_MASK
TMC5031_OFS46_SHIFT
TMC5031_OFS47_MASK
TMC5031_OFS47_SHIFT
TMC5031_OFS48_MASK
TMC5031_OFS48_SHIFT
TMC5031_OFS49_MASK
TMC5031_OFS49_SHIFT
TMC5031_OFS50_MASK
TMC5031_OFS50_SHIFT
TMC5031_OFS51_MASK
TMC5031_OFS51_SHIFT
TMC5031_OFS52_MASK
TMC5031_OFS52_SHIFT
TMC5031_OFS53_MASK
TMC5031_OFS53_SHIFT
TMC5031_OFS54_MASK
TMC5031_OFS54_SHIFT
TMC5031_OFS55_MASK
TMC5031_OFS55_SHIFT
TMC5031_OFS56_MASK
TMC5031_OFS56_SHIFT
TMC5031_OFS57_MASK
TMC5031_OFS57_SHIFT
TMC5031_OFS58_MASK
TMC5031_OFS58_SHIFT
TMC5031_OFS59_MASK
TMC5031_OFS59_SHIFT
TMC5031_OFS60_MASK
TMC5031_OFS60_SHIFT
TMC5031_OFS61_MASK
TMC5031_OFS61_SHIFT
TMC5031_OFS62_MASK
TMC5031_OFS62_SHIFT
TMC5031_OFS63_MASK
TMC5031_OFS63_SHIFT
TMC5031_OFS64_MASK
TMC5031_OFS64_SHIFT
TMC5031_OFS65_MASK
TMC5031_OFS65_SHIFT
TMC5031_OFS66_MASK
TMC5031_OFS66_SHIFT
TMC5031_OFS67_MASK
TMC5031_OFS67_SHIFT
TMC5031_OFS68_MASK
TMC5031_OFS68_SHIFT
TMC5031_OFS69_MASK
TMC5031_OFS69_SHIFT
TMC5031_OFS70_MASK
TMC5031_OFS70_SHIFT
TMC5031_OFS71_MASK
TMC5031_OFS71_SHIFT
TMC5031_OFS72_MASK
TMC5031_OFS72_SHIFT
TMC5031_OFS73_MASK
TMC5031_OFS73_SHIFT
TMC5031_OFS74_MASK
TMC5031_OFS74_SHIFT
TMC5031_OFS75_MASK
TMC5031_OFS75_SHIFT
TMC5031_OFS76_MASK
TMC5031_OFS76_SHIFT
TMC5031_OFS77_MASK
TMC5031_OFS77_SHIFT
TMC5031_OFS78_MASK
TMC5031_OFS78_SHIFT
TMC5031_OFS79_MASK
TMC5031_OFS79_SHIFT
TMC5031_OFS80_MASK
TMC5031_OFS80_SHIFT
TMC5031_OFS81_MASK
TMC5031_OFS81_SHIFT
TMC5031_OFS82_MASK
TMC5031_OFS82_SHIFT
TMC5031_OFS83_MASK
TMC5031_OFS83_SHIFT
TMC5031_OFS84_MASK
TMC5031_OFS84_SHIFT
TMC5031_OFS85_MASK
TMC5031_OFS85_SHIFT
TMC5031_OFS86_MASK
TMC5031_OFS86_SHIFT
TMC5031_OFS87_MASK
TMC5031_OFS87_SHIFT
TMC5031_OFS88_MASK
TMC5031_OFS88_SHIFT
TMC5031_OFS89_MASK
TMC5031_OFS89_SHIFT
TMC5031_OFS90_MASK
TMC5031_OFS90_SHIFT
TMC5031_OFS91_MASK
TMC5031_OFS91_SHIFT
TMC5031_OFS92_MASK
TMC5031_OFS92_SHIFT
TMC5031_OFS93_MASK
TMC5031_OFS93_SHIFT
TMC5031_OFS94_MASK
TMC5031_OFS94_SHIFT
TMC5031_OFS95_MASK
TMC5031_OFS95_SHIFT
TMC5031_OFS96_MASK
TMC5031_OFS96_SHIFT
TMC5031_OFS97_MASK
TMC5031_OFS97_SHIFT
TMC5031_OFS98_MASK
TMC5031_OFS98_SHIFT
TMC5031_OFS99_MASK
TMC5031_OFS99_SHIFT
TMC5031_OFS100_MASK
TMC5031_OFS100_SHIFT
TMC5031_OFS101_MASK
TMC5031_OFS101_SHIFT
TMC5031_OFS102_MASK
TMC5031_OFS102_SHIFT
TMC5031_OFS103_MASK
TMC5031_OFS103_SHIFT
TMC5031_OFS104_MASK
TMC5031_OFS104_SHIFT
TMC5031_OFS105_MASK
TMC5031_OFS105_SHIFT
TMC5031_OFS106_MASK
TMC5031_OFS106_SHIFT
TMC5031_OFS107_MASK
TMC5031_OFS107_SHIFT
TMC5031_OFS108_MASK
TMC5031_OFS108_SHIFT
TMC5031_OFS109_MASK
TMC5031_OFS109_SHIFT
TMC5031_OFS110_MASK
TMC5031_OFS110_SHIFT
TMC5031_OFS111_MASK
TMC5031_OFS111_SHIFT
TMC5031_OFS112_MASK
TMC5031_OFS112_SHIFT
TMC5031_OFS113_MASK
TMC5031_OFS113_SHIFT
TMC5031_OFS114_MASK
TMC5031_OFS114_SHIFT
TMC5031_OFS115_MASK
TMC5031_OFS115_SHIFT
TMC5031_OFS116_MASK
TMC5031_OFS116_SHIFT
TMC5031_OFS117_MASK
TMC5031_OFS117_SHIFT
TMC5031_OFS118_MASK
TMC5031_OFS118_SHIFT
TMC5031_OFS119_MASK
TMC5031_OFS119_SHIFT
TMC5031_OFS120_MASK
TMC5031_OFS120_SHIFT
TMC5031_OFS121_MASK
TMC5031_OFS121_SHIFT
TMC5031_OFS122_MASK
TMC5031_OFS122_SHIFT
TMC5031_OFS123_MASK
TMC5031_OFS123_SHIFT
TMC5031_OFS124_MASK
TMC5031_OFS124_SHIFT
TMC5031_OFS125_MASK
TMC5031_OFS125_SHIFT
TMC5031_OFS126_MASK
TMC5031_OFS126_SHIFT
TMC5031_OFS127_MASK
TMC5031_OFS127_SHIFT
TMC5031_OFS128_MASK
TMC5031_OFS128_SHIFT
TMC5031_OFS129_MASK
TMC5031_OFS129_SHIFT
TMC5031_OFS130_MASK
TMC5031_OFS130_SHIFT
TMC5031_OFS131_MASK
TMC5031_OFS131_SHIFT
TMC5031_OFS132_MASK
TMC5031_OFS132_SHIFT
TMC5031_OFS133_MASK
TMC5031_OFS133_SHIFT
TMC5031_OFS134_MASK
TMC5031_OFS134_SHIFT
TMC5031_OFS135_MASK
TMC5031_OFS135_SHIFT
TMC5031_OFS136_MASK
TMC5031_OFS136_SHIFT
TMC5031_OFS137_MASK
TMC5031_OFS137_SHIFT
TMC5031_OFS138_MASK
TMC5031_OFS138_SHIFT
TMC5031_OFS139_MASK
TMC5031_OFS139_SHIFT
TMC5031_OFS140_MASK
TMC5031_OFS140_SHIFT
TMC5031_OFS141_MASK
TMC5031_OFS141_SHIFT
TMC5031_OFS142_MASK
TMC5031_OFS142_SHIFT
TMC5031_OFS143_MASK
TMC5031_OFS143_SHIFT
TMC5031_OFS144_MASK
TMC5031_OFS144_SHIFT
TMC5031_OFS145_MASK
TMC5031_OFS145_SHIFT
TMC5031_OFS146_MASK
TMC5031_OFS146_SHIFT
TMC5031_OFS147_MASK
TMC5031_OFS147_SHIFT
TMC5031_OFS148_MASK
TMC5031_OFS148_SHIFT
TMC5031_OFS149_MASK
TMC5031_OFS149_SHIFT
TMC5031_OFS150_MASK
TMC5031_OFS150_SHIFT
TMC5031_OFS151_MASK
TMC5031_OFS151_SHIFT
TMC5031_OFS152_MASK
TMC5031_OFS152_SHIFT
TMC5031_OFS153_MASK
TMC5031_OFS153_SHIFT
TMC5031_OFS154_MASK
TMC5031_OFS154_SHIFT
TMC5031_OFS155_MASK
TMC5031_OFS155_SHIFT
TMC5031_OFS156_MASK
TMC5031_OFS156_SHIFT
TMC5031_OFS157_MASK
TMC5031_OFS157_SHIFT
TMC5031_OFS158_MASK
TMC5031_OFS158_SHIFT
TMC5031_OFS159_MASK
TMC5031_OFS159_SHIFT
TMC5031_OFS160_MASK
TMC5031_OFS160_SHIFT
TMC5031_OFS161_MASK
TMC5031_OFS161_SHIFT
TMC5031_OFS162_MASK
TMC5031_OFS162_SHIFT
TMC5031_OFS163_MASK
TMC5031_OFS163_SHIFT
TMC5031_OFS164_MASK
TMC5031_OFS164_SHIFT
TMC5031_OFS165_MASK
TMC5031_OFS165_SHIFT
TMC5031_OFS166_MASK
TMC5031_OFS166_SHIFT
TMC5031_OFS167_MASK
TMC5031_OFS167_SHIFT
TMC5031_OFS168_MASK
TMC5031_OFS168_SHIFT
TMC5031_OFS169_MASK
TMC5031_OFS169_SHIFT
TMC5031_OFS170_MASK
TMC5031_OFS170_SHIFT
TMC5031_OFS171_MASK
TMC5031_OFS171_SHIFT
TMC5031_OFS172_MASK
TMC5031_OFS172_SHIFT
TMC5031_OFS173_MASK
TMC5031_OFS173_SHIFT
TMC5031_OFS174_MASK
TMC5031_OFS174_SHIFT
TMC5031_OFS175_MASK
TMC5031_OFS175_SHIFT
TMC5031_OFS176_MASK
TMC5031_OFS176_SHIFT
TMC5031_OFS177_MASK
TMC5031_OFS177_SHIFT
TMC5031_OFS178_MASK
TMC5031_OFS178_SHIFT
TMC5031_OFS179_MASK
TMC5031_OFS179_SHIFT
TMC5031_OFS180_MASK
TMC5031_OFS180_SHIFT
TMC5031_OFS181_MASK
TMC5031_OFS181_SHIFT
TMC5031_OFS182_MASK
TMC5031_OFS182_SHIFT
TMC5031_OFS183_MASK
TMC5031_OFS183_SHIFT
TMC5031_OFS184_MASK
TMC5031_OFS184_SHIFT
TMC5031_OFS185_MASK
TMC5031_OFS185_SHIFT
TMC5031_OFS186_MASK
TMC5031_OFS186_SHIFT
TMC5031_OFS187_MASK
TMC5031_OFS187_SHIFT
TMC5031_OFS188_MASK
TMC5031_OFS188_SHIFT
TMC5031_OFS189_MASK
TMC5031_OFS189_SHIFT
TMC5031_OFS190_MASK
TMC5031_OFS190_SHIFT
TMC5031_OFS191_MASK
TMC5031_OFS191_SHIFT
TMC5031_OFS192_MASK
TMC5031_OFS192_SHIFT
TMC5031_OFS193_MASK
TMC5031_OFS193_SHIFT
TMC5031_OFS194_MASK
TMC5031_OFS194_SHIFT
TMC5031_OFS195_MASK
TMC5031_OFS195_SHIFT
TMC5031_OFS196_MASK
TMC5031_OFS196_SHIFT
TMC5031_OFS197_MASK
TMC5031_OFS197_SHIFT
TMC5031_OFS198_MASK
TMC5031_OFS198_SHIFT
TMC5031_OFS199_MASK
TMC5031_OFS199_SHIFT
TMC5031_OFS200_MASK
TMC5031_OFS200_SHIFT
TMC5031_OFS201_MASK
TMC5031_OFS201_SHIFT
TMC5031_OFS202_MASK
TMC5031_OFS202_SHIFT
TMC5031_OFS203_MASK
TMC5031_OFS203_SHIFT
TMC5031_OFS204_MASK
TMC5031_OFS204_SHIFT
TMC5031_OFS205_MASK
TMC5031_OFS205_SHIFT
TMC5031_OFS206_MASK
TMC5031_OFS206_SHIFT
TMC5031_OFS207_MASK
TMC5031_OFS207_SHIFT
TMC5031_OFS208_MASK
TMC5031_OFS208_SHIFT
TMC5031_OFS209_MASK
TMC5031_OFS209_SHIFT
TMC5031_OFS210_MASK
TMC5031_OFS210_SHIFT
TMC5031_OFS211_MASK
TMC5031_OFS211_SHIFT
TMC5031_OFS212_MASK
TMC5031_OFS212_SHIFT
TMC5031_OFS213_MASK
TMC5031_OFS213_SHIFT
TMC5031_OFS214_MASK
TMC5031_OFS214_SHIFT
TMC5031_OFS215_MASK
TMC5031_OFS215_SHIFT
TMC5031_OFS216_MASK
TMC5031_OFS216_SHIFT
TMC5031_OFS217_MASK
TMC5031_OFS217_SHIFT
TMC5031_OFS218_MASK
TMC5031_OFS218_SHIFT
TMC5031_OFS219_MASK
TMC5031_OFS219_SHIFT
TMC5031_OFS220_MASK
TMC5031_OFS220_SHIFT
TMC5031_OFS221_MASK
TMC5031_OFS221_SHIFT
TMC5031_OFS222_MASK
TMC5031_OFS222_SHIFT
TMC5031_OFS223_MASK
TMC5031_OFS223_SHIFT
TMC5031_OFS224_MASK
TMC5031_OFS224_SHIFT
TMC5031_OFS225_MASK
TMC5031_OFS225_SHIFT
TMC5031_OFS226_MASK
TMC5031_OFS226_SHIFT
TMC5031_OFS227_MASK
TMC5031_OFS227_SHIFT
TMC5031_OFS228_MASK
TMC5031_OFS228_SHIFT
TMC5031_OFS229_MASK
TMC5031_OFS229_SHIFT
TMC5031_OFS230_MASK
TMC5031_OFS230_SHIFT
TMC5031_OFS231_MASK
TMC5031_OFS231_SHIFT
TMC5031_OFS232_MASK
TMC5031_OFS232_SHIFT
TMC5031_OFS233_MASK
TMC5031_OFS233_SHIFT
TMC5031_OFS234_MASK
TMC5031_OFS234_SHIFT
TMC5031_OFS235_MASK
TMC5031_OFS235_SHIFT
TMC5031_OFS236_MASK
TMC5031_OFS236_SHIFT
TMC5031_OFS237_MASK
TMC5031_OFS237_SHIFT
TMC5031_OFS238_MASK
TMC5031_OFS238_SHIFT
TMC5031_OFS239_MASK
TMC5031_OFS239_SHIFT
TMC5031_OFS240_MASK
TMC5031_OFS240_SHIFT
TMC5031_OFS241_MASK
TMC5031_OFS241_SHIFT
TMC5031_OFS242_MASK
TMC5031_OFS242_SHIFT
TMC5031_OFS243_MASK
TMC5031_OFS243_SHIFT
TMC5031_OFS244_MASK
TMC5031_OFS244_SHIFT
TMC5031_OFS245_MASK
TMC5031_OFS245_SHIFT
TMC5031_OFS246_MASK
TMC5031_OFS246_SHIFT
TMC5031_OFS247_MASK
TMC5031_OFS247_SHIFT
TMC5031_OFS248_MASK
TMC5031_OFS248_SHIFT
TMC5031_OFS249_MASK
TMC5031_OFS249_SHIFT
TMC5031_OFS250_MASK
TMC5031_OFS250_SHIFT
TMC5031_OFS251_MASK
TMC5031_OFS251_SHIFT
TMC5031_OFS252_MASK
TMC5031_OFS252_SHIFT
TMC5031_OFS253_MASK
TMC5031_OFS253_SHIFT
TMC5031_OFS254_MASK
TMC5031_OFS254_SHIFT
TMC5031_OFS255_MASK
TMC5031_OFS255_SHIFT
TMC5031_W0_MASK
TMC5031_W0_SHIFT
TMC5031_W1_MASK
TMC5031_W1_SHIFT
TMC5031_W2_MASK
TMC5031_W2_SHIFT
TMC5031_W3_MASK
TMC5031_W3_SHIFT
TMC5031_X1_MASK
TMC5031_X1_SHIFT
TMC5031_X2_MASK
TMC5031_X2_SHIFT
TMC5031_X3_MASK
TMC5031_X3_SHIFT
TMC5031_START_SIN_MASK
TMC5031_START_SIN_SHIFT
TMC5031_START_SIN90_MASK
TMC5031_START_SIN90_SHIFT
TMC5031_MSCNT_MASK
TMC5031_MSCNT_SHIFT
TMC5031_CUR_A_MASK
TMC5031_CUR_A_SHIFT
TMC5031_CUR_B_MASK
TMC5031_CUR_B_SHIFT
TMC5031_TOFF_MASK
TMC5031_TOFF_SHIFT
TMC5031_TFD_ALL_MASK
TMC5031_TFD_ALL_SHIFT
TMC5031_OFFSET_MASK
TMC5031_OFFSET_SHIFT
TMC5031_TFD_3_MASK
TMC5031_TFD_3_SHIFT
TMC5031_DISFDCC_MASK
TMC5031_DISFDCC_SHIFT
TMC5031_RNDTF_MASK
TMC5031_RNDTF_SHIFT
TMC5031_CHM_MASK
TMC5031_CHM_SHIFT
TMC5031_TBL_MASK
TMC5031_TBL_SHIFT
TMC5031_VSENSE_MASK
TMC5031_VSENSE_SHIFT
TMC5031_VHIGHFS_MASK
TMC5031_VHIGHFS_SHIFT
TMC5031_VHIGHCHM_MASK
TMC5031_VHIGHCHM_SHIFT
TMC5031_SYNC_MASK
TMC5031_SYNC_SHIFT
TMC5031_DISS2G_MASK
TMC5031_DISS2G_SHIFT
TMC5031_TOFF_MASK
TMC5031_TOFF_SHIFT
TMC5031_TFD_ALL_MASK
TMC5031_TFD_ALL_SHIFT
TMC5031_OFFSET_MASK
TMC5031_OFFSET_SHIFT
TMC5031_TFD_3_MASK
TMC5031_TFD_3_SHIFT
TMC5031_DISFDCC_MASK
TMC5031_DISFDCC_SHIFT
TMC5031_RNDTF_MASK
TMC5031_RNDTF_SHIFT
TMC5031_CHM_MASK
TMC5031_CHM_SHIFT
TMC5031_TBL_MASK
TMC5031_TBL_SHIFT
TMC5031_VSENSE_MASK
TMC5031_VSENSE_SHIFT
TMC5031_VHIGHFS_MASK
TMC5031_VHIGHFS_SHIFT
TMC5031_VHIGHCHM_MASK
TMC5031_VHIGHCHM_SHIFT
TMC5031_SYNC_MASK
TMC5031_SYNC_SHIFT
TMC5031_MRES_MASK
TMC5031_MRES_SHIFT
TMC5031_DISS2G_MASK
TMC5031_DISS2G_SHIFT
TMC5031_TOFF_MASK
TMC5031_TOFF_SHIFT
TMC5031_HSTRT_MASK
TMC5031_HSTRT_SHIFT
TMC5031_HEND_MASK
TMC5031_HEND_SHIFT
TMC5031_RNDTF_MASK
TMC5031_RNDTF_SHIFT
TMC5031_CHM_MASK
TMC5031_CHM_SHIFT
TMC5031_TBL_MASK
TMC5031_TBL_SHIFT
TMC5031_VSENSE_MASK
TMC5031_VSENSE_SHIFT
TMC5031_VHIGHFS_MASK
TMC5031_VHIGHFS_SHIFT
TMC5031_VHIGHCHM_MASK
TMC5031_VHIGHCHM_SHIFT
TMC5031_SYNC_MASK
TMC5031_SYNC_SHIFT
TMC5031_MRES_MASK
TMC5031_MRES_SHIFT
TMC5031_DISS2G_MASK
TMC5031_DISS2G_SHIFT
TMC5031_SEMIN_MASK
TMC5031_SEMIN_SHIFT
TMC5031_SEUP_MASK
TMC5031_SEUP_SHIFT
TMC5031_SEMAX_MASK
TMC5031_SEMAX_SHIFT
TMC5031_SEDN_MASK
TMC5031_SEDN_SHIFT
TMC5031_SEIMIN_MASK
TMC5031_SEIMIN_SHIFT
TMC5031_SGT_MASK
TMC5031_SGT_SHIFT
TMC5031_SFILT_MASK
TMC5031_SFILT_SHIFT
TMC5031_SG_RESULT_MASK
TMC5031_SG_RESULT_SHIFT
TMC5031_FSACTIVE_MASK
TMC5031_FSACTIVE_SHIFT
TMC5031_CS_ACTUAL_MASK
TMC5031_CS_ACTUAL_SHIFT
TMC5031_STALLGUARD_MASK
TMC5031_STALLGUARD_SHIFT
TMC5031_OT_MASK
TMC5031_OT_SHIFT
TMC5031_OTPW_MASK
TMC5031_OTPW_SHIFT
TMC5031_S2GA_MASK
TMC5031_S2GA_SHIFT
TMC5031_S2GB_MASK
TMC5031_S2GB_SHIFT
TMC5031_OLA_MASK
TMC5031_OLA_SHIFT
TMC5031_OLB_MASK
TMC5031_OLB_SHIFT
TMC5031_STST_MASK
TMC5031_STST_SHIFT
TMC5031_OFS0_MASK
TMC5031_OFS0_SHIFT
TMC5031_OFS1_MASK
TMC5031_OFS1_SHIFT
TMC5031_OFS2_MASK
TMC5031_OFS2_SHIFT
TMC5031_OFS3_MASK
TMC5031_OFS3_SHIFT
TMC5031_OFS4_MASK
TMC5031_OFS4_SHIFT
TMC5031_OFS5_MASK
TMC5031_OFS5_SHIFT
TMC5031_OFS6_MASK
TMC5031_OFS6_SHIFT
TMC5031_OFS7_MASK
TMC5031_OFS7_SHIFT
TMC5031_OFS8_MASK
TMC5031_OFS8_SHIFT
TMC5031_OFS9_MASK
TMC5031_OFS9_SHIFT
TMC5031_OFS10_MASK
TMC5031_OFS10_SHIFT
TMC5031_OFS11_MASK
TMC5031_OFS11_SHIFT
TMC5031_OFS12_MASK
TMC5031_OFS12_SHIFT
TMC5031_OFS13_MASK
TMC5031_OFS13_SHIFT
TMC5031_OFS14_MASK
TMC5031_OFS14_SHIFT
TMC5031_OFS15_MASK
TMC5031_OFS15_SHIFT
TMC5031_OFS16_MASK
TMC5031_OFS16_SHIFT
TMC5031_OFS17_MASK
TMC5031_OFS17_SHIFT
TMC5031_OFS18_MASK
TMC5031_OFS18_SHIFT
TMC5031_OFS19_MASK
TMC5031_OFS19_SHIFT
TMC5031_OFS20_MASK
TMC5031_OFS20_SHIFT
TMC5031_OFS21_MASK
TMC5031_OFS21_SHIFT
TMC5031_OFS22_MASK
TMC5031_OFS22_SHIFT
TMC5031_OFS23_MASK
TMC5031_OFS23_SHIFT
TMC5031_OFS24_MASK
TMC5031_OFS24_SHIFT
TMC5031_OFS25_MASK
TMC5031_OFS25_SHIFT
TMC5031_OFS26_MASK
TMC5031_OFS26_SHIFT
TMC5031_OFS27_MASK
TMC5031_OFS27_SHIFT
TMC5031_OFS28_MASK
TMC5031_OFS28_SHIFT
TMC5031_OFS29_MASK
TMC5031_OFS29_SHIFT
TMC5031_OFS30_MASK
TMC5031_OFS30_SHIFT
TMC5031_OFS31_MASK
TMC5031_OFS31_SHIFT
TMC5031_OFS32_MASK
TMC5031_OFS32_SHIFT
TMC5031_OFS33_MASK
TMC5031_OFS33_SHIFT
TMC5031_OFS34_MASK
TMC5031_OFS34_SHIFT
TMC5031_OFS35_MASK
TMC5031_OFS35_SHIFT
TMC5031_OFS36_MASK
TMC5031_OFS36_SHIFT
TMC5031_OFS37_MASK
TMC5031_OFS37_SHIFT
TMC5031_OFS38_MASK
TMC5031_OFS38_SHIFT
TMC5031_OFS39_MASK
TMC5031_OFS39_SHIFT
TMC5031_OFS40_MASK
TMC5031_OFS40_SHIFT
TMC5031_OFS41_MASK
TMC5031_OFS41_SHIFT
TMC5031_OFS42_MASK
TMC5031_OFS42_SHIFT
TMC5031_OFS43_MASK
TMC5031_OFS43_SHIFT
TMC5031_OFS44_MASK
TMC5031_OFS44_SHIFT
TMC5031_OFS45_MASK
TMC5031_OFS45_SHIFT
TMC5031_OFS46_MASK
TMC5031_OFS46_SHIFT
TMC5031_OFS47_MASK
TMC5031_OFS47_SHIFT
TMC5031_OFS48_MASK
TMC5031_OFS48_SHIFT
TMC5031_OFS49_MASK
TMC5031_OFS49_SHIFT
TMC5031_OFS50_MASK
TMC5031_OFS50_SHIFT
TMC5031_OFS51_MASK
TMC5031_OFS51_SHIFT
TMC5031_OFS52_MASK
TMC5031_OFS52_SHIFT
TMC5031_OFS53_MASK
TMC5031_OFS53_SHIFT
TMC5031_OFS54_MASK
TMC5031_OFS54_SHIFT
TMC5031_OFS55_MASK
TMC5031_OFS55_SHIFT
TMC5031_OFS56_MASK
TMC5031_OFS56_SHIFT
TMC5031_OFS57_MASK
TMC5031_OFS57_SHIFT
TMC5031_OFS58_MASK
TMC5031_OFS58_SHIFT
TMC5031_OFS59_MASK
TMC5031_OFS59_SHIFT
TMC5031_OFS60_MASK
TMC5031_OFS60_SHIFT
TMC5031_OFS61_MASK
TMC5031_OFS61_SHIFT
TMC5031_OFS62_MASK
TMC5031_OFS62_SHIFT
TMC5031_OFS63_MASK
TMC5031_OFS63_SHIFT
TMC5031_OFS64_MASK
TMC5031_OFS64_SHIFT
TMC5031_OFS65_MASK
TMC5031_OFS65_SHIFT
TMC5031_OFS66_MASK
TMC5031_OFS66_SHIFT
TMC5031_OFS67_MASK
TMC5031_OFS67_SHIFT
TMC5031_OFS68_MASK
TMC5031_OFS68_SHIFT
TMC5031_OFS69_MASK
TMC5031_OFS69_SHIFT
TMC5031_OFS70_MASK
TMC5031_OFS70_SHIFT
TMC5031_OFS71_MASK
TMC5031_OFS71_SHIFT
TMC5031_OFS72_MASK
TMC5031_OFS72_SHIFT
TMC5031_OFS73_MASK
TMC5031_OFS73_SHIFT
TMC5031_OFS74_MASK
TMC5031_OFS74_SHIFT
TMC5031_OFS75_MASK
TMC5031_OFS75_SHIFT
TMC5031_OFS76_MASK
TMC5031_OFS76_SHIFT
TMC5031_OFS77_MASK
TMC5031_OFS77_SHIFT
TMC5031_OFS78_MASK
TMC5031_OFS78_SHIFT
TMC5031_OFS79_MASK
TMC5031_OFS79_SHIFT
TMC5031_OFS80_MASK
TMC5031_OFS80_SHIFT
TMC5031_OFS81_MASK
TMC5031_OFS81_SHIFT
TMC5031_OFS82_MASK
TMC5031_OFS82_SHIFT
TMC5031_OFS83_MASK
TMC5031_OFS83_SHIFT
TMC5031_OFS84_MASK
TMC5031_OFS84_SHIFT
TMC5031_OFS85_MASK
TMC5031_OFS85_SHIFT
TMC5031_OFS86_MASK
TMC5031_OFS86_SHIFT
TMC5031_OFS87_MASK
TMC5031_OFS87_SHIFT
TMC5031_OFS88_MASK
TMC5031_OFS88_SHIFT
TMC5031_OFS89_MASK
TMC5031_OFS89_SHIFT
TMC5031_OFS90_MASK
TMC5031_OFS90_SHIFT
TMC5031_OFS91_MASK
TMC5031_OFS91_SHIFT
TMC5031_OFS92_MASK
TMC5031_OFS92_SHIFT
TMC5031_OFS93_MASK
TMC5031_OFS93_SHIFT
TMC5031_OFS94_MASK
TMC5031_OFS94_SHIFT
TMC5031_OFS95_MASK
TMC5031_OFS95_SHIFT
TMC5031_OFS96_MASK
TMC5031_OFS96_SHIFT
TMC5031_OFS97_MASK
TMC5031_OFS97_SHIFT
TMC5031_OFS98_MASK
TMC5031_OFS98_SHIFT
TMC5031_OFS99_MASK
TMC5031_OFS99_SHIFT
TMC5031_OFS100_MASK
TMC5031_OFS100_SHIFT
TMC5031_OFS101_MASK
TMC5031_OFS101_SHIFT
TMC5031_OFS102_MASK
TMC5031_OFS102_SHIFT
TMC5031_OFS103_MASK
TMC5031_OFS103_SHIFT
TMC5031_OFS104_MASK
TMC5031_OFS104_SHIFT
TMC5031_OFS105_MASK
TMC5031_OFS105_SHIFT
TMC5031_OFS106_MASK
TMC5031_OFS106_SHIFT
TMC5031_OFS107_MASK
TMC5031_OFS107_SHIFT
TMC5031_OFS108_MASK
TMC5031_OFS108_SHIFT
TMC5031_OFS109_MASK
TMC5031_OFS109_SHIFT
TMC5031_OFS110_MASK
TMC5031_OFS110_SHIFT
TMC5031_OFS111_MASK
TMC5031_OFS111_SHIFT
TMC5031_OFS112_MASK
TMC5031_OFS112_SHIFT
TMC5031_OFS113_MASK
TMC5031_OFS113_SHIFT
TMC5031_OFS114_MASK
TMC5031_OFS114_SHIFT
TMC5031_OFS115_MASK
TMC5031_OFS115_SHIFT
TMC5031_OFS116_MASK
TMC5031_OFS116_SHIFT
TMC5031_OFS117_MASK
TMC5031_OFS117_SHIFT
TMC5031_OFS118_MASK
TMC5031_OFS118_SHIFT
TMC5031_OFS119_MASK
TMC5031_OFS119_SHIFT
TMC5031_OFS120_MASK
TMC5031_OFS120_SHIFT
TMC5031_OFS121_MASK
TMC5031_OFS121_SHIFT
TMC5031_OFS122_MASK
TMC5031_OFS122_SHIFT
TMC5031_OFS123_MASK
TMC5031_OFS123_SHIFT
TMC5031_OFS124_MASK
TMC5031_OFS124_SHIFT
TMC5031_OFS125_MASK
TMC5031_OFS125_SHIFT
TMC5031_OFS126_MASK
TMC5031_OFS126_SHIFT
TMC5031_OFS127_MASK
TMC5031_OFS127_SHIFT
TMC5031_OFS128_MASK
TMC5031_OFS128_SHIFT
TMC5031_OFS129_MASK
TMC5031_OFS129_SHIFT
TMC5031_OFS130_MASK
TMC5031_OFS130_SHIFT
TMC5031_OFS131_MASK
TMC5031_OFS131_SHIFT
TMC5031_OFS132_MASK
TMC5031_OFS132_SHIFT
TMC5031_OFS133_MASK
TMC5031_OFS133_SHIFT
TMC5031_OFS134_MASK
TMC5031_OFS134_SHIFT
TMC5031_OFS135_MASK
TMC5031_OFS135_SHIFT
TMC5031_OFS136_MASK
TMC5031_OFS136_SHIFT
TMC5031_OFS137_MASK
TMC5031_OFS137_SHIFT
TMC5031_OFS138_MASK
TMC5031_OFS138_SHIFT
TMC5031_OFS139_MASK
TMC5031_OFS139_SHIFT
TMC5031_OFS140_MASK
TMC5031_OFS140_SHIFT
TMC5031_OFS141_MASK
TMC5031_OFS141_SHIFT
TMC5031_OFS142_MASK
TMC5031_OFS142_SHIFT
TMC5031_OFS143_MASK
TMC5031_OFS143_SHIFT
TMC5031_OFS144_MASK
TMC5031_OFS144_SHIFT
TMC5031_OFS145_MASK
TMC5031_OFS145_SHIFT
TMC5031_OFS146_MASK
TMC5031_OFS146_SHIFT
TMC5031_OFS147_MASK
TMC5031_OFS147_SHIFT
TMC5031_OFS148_MASK
TMC5031_OFS148_SHIFT
TMC5031_OFS149_MASK
TMC5031_OFS149_SHIFT
TMC5031_OFS150_MASK
TMC5031_OFS150_SHIFT
TMC5031_OFS151_MASK
TMC5031_OFS151_SHIFT
TMC5031_OFS152_MASK
TMC5031_OFS152_SHIFT
TMC5031_OFS153_MASK
TMC5031_OFS153_SHIFT
TMC5031_OFS154_MASK
TMC5031_OFS154_SHIFT
TMC5031_OFS155_MASK
TMC5031_OFS155_SHIFT
TMC5031_OFS156_MASK
TMC5031_OFS156_SHIFT
TMC5031_OFS157_MASK
TMC5031_OFS157_SHIFT
TMC5031_OFS158_MASK
TMC5031_OFS158_SHIFT
TMC5031_OFS159_MASK
TMC5031_OFS159_SHIFT
TMC5031_OFS160_MASK
TMC5031_OFS160_SHIFT
TMC5031_OFS161_MASK
TMC5031_OFS161_SHIFT
TMC5031_OFS162_MASK
TMC5031_OFS162_SHIFT
TMC5031_OFS163_MASK
TMC5031_OFS163_SHIFT
TMC5031_OFS164_MASK
TMC5031_OFS164_SHIFT
TMC5031_OFS165_MASK
TMC5031_OFS165_SHIFT
TMC5031_OFS166_MASK
TMC5031_OFS166_SHIFT
TMC5031_OFS167_MASK
TMC5031_OFS167_SHIFT
TMC5031_OFS168_MASK
TMC5031_OFS168_SHIFT
TMC5031_OFS169_MASK
TMC5031_OFS169_SHIFT
TMC5031_OFS170_MASK
TMC5031_OFS170_SHIFT
TMC5031_OFS171_MASK
TMC5031_OFS171_SHIFT
TMC5031_OFS172_MASK
TMC5031_OFS172_SHIFT
TMC5031_OFS173_MASK
TMC5031_OFS173_SHIFT
TMC5031_OFS174_MASK
TMC5031_OFS174_SHIFT
TMC5031_OFS175_MASK
TMC5031_OFS175_SHIFT
TMC5031_OFS176_MASK
TMC5031_OFS176_SHIFT
TMC5031_OFS177_MASK
TMC5031_OFS177_SHIFT
TMC5031_OFS178_MASK
TMC5031_OFS178_SHIFT
TMC5031_OFS179_MASK
TMC5031_OFS179_SHIFT
TMC5031_OFS180_MASK
TMC5031_OFS180_SHIFT
TMC5031_OFS181_MASK
TMC5031_OFS181_SHIFT
TMC5031_OFS182_MASK
TMC5031_OFS182_SHIFT
TMC5031_OFS183_MASK
TMC5031_OFS183_SHIFT
TMC5031_OFS184_MASK
TMC5031_OFS184_SHIFT
TMC5031_OFS185_MASK
TMC5031_OFS185_SHIFT
TMC5031_OFS186_MASK
TMC5031_OFS186_SHIFT
TMC5031_OFS187_MASK
TMC5031_OFS187_SHIFT
TMC5031_OFS188_MASK
TMC5031_OFS188_SHIFT
TMC5031_OFS189_MASK
TMC5031_OFS189_SHIFT
TMC5031_OFS190_MASK
TMC5031_OFS190_SHIFT
TMC5031_OFS191_MASK
TMC5031_OFS191_SHIFT
TMC5031_OFS192_MASK
TMC5031_OFS192_SHIFT
TMC5031_OFS193_MASK
TMC5031_OFS193_SHIFT
TMC5031_OFS194_MASK
TMC5031_OFS194_SHIFT
TMC5031_OFS195_MASK
TMC5031_OFS195_SHIFT
TMC5031_OFS196_MASK
TMC5031_OFS196_SHIFT
TMC5031_OFS197_MASK
TMC5031_OFS197_SHIFT
TMC5031_OFS198_MASK
TMC5031_OFS198_SHIFT
TMC5031_OFS199_MASK
TMC5031_OFS199_SHIFT
TMC5031_OFS200_MASK
TMC5031_OFS200_SHIFT
TMC5031_OFS201_MASK
TMC5031_OFS201_SHIFT
TMC5031_OFS202_MASK
TMC5031_OFS202_SHIFT
TMC5031_OFS203_MASK
TMC5031_OFS203_SHIFT
TMC5031_OFS204_MASK
TMC5031_OFS204_SHIFT
TMC5031_OFS205_MASK
TMC5031_OFS205_SHIFT
TMC5031_OFS206_MASK
TMC5031_OFS206_SHIFT
TMC5031_OFS207_MASK
TMC5031_OFS207_SHIFT
TMC5031_OFS208_MASK
TMC5031_OFS208_SHIFT
TMC5031_OFS209_MASK
TMC5031_OFS209_SHIFT
TMC5031_OFS210_MASK
TMC5031_OFS210_SHIFT
TMC5031_OFS211_MASK
TMC5031_OFS211_SHIFT
TMC5031_OFS212_MASK
TMC5031_OFS212_SHIFT
TMC5031_OFS213_MASK
TMC5031_OFS213_SHIFT
TMC5031_OFS214_MASK
TMC5031_OFS214_SHIFT
TMC5031_OFS215_MASK
TMC5031_OFS215_SHIFT
TMC5031_OFS216_MASK
TMC5031_OFS216_SHIFT
TMC5031_OFS217_MASK
TMC5031_OFS217_SHIFT
TMC5031_OFS218_MASK
TMC5031_OFS218_SHIFT
TMC5031_OFS219_MASK
TMC5031_OFS219_SHIFT
TMC5031_OFS220_MASK
TMC5031_OFS220_SHIFT
TMC5031_OFS221_MASK
TMC5031_OFS221_SHIFT
TMC5031_OFS222_MASK
TMC5031_OFS222_SHIFT
TMC5031_OFS223_MASK
TMC5031_OFS223_SHIFT
TMC5031_OFS224_MASK
TMC5031_OFS224_SHIFT
TMC5031_OFS225_MASK
TMC5031_OFS225_SHIFT
TMC5031_OFS226_MASK
TMC5031_OFS226_SHIFT
TMC5031_OFS227_MASK
TMC5031_OFS227_SHIFT
TMC5031_OFS228_MASK
TMC5031_OFS228_SHIFT
TMC5031_OFS229_MASK
TMC5031_OFS229_SHIFT
TMC5031_OFS230_MASK
TMC5031_OFS230_SHIFT
TMC5031_OFS231_MASK
TMC5031_OFS231_SHIFT
TMC5031_OFS232_MASK
TMC5031_OFS232_SHIFT
TMC5031_OFS233_MASK
TMC5031_OFS233_SHIFT
TMC5031_OFS234_MASK
TMC5031_OFS234_SHIFT
TMC5031_OFS235_MASK
TMC5031_OFS235_SHIFT
TMC5031_OFS236_MASK
TMC5031_OFS236_SHIFT
TMC5031_OFS237_MASK
TMC5031_OFS237_SHIFT
TMC5031_OFS238_MASK
TMC5031_OFS238_SHIFT
TMC5031_OFS239_MASK
TMC5031_OFS239_SHIFT
TMC5031_OFS240_MASK
TMC5031_OFS240_SHIFT
TMC5031_OFS241_MASK
TMC5031_OFS241_SHIFT
TMC5031_OFS242_MASK
TMC5031_OFS242_SHIFT
TMC5031_OFS243_MASK
TMC5031_OFS243_SHIFT
TMC5031_OFS244_MASK
TMC5031_OFS244_SHIFT
TMC5031_OFS245_MASK
TMC5031_OFS245_SHIFT
TMC5031_OFS246_MASK
TMC5031_OFS246_SHIFT
TMC5031_OFS247_MASK
TMC5031_OFS247_SHIFT
TMC5031_OFS248_MASK
TMC5031_OFS248_SHIFT
TMC5031_OFS249_MASK
TMC5031_OFS249_SHIFT
TMC5031_OFS250_MASK
TMC5031_OFS250_SHIFT
TMC5031_OFS251_MASK
TMC5031_OFS251_SHIFT
TMC5031_OFS252_MASK
TMC5031_OFS252_SHIFT
TMC5031_OFS253_MASK
TMC5031_OFS253_SHIFT
TMC5031_OFS254_MASK
TMC5031_OFS254_SHIFT
TMC5031_OFS255_MASK
TMC5031_OFS255_SHIFT
TMC5031_W0_MASK
TMC5031_W0_SHIFT
TMC5031_W1_MASK
TMC5031_W1_SHIFT
TMC5031_W2_MASK
TMC5031_W2_SHIFT
TMC5031_W3_MASK
TMC5031_W3_SHIFT
TMC5031_X1_MASK
TMC5031_X1_SHIFT
TMC5031_X2_MASK
TMC5031_X2_SHIFT
TMC5031_X3_MASK
TMC5031_X3_SHIFT
TMC5031_START_SIN_MASK
TMC5031_START_SIN_SHIFT
TMC5031_START_SIN90_MASK
TMC5031_START_SIN90_SHIFT
TMC5031_MSCNT_MASK
TMC5031_MSCNT_SHIFT
TMC5031_CUR_A_MASK
TMC5031_CUR_A_SHIFT
TMC5031_CUR_B_MASK
TMC5031_CUR_B_SHIFT
TMC5031_TOFF_MASK
TMC5031_TOFF_SHIFT
TMC5031_TFD_ALL_MASK
TMC5031_TFD_ALL_SHIFT
TMC5031_OFFSET_MASK
TMC5031_OFFSET_SHIFT
TMC5031_TFD_3_MASK
TMC5031_TFD_3_SHIFT
TMC5031_DISFDCC_MASK
TMC5031_DISFDCC_SHIFT
TMC5031_RNDTF_MASK
TMC5031_RNDTF_SHIFT
TMC5031_CHM_MASK
TMC5031_CHM_SHIFT
TMC5031_TBL_MASK
TMC5031_TBL_SHIFT
TMC5031_VSENSE_MASK
TMC5031_VSENSE_SHIFT
TMC5031_VHIGHFS_MASK
TMC5031_VHIGHFS_SHIFT
TMC5031_VHIGHCHM_MASK
TMC5031_VHIGHCHM_SHIFT
TMC5031_SYNC_MASK
TMC5031_SYNC_SHIFT
TMC5031_MRES_MASK
TMC5031_MRES_SHIFT
TMC5031_DISS2G_MASK
TMC5031_DISS2G_SHIFT
TMC5031_TOFF_MASK
TMC5031_TOFF_SHIFT
TMC5031_TFD_ALL_MASK
TMC5031_TFD_ALL_SHIFT
TMC5031_OFFSET_MASK
TMC5031_OFFSET_SHIFT
TMC5031_TFD_3_MASK
TMC5031_TFD_3_SHIFT
TMC5031_DISFDCC_MASK
TMC5031_DISFDCC_SHIFT
TMC5031_RNDTF_MASK
TMC5031_RNDTF_SHIFT
TMC5031_CHM_MASK
TMC5031_CHM_SHIFT
TMC5031_TBL_MASK
TMC5031_TBL_SHIFT
TMC5031_VSENSE_MASK
TMC5031_VSENSE_SHIFT
TMC5031_VHIGHFS_MASK
TMC5031_VHIGHFS_SHIFT
TMC5031_VHIGHCHM_MASK
TMC5031_VHIGHCHM_SHIFT
TMC5031_SYNC_MASK
TMC5031_SYNC_SHIFT
TMC5031_MRES_MASK
TMC5031_MRES_SHIFT
TMC5031_DISS2G_MASK
TMC5031_DISS2G_SHIFT
TMC5031_TOFF_MASK
TMC5031_TOFF_SHIFT
TMC5031_HSTRT_MASK
TMC5031_HSTRT_SHIFT
TMC5031_HEND_MASK
TMC5031_HEND_SHIFT
TMC5031_RNDTF_MASK
TMC5031_RNDTF_SHIFT
TMC5031_CHM_MASK
TMC5031_CHM_SHIFT
TMC5031_TBL_MASK
TMC5031_TBL_SHIFT
TMC5031_VSENSE_MASK
TMC5031_VSENSE_SHIFT
TMC5031_VHIGHFS_MASK
TMC5031_VHIGHFS_SHIFT
TMC5031_VHIGHCHM_MASK
TMC5031_VHIGHCHM_SHIFT
TMC5031_SYNC_MASK
TMC5031_SYNC_SHIFT
TMC5031_MRES_MASK
TMC5031_MRES_SHIFT
TMC5031_DISS2G_MASK
TMC5031_DISS2G_SHIFT
TMC5031_SEMIN_MASK
TMC5031_SEMIN_SHIFT
TMC5031_SEUP_MASK
TMC5031_SEUP_SHIFT
TMC5031_SEMAX_MASK
TMC5031_SEMAX_SHIFT
TMC5031_SEDN_MASK
TMC5031_SEDN_SHIFT
TMC5031_SEIMIN_MASK
TMC5031_SEIMIN_SHIFT
TMC5031_SGT_MASK
TMC5031_SGT_SHIFT
TMC5031_SFILT_MASK
TMC5031_SFILT_SHIFT
TMC5031_SG_RESULT_MASK
TMC5031_SG_RESULT_SHIFT
TMC5031_FSACTIVE_MASK
TMC5031_FSACTIVE_SHIFT
TMC5031_CS_ACTUAL_MASK
TMC5031_CS_ACTUAL_SHIFT
TMC5031_STALLGUARD_MASK
TMC5031_STALLGUARD_SHIFT
TMC5031_OT_MASK
TMC5031_OT_SHIFT
TMC5031_OTPW_MASK
TMC5031_OTPW_SHIFT
TMC5031_S2GA_MASK
TMC5031_S2GA_SHIFT
TMC5031_S2GB_MASK
TMC5031_S2GB_SHIFT
TMC5031_OLA_MASK
TMC5031_OLA_SHIFT
TMC5031_OLB_MASK
TMC5031_OLB_SHIFT
TMC5031_STST_MASK
TMC5031_STST_SHIFT
file TMC5031_Register.h

Defines

TMC5031_MOTOR_ADDR(m)
TMC5031_MOTOR_ADDR_DRV(m)
TMC5031_MOTOR_ADDR_PWM(m)
TMC5031_GCONF
TMC5031_GSTAT
TMC5031_IFCNT
TMC5031_SLAVECONF
TMC5031_INP_OUT
TMC5031_X_COMPARE
TMC5031_PWMCONF(motor)
TMC5031_PWM_STATUS(motor)
TMC5031_RAMPMODE(motor)
TMC5031_XACTUAL(motor)
TMC5031_VACTUAL(motor)
TMC5031_VSTART(motor)
TMC5031_A1(motor)
TMC5031_V1(motor)
TMC5031_AMAX(motor)
TMC5031_VMAX(motor)
TMC5031_DMAX(motor)
TMC5031_D1(motor)
TMC5031_VSTOP(motor)
TMC5031_TZEROWAIT(motor)
TMC5031_XTARGET(motor)
TMC5031_IHOLD_IRUN(motor)
TMC5031_VCOOLTHRS(motor)
TMC5031_VHIGH(motor)
TMC5031_VDCMIN(motor)
TMC5031_SWMODE(motor)
TMC5031_RAMPSTAT(motor)
TMC5031_XLATCH(motor)
TMC5031_ENCMODE(motor)
TMC5031_XENC(motor)
TMC5031_ENC_CONST(motor)
TMC5031_ENC_STATUS(motor)
TMC5031_ENC_LATCH(motor)
TMC5031_MSLUT0(motor)
TMC5031_MSLUT1(motor)
TMC5031_MSLUT2(motor)
TMC5031_MSLUT3(motor)
TMC5031_MSLUT4(motor)
TMC5031_MSLUT5(motor)
TMC5031_MSLUT6(motor)
TMC5031_MSLUT7(motor)
TMC5031_MSLUTSEL(motor)
TMC5031_MSLUTSTART(motor)
TMC5031_MSCNT(motor)
TMC5031_MSCURACT(motor)
TMC5031_CHOPCONF(motor)
TMC5031_COOLCONF(motor)
TMC5031_DCCTRL(motor)
TMC5031_DRVSTATUS(motor)
file TMC5041.c
#include “TMC5041.h”

Functions

void tmc5041_readWriteArray(uint8_t channel, uint8_t *data, size_t length)
void tmc5041_writeDatagram(TMC5041TypeDef *tmc5041, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc5041_writeInt(TMC5041TypeDef *tmc5041, uint8_t address, int32_t value)
int32_t tmc5041_readInt(TMC5041TypeDef *tmc5041, uint8_t address)
void tmc5041_init(TMC5041TypeDef *tmc5041, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
static void tmc5041_writeConfiguration(TMC5041TypeDef *tmc5041)
void tmc5041_periodicJob(TMC5041TypeDef *tmc5041, uint32_t tick)
uint8_t tmc5041_reset(TMC5041TypeDef *tmc5041)
uint8_t tmc5041_restore(TMC5041TypeDef *tmc5041)
file TMC5041.h
#include “tmc/helpers/API_Header.h”
#include “TMC5041_Register.h”
#include “TMC5041_Constants.h”
#include “TMC5041_Fields.h”

Defines

TMC5041_FIELD_READ(tdef, address, mask, shift)
TMC5041_FIELD_WRITE(tdef, address, mask, shift, value)
R30
R32
R50
R52
R60
R61
R62
R63
R64
R65
R66
R67
R68
R69
R6C
R7C

Functions

void tmc5041_writeDatagram(TMC5041TypeDef *tmc5041, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc5041_writeInt(TMC5041TypeDef *tmc5041, uint8_t address, int32_t value)
int32_t tmc5041_readInt(TMC5041TypeDef *tmc5041, uint8_t address)
void tmc5041_init(TMC5041TypeDef *tmc5041, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
void tmc5041_periodicJob(TMC5041TypeDef *tmc5041, uint32_t tick)
uint8_t tmc5041_reset(TMC5041TypeDef *tmc5041)
uint8_t tmc5041_restore(TMC5041TypeDef *tmc5041)

Variables

static const uint8_t tmc5041_defaultRegisterAccess[TMC5041_REGISTER_COUNT] = {3, 1, 0, 2, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0, 3, 3, 1, 2, 2, 2, 2, 2, 2, 0, 2, 2, 2, 3, 0, 0, 2, 2, 2, 0, 3, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 3, 1, 2, 2, 2, 2, 2, 2, 0, 2, 2, 2, 3, 0, 0, 2, 2, 2, 0, 3, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 3, 2, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 3, 2, 0, 1}
static const int32_t tmc5041_defaultRegisterResetState[TMC5041_REGISTER_COUNT] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R30, 0, R32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R50, 0, R52, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R60, R61, R62, R63, R64, R65, R66, R67, R68, R69, 0, 0, R6C, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R7C, 0, 0, 0}
file TMC5041_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC5041_REGISTER_COUNT
TMC5041_MOTORS
TMC5041_WRITE_BIT
TMC5041_ADDRESS_MASK
TMC5041_MAX_VELOCITY
TMC5041_MAX_ACCELERATION
TMC5041_MODE_POSITION
TMC5041_MODE_VELPOS
TMC5041_MODE_VELNEG
TMC5041_MODE_HOLD
file TMC5041_Fields.h

Defines

TMC5041_POSCMP_ENABLE_MASK
TMC5041_POSCMP_ENABLE_SHIFT
TMC5041_TEST_MODE_MASK
TMC5041_TEST_MODE_SHIFT
TMC5041_SHAFT1_MASK
TMC5041_SHAFT1_SHIFT
TMC5041_SHAFT2_MASK
TMC5041_SHAFT2_SHIFT
TMC5041_LOCK_GCONF_MASK
TMC5041_LOCK_GCONF_SHIFT
TMC5041_RESET_MASK
TMC5041_RESET_SHIFT
TMC5041_DRV_ERR1_MASK
TMC5041_DRV_ERR1_SHIFT
TMC5041_DRV_ERR2_MASK
TMC5041_DRV_ERR2_SHIFT
TMC5041_UV_CP_MASK
TMC5041_UV_CP_SHIFT
TMC5041_IFCNT_MASK
TMC5041_IFCNT_SHIFT
TMC5041_TEST_SEL_MASK
TMC5041_TEST_SEL_SHIFT
TMC5041_DRV_ENN_MASK
TMC5041_DRV_ENN_SHIFT
TMC5041_VERSION_MASK
TMC5041_VERSION_SHIFT
TMC5041_X_COMPARE_MASK
TMC5041_X_COMPARE_SHIFT
TMC5041_PWM_AMPL_MASK
TMC5041_PWM_AMPL_SHIFT
TMC5041_PWM_GRAD_MASK
TMC5041_PWM_GRAD_SHIFT
TMC5041_PWM_FREQ_MASK
TMC5041_PWM_FREQ_SHIFT
TMC5041_PWM_AUTOSCALE_MASK
TMC5041_PWM_AUTOSCALE_SHIFT
TMC5041_PWM_SYMMETRIC_MASK
TMC5041_PWM_SYMMETRIC_SHIFT
TMC5041_FREEWHEEL_MASK
TMC5041_FREEWHEEL_SHIFT
TMC5041_PWM_GRAD_MASK
TMC5041_PWM_GRAD_SHIFT
TMC5041_PWM_FREQ_MASK
TMC5041_PWM_FREQ_SHIFT
TMC5041_PWM_AUTOSCALE_MASK
TMC5041_PWM_AUTOSCALE_SHIFT
TMC5041_PWM_SYMMETRIC_MASK
TMC5041_PWM_SYMMETRIC_SHIFT
TMC5041_FREEWHEEL_MASK
TMC5041_FREEWHEEL_SHIFT
TMC5041_PWM__STATUS_MASK
TMC5041_PWM__STATUS_SHIFT
TMC5041_PWM_AMPL_MASK
TMC5041_PWM_AMPL_SHIFT
TMC5041_PWM_GRAD_MASK
TMC5041_PWM_GRAD_SHIFT
TMC5041_PWM_FREQ_MASK
TMC5041_PWM_FREQ_SHIFT
TMC5041_PWM_AUTOSCALE_MASK
TMC5041_PWM_AUTOSCALE_SHIFT
TMC5041_PWM_SYMMETRIC_MASK
TMC5041_PWM_SYMMETRIC_SHIFT
TMC5041_FREEWHEEL_MASK
TMC5041_FREEWHEEL_SHIFT
TMC5041_PWM_GRAD_MASK
TMC5041_PWM_GRAD_SHIFT
TMC5041_PWM_FREQ_MASK
TMC5041_PWM_FREQ_SHIFT
TMC5041_PWM_AUTOSCALE_MASK
TMC5041_PWM_AUTOSCALE_SHIFT
TMC5041_PWM_SYMMETRIC_MASK
TMC5041_PWM_SYMMETRIC_SHIFT
TMC5041_FREEWHEEL_MASK
TMC5041_FREEWHEEL_SHIFT
TMC5041_PWM__STATUS_MASK
TMC5041_PWM__STATUS_SHIFT
TMC5041_RAMPMODE_MASK
TMC5041_RAMPMODE_SHIFT
TMC5041_XACTUAL_MASK
TMC5041_XACTUAL_SHIFT
TMC5041_VACTUAL_MASK
TMC5041_VACTUAL_SHIFT
TMC5041_VSTART_MASK
TMC5041_VSTART_SHIFT
TMC5041_A1_MASK
TMC5041_A1_SHIFT
TMC5041_V1__MASK
TMC5041_V1__SHIFT
TMC5041_AMAX_MASK
TMC5041_AMAX_SHIFT
TMC5041_VMAX_MASK
TMC5041_VMAX_SHIFT
TMC5041_DMAX_MASK
TMC5041_DMAX_SHIFT
TMC5041_D1_MASK
TMC5041_D1_SHIFT
TMC5041_VSTOP_MASK
TMC5041_VSTOP_SHIFT
TMC5041_TZEROWAIT_MASK
TMC5041_TZEROWAIT_SHIFT
TMC5041_XTARGET_MASK
TMC5041_XTARGET_SHIFT
TMC5041_RAMPMODE_MASK
TMC5041_RAMPMODE_SHIFT
TMC5041_XACTUAL_MASK
TMC5041_XACTUAL_SHIFT
TMC5041_VACTUAL_MASK
TMC5041_VACTUAL_SHIFT
TMC5041_VSTART_MASK
TMC5041_VSTART_SHIFT
TMC5041_A1_MASK
TMC5041_A1_SHIFT
TMC5041_V1__MASK
TMC5041_V1__SHIFT
TMC5041_AMAX_MASK
TMC5041_AMAX_SHIFT
TMC5041_VMAX_MASK
TMC5041_VMAX_SHIFT
TMC5041_DMAX_MASK
TMC5041_DMAX_SHIFT
TMC5041_D1_MASK
TMC5041_D1_SHIFT
TMC5041_VSTOP_MASK
TMC5041_VSTOP_SHIFT
TMC5041_TZEROWAIT_MASK
TMC5041_TZEROWAIT_SHIFT
TMC5041_XTARGET_MASK
TMC5041_XTARGET_SHIFT
TMC5041_IHOLD_MASK
TMC5041_IHOLD_SHIFT
TMC5041_IRUN_MASK
TMC5041_IRUN_SHIFT
TMC5041_IHOLDDELAY_MASK
TMC5041_IHOLDDELAY_SHIFT
TMC5041_VCOOLTHRS_MASK
TMC5041_VCOOLTHRS_SHIFT
TMC5041_VHIGH_MASK
TMC5041_VHIGH_SHIFT
TMC5041_VDCMIN_MASK
TMC5041_VDCMIN_SHIFT
TMC5041_STOP_L_ENABLE_MASK
TMC5041_STOP_L_ENABLE_SHIFT
TMC5041_STOP_R_ENABLE_MASK
TMC5041_STOP_R_ENABLE_SHIFT
TMC5041_POL_STOP_L_MASK
TMC5041_POL_STOP_L_SHIFT
TMC5041_POL_STOP_R_MASK
TMC5041_POL_STOP_R_SHIFT
TMC5041_SWAP_LR_MASK
TMC5041_SWAP_LR_SHIFT
TMC5041_LATCH_L_ACTIVE_MASK
TMC5041_LATCH_L_ACTIVE_SHIFT
TMC5041_LATCH_L_INACTIVE_MASK
TMC5041_LATCH_L_INACTIVE_SHIFT
TMC5041_LATCH_R_ACTIVE_MASK
TMC5041_LATCH_R_ACTIVE_SHIFT
TMC5041_LATCH_R_INACTIVE_MASK
TMC5041_LATCH_R_INACTIVE_SHIFT
TMC5041_SG_STOP_MASK
TMC5041_SG_STOP_SHIFT
TMC5041_EN_SOFTSTOP_MASK
TMC5041_EN_SOFTSTOP_SHIFT
TMC5041_STATUS_STOP_L_MASK
TMC5041_STATUS_STOP_L_SHIFT
TMC5041_STATUS_STOP_R_MASK
TMC5041_STATUS_STOP_R_SHIFT
TMC5041_STATUS_LATCH_L_MASK
TMC5041_STATUS_LATCH_L_SHIFT
TMC5041_STATUS_LATCH_R_MASK
TMC5041_STATUS_LATCH_R_SHIFT
TMC5041_EVENT_STOP_L_MASK
TMC5041_EVENT_STOP_L_SHIFT
TMC5041_EVENT_STOP_R_MASK
TMC5041_EVENT_STOP_R_SHIFT
TMC5041_EVENT_STOP_SG_MASK
TMC5041_EVENT_STOP_SG_SHIFT
TMC5041_EVENT_POS_REACHED_MASK
TMC5041_EVENT_POS_REACHED_SHIFT
TMC5041_VELOCITY_REACHED_MASK
TMC5041_VELOCITY_REACHED_SHIFT
TMC5041_POSITION_REACHED_MASK
TMC5041_POSITION_REACHED_SHIFT
TMC5041_VZERO_MASK
TMC5041_VZERO_SHIFT
TMC5041_T_ZEROWAIT_ACTIVE_MASK
TMC5041_T_ZEROWAIT_ACTIVE_SHIFT
TMC5041_SECOND_MOVE_MASK
TMC5041_SECOND_MOVE_SHIFT
TMC5041_STATUS_SG_MASK
TMC5041_STATUS_SG_SHIFT
TMC5041_XLATCH_MASK
TMC5041_XLATCH_SHIFT
TMC5041_IHOLD_MASK
TMC5041_IHOLD_SHIFT
TMC5041_IRUN_MASK
TMC5041_IRUN_SHIFT
TMC5041_IHOLDDELAY_MASK
TMC5041_IHOLDDELAY_SHIFT
TMC5041_VCOOLTHRS_MASK
TMC5041_VCOOLTHRS_SHIFT
TMC5041_VHIGH_MASK
TMC5041_VHIGH_SHIFT
TMC5041_VDCMIN_MASK
TMC5041_VDCMIN_SHIFT
TMC5041_STOP_L_ENABLE_MASK
TMC5041_STOP_L_ENABLE_SHIFT
TMC5041_STOP_R_ENABLE_MASK
TMC5041_STOP_R_ENABLE_SHIFT
TMC5041_POL_STOP_L_MASK
TMC5041_POL_STOP_L_SHIFT
TMC5041_POL_STOP_R_MASK
TMC5041_POL_STOP_R_SHIFT
TMC5041_SWAP_LR_MASK
TMC5041_SWAP_LR_SHIFT
TMC5041_LATCH_L_ACTIVE_MASK
TMC5041_LATCH_L_ACTIVE_SHIFT
TMC5041_LATCH_L_INACTIVE_MASK
TMC5041_LATCH_L_INACTIVE_SHIFT
TMC5041_LATCH_R_ACTIVE_MASK
TMC5041_LATCH_R_ACTIVE_SHIFT
TMC5041_LATCH_R_INACTIVE_MASK
TMC5041_LATCH_R_INACTIVE_SHIFT
TMC5041_SG_STOP_MASK
TMC5041_SG_STOP_SHIFT
TMC5041_EN_SOFTSTOP_MASK
TMC5041_EN_SOFTSTOP_SHIFT
TMC5041_STATUS_STOP_L_MASK
TMC5041_STATUS_STOP_L_SHIFT
TMC5041_STATUS_STOP_R_MASK
TMC5041_STATUS_STOP_R_SHIFT
TMC5041_STATUS_LATCH_L_MASK
TMC5041_STATUS_LATCH_L_SHIFT
TMC5041_STATUS_LATCH_R_MASK
TMC5041_STATUS_LATCH_R_SHIFT
TMC5041_EVENT_STOP_L_MASK
TMC5041_EVENT_STOP_L_SHIFT
TMC5041_EVENT_STOP_R_MASK
TMC5041_EVENT_STOP_R_SHIFT
TMC5041_EVENT_STOP_SG_MASK
TMC5041_EVENT_STOP_SG_SHIFT
TMC5041_EVENT_POS_REACHED_MASK
TMC5041_EVENT_POS_REACHED_SHIFT
TMC5041_VELOCITY_REACHED_MASK
TMC5041_VELOCITY_REACHED_SHIFT
TMC5041_POSITION_REACHED_MASK
TMC5041_POSITION_REACHED_SHIFT
TMC5041_VZERO_MASK
TMC5041_VZERO_SHIFT
TMC5041_T_ZEROWAIT_ACTIVE_MASK
TMC5041_T_ZEROWAIT_ACTIVE_SHIFT
TMC5041_SECOND_MOVE_MASK
TMC5041_SECOND_MOVE_SHIFT
TMC5041_STATUS_SG_MASK
TMC5041_STATUS_SG_SHIFT
TMC5041_XLATCH_MASK
TMC5041_XLATCH_SHIFT
TMC5041_OFS0_MASK
TMC5041_OFS0_SHIFT
TMC5041_OFS1_MASK
TMC5041_OFS1_SHIFT
TMC5041_OFS2_MASK
TMC5041_OFS2_SHIFT
TMC5041_OFS3_MASK
TMC5041_OFS3_SHIFT
TMC5041_OFS4_MASK
TMC5041_OFS4_SHIFT
TMC5041_OFS5_MASK
TMC5041_OFS5_SHIFT
TMC5041_OFS6_MASK
TMC5041_OFS6_SHIFT
TMC5041_OFS7_MASK
TMC5041_OFS7_SHIFT
TMC5041_OFS8_MASK
TMC5041_OFS8_SHIFT
TMC5041_OFS9_MASK
TMC5041_OFS9_SHIFT
TMC5041_OFS10_MASK
TMC5041_OFS10_SHIFT
TMC5041_OFS11_MASK
TMC5041_OFS11_SHIFT
TMC5041_OFS12_MASK
TMC5041_OFS12_SHIFT
TMC5041_OFS13_MASK
TMC5041_OFS13_SHIFT
TMC5041_OFS14_MASK
TMC5041_OFS14_SHIFT
TMC5041_OFS15_MASK
TMC5041_OFS15_SHIFT
TMC5041_OFS16_MASK
TMC5041_OFS16_SHIFT
TMC5041_OFS17_MASK
TMC5041_OFS17_SHIFT
TMC5041_OFS18_MASK
TMC5041_OFS18_SHIFT
TMC5041_OFS19_MASK
TMC5041_OFS19_SHIFT
TMC5041_OFS20_MASK
TMC5041_OFS20_SHIFT
TMC5041_OFS21_MASK
TMC5041_OFS21_SHIFT
TMC5041_OFS22_MASK
TMC5041_OFS22_SHIFT
TMC5041_OFS23_MASK
TMC5041_OFS23_SHIFT
TMC5041_OFS24_MASK
TMC5041_OFS24_SHIFT
TMC5041_OFS25_MASK
TMC5041_OFS25_SHIFT
TMC5041_OFS26_MASK
TMC5041_OFS26_SHIFT
TMC5041_OFS27_MASK
TMC5041_OFS27_SHIFT
TMC5041_OFS28_MASK
TMC5041_OFS28_SHIFT
TMC5041_OFS29_MASK
TMC5041_OFS29_SHIFT
TMC5041_OFS30_MASK
TMC5041_OFS30_SHIFT
TMC5041_OFS31_MASK
TMC5041_OFS31_SHIFT
TMC5041_OFS32_MASK
TMC5041_OFS32_SHIFT
TMC5041_OFS33_MASK
TMC5041_OFS33_SHIFT
TMC5041_OFS34_MASK
TMC5041_OFS34_SHIFT
TMC5041_OFS35_MASK
TMC5041_OFS35_SHIFT
TMC5041_OFS36_MASK
TMC5041_OFS36_SHIFT
TMC5041_OFS37_MASK
TMC5041_OFS37_SHIFT
TMC5041_OFS38_MASK
TMC5041_OFS38_SHIFT
TMC5041_OFS39_MASK
TMC5041_OFS39_SHIFT
TMC5041_OFS40_MASK
TMC5041_OFS40_SHIFT
TMC5041_OFS41_MASK
TMC5041_OFS41_SHIFT
TMC5041_OFS42_MASK
TMC5041_OFS42_SHIFT
TMC5041_OFS43_MASK
TMC5041_OFS43_SHIFT
TMC5041_OFS44_MASK
TMC5041_OFS44_SHIFT
TMC5041_OFS45_MASK
TMC5041_OFS45_SHIFT
TMC5041_OFS46_MASK
TMC5041_OFS46_SHIFT
TMC5041_OFS47_MASK
TMC5041_OFS47_SHIFT
TMC5041_OFS48_MASK
TMC5041_OFS48_SHIFT
TMC5041_OFS49_MASK
TMC5041_OFS49_SHIFT
TMC5041_OFS50_MASK
TMC5041_OFS50_SHIFT
TMC5041_OFS51_MASK
TMC5041_OFS51_SHIFT
TMC5041_OFS52_MASK
TMC5041_OFS52_SHIFT
TMC5041_OFS53_MASK
TMC5041_OFS53_SHIFT
TMC5041_OFS54_MASK
TMC5041_OFS54_SHIFT
TMC5041_OFS55_MASK
TMC5041_OFS55_SHIFT
TMC5041_OFS56_MASK
TMC5041_OFS56_SHIFT
TMC5041_OFS57_MASK
TMC5041_OFS57_SHIFT
TMC5041_OFS58_MASK
TMC5041_OFS58_SHIFT
TMC5041_OFS59_MASK
TMC5041_OFS59_SHIFT
TMC5041_OFS60_MASK
TMC5041_OFS60_SHIFT
TMC5041_OFS61_MASK
TMC5041_OFS61_SHIFT
TMC5041_OFS62_MASK
TMC5041_OFS62_SHIFT
TMC5041_OFS63_MASK
TMC5041_OFS63_SHIFT
TMC5041_OFS64_MASK
TMC5041_OFS64_SHIFT
TMC5041_OFS65_MASK
TMC5041_OFS65_SHIFT
TMC5041_OFS66_MASK
TMC5041_OFS66_SHIFT
TMC5041_OFS67_MASK
TMC5041_OFS67_SHIFT
TMC5041_OFS68_MASK
TMC5041_OFS68_SHIFT
TMC5041_OFS69_MASK
TMC5041_OFS69_SHIFT
TMC5041_OFS70_MASK
TMC5041_OFS70_SHIFT
TMC5041_OFS71_MASK
TMC5041_OFS71_SHIFT
TMC5041_OFS72_MASK
TMC5041_OFS72_SHIFT
TMC5041_OFS73_MASK
TMC5041_OFS73_SHIFT
TMC5041_OFS74_MASK
TMC5041_OFS74_SHIFT
TMC5041_OFS75_MASK
TMC5041_OFS75_SHIFT
TMC5041_OFS76_MASK
TMC5041_OFS76_SHIFT
TMC5041_OFS77_MASK
TMC5041_OFS77_SHIFT
TMC5041_OFS78_MASK
TMC5041_OFS78_SHIFT
TMC5041_OFS79_MASK
TMC5041_OFS79_SHIFT
TMC5041_OFS80_MASK
TMC5041_OFS80_SHIFT
TMC5041_OFS81_MASK
TMC5041_OFS81_SHIFT
TMC5041_OFS82_MASK
TMC5041_OFS82_SHIFT
TMC5041_OFS83_MASK
TMC5041_OFS83_SHIFT
TMC5041_OFS84_MASK
TMC5041_OFS84_SHIFT
TMC5041_OFS85_MASK
TMC5041_OFS85_SHIFT
TMC5041_OFS86_MASK
TMC5041_OFS86_SHIFT
TMC5041_OFS87_MASK
TMC5041_OFS87_SHIFT
TMC5041_OFS88_MASK
TMC5041_OFS88_SHIFT
TMC5041_OFS89_MASK
TMC5041_OFS89_SHIFT
TMC5041_OFS90_MASK
TMC5041_OFS90_SHIFT
TMC5041_OFS91_MASK
TMC5041_OFS91_SHIFT
TMC5041_OFS92_MASK
TMC5041_OFS92_SHIFT
TMC5041_OFS93_MASK
TMC5041_OFS93_SHIFT
TMC5041_OFS94_MASK
TMC5041_OFS94_SHIFT
TMC5041_OFS95_MASK
TMC5041_OFS95_SHIFT
TMC5041_OFS96_MASK
TMC5041_OFS96_SHIFT
TMC5041_OFS97_MASK
TMC5041_OFS97_SHIFT
TMC5041_OFS98_MASK
TMC5041_OFS98_SHIFT
TMC5041_OFS99_MASK
TMC5041_OFS99_SHIFT
TMC5041_OFS100_MASK
TMC5041_OFS100_SHIFT
TMC5041_OFS101_MASK
TMC5041_OFS101_SHIFT
TMC5041_OFS102_MASK
TMC5041_OFS102_SHIFT
TMC5041_OFS103_MASK
TMC5041_OFS103_SHIFT
TMC5041_OFS104_MASK
TMC5041_OFS104_SHIFT
TMC5041_OFS105_MASK
TMC5041_OFS105_SHIFT
TMC5041_OFS106_MASK
TMC5041_OFS106_SHIFT
TMC5041_OFS107_MASK
TMC5041_OFS107_SHIFT
TMC5041_OFS108_MASK
TMC5041_OFS108_SHIFT
TMC5041_OFS109_MASK
TMC5041_OFS109_SHIFT
TMC5041_OFS110_MASK
TMC5041_OFS110_SHIFT
TMC5041_OFS111_MASK
TMC5041_OFS111_SHIFT
TMC5041_OFS112_MASK
TMC5041_OFS112_SHIFT
TMC5041_OFS113_MASK
TMC5041_OFS113_SHIFT
TMC5041_OFS114_MASK
TMC5041_OFS114_SHIFT
TMC5041_OFS115_MASK
TMC5041_OFS115_SHIFT
TMC5041_OFS116_MASK
TMC5041_OFS116_SHIFT
TMC5041_OFS117_MASK
TMC5041_OFS117_SHIFT
TMC5041_OFS118_MASK
TMC5041_OFS118_SHIFT
TMC5041_OFS119_MASK
TMC5041_OFS119_SHIFT
TMC5041_OFS120_MASK
TMC5041_OFS120_SHIFT
TMC5041_OFS121_MASK
TMC5041_OFS121_SHIFT
TMC5041_OFS122_MASK
TMC5041_OFS122_SHIFT
TMC5041_OFS123_MASK
TMC5041_OFS123_SHIFT
TMC5041_OFS124_MASK
TMC5041_OFS124_SHIFT
TMC5041_OFS125_MASK
TMC5041_OFS125_SHIFT
TMC5041_OFS126_MASK
TMC5041_OFS126_SHIFT
TMC5041_OFS127_MASK
TMC5041_OFS127_SHIFT
TMC5041_OFS128_MASK
TMC5041_OFS128_SHIFT
TMC5041_OFS129_MASK
TMC5041_OFS129_SHIFT
TMC5041_OFS130_MASK
TMC5041_OFS130_SHIFT
TMC5041_OFS131_MASK
TMC5041_OFS131_SHIFT
TMC5041_OFS132_MASK
TMC5041_OFS132_SHIFT
TMC5041_OFS133_MASK
TMC5041_OFS133_SHIFT
TMC5041_OFS134_MASK
TMC5041_OFS134_SHIFT
TMC5041_OFS135_MASK
TMC5041_OFS135_SHIFT
TMC5041_OFS136_MASK
TMC5041_OFS136_SHIFT
TMC5041_OFS137_MASK
TMC5041_OFS137_SHIFT
TMC5041_OFS138_MASK
TMC5041_OFS138_SHIFT
TMC5041_OFS139_MASK
TMC5041_OFS139_SHIFT
TMC5041_OFS140_MASK
TMC5041_OFS140_SHIFT
TMC5041_OFS141_MASK
TMC5041_OFS141_SHIFT
TMC5041_OFS142_MASK
TMC5041_OFS142_SHIFT
TMC5041_OFS143_MASK
TMC5041_OFS143_SHIFT
TMC5041_OFS144_MASK
TMC5041_OFS144_SHIFT
TMC5041_OFS145_MASK
TMC5041_OFS145_SHIFT
TMC5041_OFS146_MASK
TMC5041_OFS146_SHIFT
TMC5041_OFS147_MASK
TMC5041_OFS147_SHIFT
TMC5041_OFS148_MASK
TMC5041_OFS148_SHIFT
TMC5041_OFS149_MASK
TMC5041_OFS149_SHIFT
TMC5041_OFS150_MASK
TMC5041_OFS150_SHIFT
TMC5041_OFS151_MASK
TMC5041_OFS151_SHIFT
TMC5041_OFS152_MASK
TMC5041_OFS152_SHIFT
TMC5041_OFS153_MASK
TMC5041_OFS153_SHIFT
TMC5041_OFS154_MASK
TMC5041_OFS154_SHIFT
TMC5041_OFS155_MASK
TMC5041_OFS155_SHIFT
TMC5041_OFS156_MASK
TMC5041_OFS156_SHIFT
TMC5041_OFS157_MASK
TMC5041_OFS157_SHIFT
TMC5041_OFS158_MASK
TMC5041_OFS158_SHIFT
TMC5041_OFS159_MASK
TMC5041_OFS159_SHIFT
TMC5041_OFS160_MASK
TMC5041_OFS160_SHIFT
TMC5041_OFS161_MASK
TMC5041_OFS161_SHIFT
TMC5041_OFS162_MASK
TMC5041_OFS162_SHIFT
TMC5041_OFS163_MASK
TMC5041_OFS163_SHIFT
TMC5041_OFS164_MASK
TMC5041_OFS164_SHIFT
TMC5041_OFS165_MASK
TMC5041_OFS165_SHIFT
TMC5041_OFS166_MASK
TMC5041_OFS166_SHIFT
TMC5041_OFS167_MASK
TMC5041_OFS167_SHIFT
TMC5041_OFS168_MASK
TMC5041_OFS168_SHIFT
TMC5041_OFS169_MASK
TMC5041_OFS169_SHIFT
TMC5041_OFS170_MASK
TMC5041_OFS170_SHIFT
TMC5041_OFS171_MASK
TMC5041_OFS171_SHIFT
TMC5041_OFS172_MASK
TMC5041_OFS172_SHIFT
TMC5041_OFS173_MASK
TMC5041_OFS173_SHIFT
TMC5041_OFS174_MASK
TMC5041_OFS174_SHIFT
TMC5041_OFS175_MASK
TMC5041_OFS175_SHIFT
TMC5041_OFS176_MASK
TMC5041_OFS176_SHIFT
TMC5041_OFS177_MASK
TMC5041_OFS177_SHIFT
TMC5041_OFS178_MASK
TMC5041_OFS178_SHIFT
TMC5041_OFS179_MASK
TMC5041_OFS179_SHIFT
TMC5041_OFS180_MASK
TMC5041_OFS180_SHIFT
TMC5041_OFS181_MASK
TMC5041_OFS181_SHIFT
TMC5041_OFS182_MASK
TMC5041_OFS182_SHIFT
TMC5041_OFS183_MASK
TMC5041_OFS183_SHIFT
TMC5041_OFS184_MASK
TMC5041_OFS184_SHIFT
TMC5041_OFS185_MASK
TMC5041_OFS185_SHIFT
TMC5041_OFS186_MASK
TMC5041_OFS186_SHIFT
TMC5041_OFS187_MASK
TMC5041_OFS187_SHIFT
TMC5041_OFS188_MASK
TMC5041_OFS188_SHIFT
TMC5041_OFS189_MASK
TMC5041_OFS189_SHIFT
TMC5041_OFS190_MASK
TMC5041_OFS190_SHIFT
TMC5041_OFS191_MASK
TMC5041_OFS191_SHIFT
TMC5041_OFS192_MASK
TMC5041_OFS192_SHIFT
TMC5041_OFS193_MASK
TMC5041_OFS193_SHIFT
TMC5041_OFS194_MASK
TMC5041_OFS194_SHIFT
TMC5041_OFS195_MASK
TMC5041_OFS195_SHIFT
TMC5041_OFS196_MASK
TMC5041_OFS196_SHIFT
TMC5041_OFS197_MASK
TMC5041_OFS197_SHIFT
TMC5041_OFS198_MASK
TMC5041_OFS198_SHIFT
TMC5041_OFS199_MASK
TMC5041_OFS199_SHIFT
TMC5041_OFS200_MASK
TMC5041_OFS200_SHIFT
TMC5041_OFS201_MASK
TMC5041_OFS201_SHIFT
TMC5041_OFS202_MASK
TMC5041_OFS202_SHIFT
TMC5041_OFS203_MASK
TMC5041_OFS203_SHIFT
TMC5041_OFS204_MASK
TMC5041_OFS204_SHIFT
TMC5041_OFS205_MASK
TMC5041_OFS205_SHIFT
TMC5041_OFS206_MASK
TMC5041_OFS206_SHIFT
TMC5041_OFS207_MASK
TMC5041_OFS207_SHIFT
TMC5041_OFS208_MASK
TMC5041_OFS208_SHIFT
TMC5041_OFS209_MASK
TMC5041_OFS209_SHIFT
TMC5041_OFS210_MASK
TMC5041_OFS210_SHIFT
TMC5041_OFS211_MASK
TMC5041_OFS211_SHIFT
TMC5041_OFS212_MASK
TMC5041_OFS212_SHIFT
TMC5041_OFS213_MASK
TMC5041_OFS213_SHIFT
TMC5041_OFS214_MASK
TMC5041_OFS214_SHIFT
TMC5041_OFS215_MASK
TMC5041_OFS215_SHIFT
TMC5041_OFS216_MASK
TMC5041_OFS216_SHIFT
TMC5041_OFS217_MASK
TMC5041_OFS217_SHIFT
TMC5041_OFS218_MASK
TMC5041_OFS218_SHIFT
TMC5041_OFS219_MASK
TMC5041_OFS219_SHIFT
TMC5041_OFS220_MASK
TMC5041_OFS220_SHIFT
TMC5041_OFS221_MASK
TMC5041_OFS221_SHIFT
TMC5041_OFS222_MASK
TMC5041_OFS222_SHIFT
TMC5041_OFS223_MASK
TMC5041_OFS223_SHIFT
TMC5041_OFS224_MASK
TMC5041_OFS224_SHIFT
TMC5041_OFS225_MASK
TMC5041_OFS225_SHIFT
TMC5041_OFS226_MASK
TMC5041_OFS226_SHIFT
TMC5041_OFS227_MASK
TMC5041_OFS227_SHIFT
TMC5041_OFS228_MASK
TMC5041_OFS228_SHIFT
TMC5041_OFS229_MASK
TMC5041_OFS229_SHIFT
TMC5041_OFS230_MASK
TMC5041_OFS230_SHIFT
TMC5041_OFS231_MASK
TMC5041_OFS231_SHIFT
TMC5041_OFS232_MASK
TMC5041_OFS232_SHIFT
TMC5041_OFS233_MASK
TMC5041_OFS233_SHIFT
TMC5041_OFS234_MASK
TMC5041_OFS234_SHIFT
TMC5041_OFS235_MASK
TMC5041_OFS235_SHIFT
TMC5041_OFS236_MASK
TMC5041_OFS236_SHIFT
TMC5041_OFS237_MASK
TMC5041_OFS237_SHIFT
TMC5041_OFS238_MASK
TMC5041_OFS238_SHIFT
TMC5041_OFS239_MASK
TMC5041_OFS239_SHIFT
TMC5041_OFS240_MASK
TMC5041_OFS240_SHIFT
TMC5041_OFS241_MASK
TMC5041_OFS241_SHIFT
TMC5041_OFS242_MASK
TMC5041_OFS242_SHIFT
TMC5041_OFS243_MASK
TMC5041_OFS243_SHIFT
TMC5041_OFS244_MASK
TMC5041_OFS244_SHIFT
TMC5041_OFS245_MASK
TMC5041_OFS245_SHIFT
TMC5041_OFS246_MASK
TMC5041_OFS246_SHIFT
TMC5041_OFS247_MASK
TMC5041_OFS247_SHIFT
TMC5041_OFS248_MASK
TMC5041_OFS248_SHIFT
TMC5041_OFS249_MASK
TMC5041_OFS249_SHIFT
TMC5041_OFS250_MASK
TMC5041_OFS250_SHIFT
TMC5041_OFS251_MASK
TMC5041_OFS251_SHIFT
TMC5041_OFS252_MASK
TMC5041_OFS252_SHIFT
TMC5041_OFS253_MASK
TMC5041_OFS253_SHIFT
TMC5041_OFS254_MASK
TMC5041_OFS254_SHIFT
TMC5041_OFS255_MASK
TMC5041_OFS255_SHIFT
TMC5041_W0_MASK
TMC5041_W0_SHIFT
TMC5041_W1_MASK
TMC5041_W1_SHIFT
TMC5041_W2_MASK
TMC5041_W2_SHIFT
TMC5041_W3_MASK
TMC5041_W3_SHIFT
TMC5041_X1_MASK
TMC5041_X1_SHIFT
TMC5041_X2_MASK
TMC5041_X2_SHIFT
TMC5041_X3_MASK
TMC5041_X3_SHIFT
TMC5041_START_SIN_MASK
TMC5041_START_SIN_SHIFT
TMC5041_START_SIN90_MASK
TMC5041_START_SIN90_SHIFT
TMC5041_MSCNT_MASK
TMC5041_MSCNT_SHIFT
TMC5041_CUR_A_MASK
TMC5041_CUR_A_SHIFT
TMC5041_CUR_B_MASK
TMC5041_CUR_B_SHIFT
TMC5041_TOFF_MASK
TMC5041_TOFF_SHIFT
TMC5041_TFD_ALL_MASK
TMC5041_TFD_ALL_SHIFT
TMC5041_OFFSET_MASK
TMC5041_OFFSET_SHIFT
TMC5041_TFD_3_MASK
TMC5041_TFD_3_SHIFT
TMC5041_DISFDCC_MASK
TMC5041_DISFDCC_SHIFT
TMC5041_RNDTF_MASK
TMC5041_RNDTF_SHIFT
TMC5041_CHM_MASK
TMC5041_CHM_SHIFT
TMC5041_TBL_MASK
TMC5041_TBL_SHIFT
TMC5041_VSENSE_MASK
TMC5041_VSENSE_SHIFT
TMC5041_VHIGHFS_MASK
TMC5041_VHIGHFS_SHIFT
TMC5041_VHIGHCHM_MASK
TMC5041_VHIGHCHM_SHIFT
TMC5041_SYNC_MASK
TMC5041_SYNC_SHIFT
TMC5041_MRES_MASK
TMC5041_MRES_SHIFT
TMC5041_DISS2G_MASK
TMC5041_DISS2G_SHIFT
TMC5041_TOFF_MASK
TMC5041_TOFF_SHIFT
TMC5041_TFD_ALL_MASK
TMC5041_TFD_ALL_SHIFT
TMC5041_OFFSET_MASK
TMC5041_OFFSET_SHIFT
TMC5041_TFD_3_MASK
TMC5041_TFD_3_SHIFT
TMC5041_DISFDCC_MASK
TMC5041_DISFDCC_SHIFT
TMC5041_RNDTF_MASK
TMC5041_RNDTF_SHIFT
TMC5041_CHM_MASK
TMC5041_CHM_SHIFT
TMC5041_TBL_MASK
TMC5041_TBL_SHIFT
TMC5041_VSENSE_MASK
TMC5041_VSENSE_SHIFT
TMC5041_VHIGHFS_MASK
TMC5041_VHIGHFS_SHIFT
TMC5041_VHIGHCHM_MASK
TMC5041_VHIGHCHM_SHIFT
TMC5041_SYNC_MASK
TMC5041_SYNC_SHIFT
TMC5041_MRES_MASK
TMC5041_MRES_SHIFT
TMC5041_DISS2G_MASK
TMC5041_DISS2G_SHIFT
TMC5041_TOFF_MASK
TMC5041_TOFF_SHIFT
TMC5041_HSTRT_MASK
TMC5041_HSTRT_SHIFT
TMC5041_HEND_MASK
TMC5041_HEND_SHIFT
TMC5041_RNDTF_MASK
TMC5041_RNDTF_SHIFT
TMC5041_CHM_MASK
TMC5041_CHM_SHIFT
TMC5041_TBL_MASK
TMC5041_TBL_SHIFT
TMC5041_VSENSE_MASK
TMC5041_VSENSE_SHIFT
TMC5041_VHIGHFS_MASK
TMC5041_VHIGHFS_SHIFT
TMC5041_VHIGHCHM_MASK
TMC5041_VHIGHCHM_SHIFT
TMC5041_SYNC_MASK
TMC5041_SYNC_SHIFT
TMC5041_MRES_MASK
TMC5041_MRES_SHIFT
TMC5041_DISS2G_MASK
TMC5041_DISS2G_SHIFT
TMC5041_SEMIN_MASK
TMC5041_SEMIN_SHIFT
TMC5041_SEUP_MASK
TMC5041_SEUP_SHIFT
TMC5041_SEMAX_MASK
TMC5041_SEMAX_SHIFT
TMC5041_SEDN_MASK
TMC5041_SEDN_SHIFT
TMC5041_SEIMIN_MASK
TMC5041_SEIMIN_SHIFT
TMC5041_SGT_MASK
TMC5041_SGT_SHIFT
TMC5041_SFILT_MASK
TMC5041_SFILT_SHIFT
TMC5041_DC_TIME_MASK
TMC5041_DC_TIME_SHIFT
TMC5041_DC_SG_MASK
TMC5041_DC_SG_SHIFT
TMC5041_SG_RESULT_MASK
TMC5041_SG_RESULT_SHIFT
TMC5041_FSACTIVE_MASK
TMC5041_FSACTIVE_SHIFT
TMC5041_CS_ACTUAL_MASK
TMC5041_CS_ACTUAL_SHIFT
TMC5041_STALLGUARD_MASK
TMC5041_STALLGUARD_SHIFT
TMC5041_OT_MASK
TMC5041_OT_SHIFT
TMC5041_OTPW_MASK
TMC5041_OTPW_SHIFT
TMC5041_S2GA_MASK
TMC5041_S2GA_SHIFT
TMC5041_S2GB_MASK
TMC5041_S2GB_SHIFT
TMC5041_OLA_MASK
TMC5041_OLA_SHIFT
TMC5041_OLB_MASK
TMC5041_OLB_SHIFT
TMC5041_STST_MASK
TMC5041_STST_SHIFT
TMC5041_MSCNT_MASK
TMC5041_MSCNT_SHIFT
TMC5041_CUR_A_MASK
TMC5041_CUR_A_SHIFT
TMC5041_CUR_B_MASK
TMC5041_CUR_B_SHIFT
TMC5041_TOFF_MASK
TMC5041_TOFF_SHIFT
TMC5041_TFD_ALL_MASK
TMC5041_TFD_ALL_SHIFT
TMC5041_OFFSET_MASK
TMC5041_OFFSET_SHIFT
TMC5041_TFD_3_MASK
TMC5041_TFD_3_SHIFT
TMC5041_DISFDCC_MASK
TMC5041_DISFDCC_SHIFT
TMC5041_RNDTF_MASK
TMC5041_RNDTF_SHIFT
TMC5041_CHM_MASK
TMC5041_CHM_SHIFT
TMC5041_TBL_MASK
TMC5041_TBL_SHIFT
TMC5041_VSENSE_MASK
TMC5041_VSENSE_SHIFT
TMC5041_VHIGHFS_MASK
TMC5041_VHIGHFS_SHIFT
TMC5041_VHIGHCHM_MASK
TMC5041_VHIGHCHM_SHIFT
TMC5041_SYNC_MASK
TMC5041_SYNC_SHIFT
TMC5041_DISS2G_MASK
TMC5041_DISS2G_SHIFT
TMC5041_TOFF_MASK
TMC5041_TOFF_SHIFT
TMC5041_TFD_ALL_MASK
TMC5041_TFD_ALL_SHIFT
TMC5041_OFFSET_MASK
TMC5041_OFFSET_SHIFT
TMC5041_TFD_3_MASK
TMC5041_TFD_3_SHIFT
TMC5041_DISFDCC_MASK
TMC5041_DISFDCC_SHIFT
TMC5041_RNDTF_MASK
TMC5041_RNDTF_SHIFT
TMC5041_CHM_MASK
TMC5041_CHM_SHIFT
TMC5041_TBL_MASK
TMC5041_TBL_SHIFT
TMC5041_VSENSE_MASK
TMC5041_VSENSE_SHIFT
TMC5041_VHIGHFS_MASK
TMC5041_VHIGHFS_SHIFT
TMC5041_VHIGHCHM_MASK
TMC5041_VHIGHCHM_SHIFT
TMC5041_SYNC_MASK
TMC5041_SYNC_SHIFT
TMC5041_DISS2G_MASK
TMC5041_DISS2G_SHIFT
TMC5041_TOFF_MASK
TMC5041_TOFF_SHIFT
TMC5041_HSTRT_MASK
TMC5041_HSTRT_SHIFT
TMC5041_HEND_MASK
TMC5041_HEND_SHIFT
TMC5041_RNDTF_MASK
TMC5041_RNDTF_SHIFT
TMC5041_CHM_MASK
TMC5041_CHM_SHIFT
TMC5041_TBL_MASK
TMC5041_TBL_SHIFT
TMC5041_VSENSE_MASK
TMC5041_VSENSE_SHIFT
TMC5041_VHIGHFS_MASK
TMC5041_VHIGHFS_SHIFT
TMC5041_VHIGHCHM_MASK
TMC5041_VHIGHCHM_SHIFT
TMC5041_SYNC_MASK
TMC5041_SYNC_SHIFT
TMC5041_MRES_MASK
TMC5041_MRES_SHIFT
TMC5041_DISS2G_MASK
TMC5041_DISS2G_SHIFT
TMC5041_SEMIN_MASK
TMC5041_SEMIN_SHIFT
TMC5041_SEUP_MASK
TMC5041_SEUP_SHIFT
TMC5041_SEMAX_MASK
TMC5041_SEMAX_SHIFT
TMC5041_SEDN_MASK
TMC5041_SEDN_SHIFT
TMC5041_SEIMIN_MASK
TMC5041_SEIMIN_SHIFT
TMC5041_SGT_MASK
TMC5041_SGT_SHIFT
TMC5041_SFILT_MASK
TMC5041_SFILT_SHIFT
TMC5041_DC_TIME_MASK
TMC5041_DC_TIME_SHIFT
TMC5041_DC_SG_MASK
TMC5041_DC_SG_SHIFT
TMC5041_SG_RESULT_MASK
TMC5041_SG_RESULT_SHIFT
TMC5041_FSACTIVE_MASK
TMC5041_FSACTIVE_SHIFT
TMC5041_CS_ACTUAL_MASK
TMC5041_CS_ACTUAL_SHIFT
TMC5041_STALLGUARD_MASK
TMC5041_STALLGUARD_SHIFT
TMC5041_OT_MASK
TMC5041_OT_SHIFT
TMC5041_OTPW_MASK
TMC5041_OTPW_SHIFT
TMC5041_S2GA_MASK
TMC5041_S2GA_SHIFT
TMC5041_S2GB_MASK
TMC5041_S2GB_SHIFT
TMC5041_OLA_MASK
TMC5041_OLA_SHIFT
TMC5041_OLB_MASK
TMC5041_OLB_SHIFT
TMC5041_STST_MASK
TMC5041_STST_SHIFT
file TMC5041_Register.h

Defines

TMC5041_MOTOR_ADDR(m)
TMC5041_MOTOR_ADDR_DRV(m)
TMC5041_MOTOR_ADDR_PWM(m)
TMC5041_GCONF
TMC5041_GSTAT
TMC5041_IFCNT
TMC5041_SLAVECONF
TMC5041_INPUT
TMC5041_X_COMPARE
TMC5041_PWMCONF(motor)
TMC5041_PWM_STATUS(motor)
TMC5041_RAMPMODE(motor)
TMC5041_XACTUAL(motor)
TMC5041_VACTUAL(motor)
TMC5041_VSTART(motor)
TMC5041_A1(motor)
TMC5041_V1(motor)
TMC5041_AMAX(motor)
TMC5041_VMAX(motor)
TMC5041_DMAX(motor)
TMC5041_D1(motor)
TMC5041_VSTOP(motor)
TMC5041_TZEROWAIT(motor)
TMC5041_XTARGET(motor)
TMC5041_IHOLD_IRUN(motor)
TMC5041_VCOOLTHRS(motor)
TMC5041_VHIGH(motor)
TMC5041_VDCMIN(motor)
TMC5041_SWMODE(motor)
TMC5041_RAMPSTAT(motor)
TMC5041_XLATCH(motor)
TMC5041_ENC_CONST(motor)
TMC5041_MSLUT0(motor)
TMC5041_MSLUT1(motor)
TMC5041_MSLUT2(motor)
TMC5041_MSLUT3(motor)
TMC5041_MSLUT4(motor)
TMC5041_MSLUT5(motor)
TMC5041_MSLUT6(motor)
TMC5041_MSLUT7(motor)
TMC5041_MSLUTSEL(motor)
TMC5041_MSLUTSTART(motor)
TMC5041_MSCNT(motor)
TMC5041_MSCURACT(motor)
TMC5041_CHOPCONF(motor)
TMC5041_COOLCONF(motor)
TMC5041_DRVSTATUS(motor)
file TMC5062.c
#include “TMC5062.h”

Functions

uint8_t tmc5062_readWrite(uint8_t motor, uint8_t data, uint8_t lastTransfer)
static void measureVelocity(TMC5062TypeDef *tmc5062, uint32_t tick)
static void writeConfiguration(TMC5062TypeDef *tmc5062)
void tmc5062_writeInt(TMC5062TypeDef *tmc5062, uint8_t channel, uint8_t address, int32_t value)
int32_t tmc5062_readInt(TMC5062TypeDef *tmc5062, uint8_t channel, uint8_t address)
void tmc5062_init(TMC5062TypeDef *tmc5062, ConfigurationTypeDef *tmc5062_config, const int32_t *registerResetState, uint8_t motorIndex0, uint8_t motorIndex1, uint32_t chipFrequency)
void tmc5062_fillShadowRegisters(TMC5062TypeDef *tmc5062)
void tmc5062_setRegisterResetState(TMC5062TypeDef *tmc5062, const int32_t *resetState)
void tmc5062_setCallback(TMC5062TypeDef *tmc5062, tmc5062_callback callback)
void tmc5062_periodicJob(TMC5062TypeDef *tmc5062, uint32_t tick)
uint8_t tmc5062_reset(TMC5062TypeDef *tmc5062)
uint8_t tmc5062_restore(TMC5062TypeDef *tmc5062)
void tmc5062_rotate(TMC5062TypeDef *tmc5062, uint8_t motor, int32_t velocity)
void tmc5062_right(TMC5062TypeDef *tmc5062, uint8_t motor, int32_t velocity)
void tmc5062_left(TMC5062TypeDef *tmc5062, uint8_t motor, int32_t velocity)
void tmc5062_stop(TMC5062TypeDef *tmc5062, uint8_t motor)
void tmc5062_moveTo(TMC5062TypeDef *tmc5062, uint8_t motor, int32_t position, uint32_t velocityMax)
void tmc5062_moveBy(TMC5062TypeDef *tmc5062, uint8_t motor, uint32_t velocityMax, int32_t *ticks)
uint8_t calculateTOFF(uint32_t chopFreq, uint32_t clkFreq)
uint8_t dcStepActive(TMC5062TypeDef *tmc5062, uint8_t channel)
uint8_t setMicroStepTable(TMC5062TypeDef *tmc5062, uint8_t channel, TMC5062_MicroStepTable *table)
uint32_t setEncoderFactor(TMC5062TypeDef *tmc5062, uint8_t channel, uint32_t motorFullSteps, uint32_t microSteps, uint32_t encoderResolution)
file TMC5062.h
#include “tmc/helpers/API_Header.h”
#include “TMC5062_Register.h”
#include “TMC5062_Constants.h”
#include “TMC5062_Fields.h”

Defines

TMC5062_FIELD_READ(tmc5062_ptr, channel, address, mask, shift)
TMC5062_FIELD_WRITE(tmc5062_ptr, channel, address, mask, shift, value)
R30
R32
R3A
R50
R52
R5A
R6C
R7C

Typedefs

typedef void (*tmc5062_callback)(TMC5062TypeDef*, ConfigState)

Functions

void tmc5062_writeInt(TMC5062TypeDef *tmc5062, uint8_t channel, uint8_t address, int32_t value)
int32_t tmc5062_readInt(TMC5062TypeDef *tmc5062, uint8_t channel, uint8_t address)
void tmc5062_init(TMC5062TypeDef *tmc5062, ConfigurationTypeDef *tmc5062_config, const int32_t *registerResetState, uint8_t motorIndex0, uint8_t motorIndex1, uint32_t chipFrequency)
void tmc5062_fillShadowRegisters(TMC5062TypeDef *tmc5062)
void tmc5062_setRegisterResetState(TMC5062TypeDef *tmc5062, const int32_t *resetState)
void tmc5062_setCallback(TMC5062TypeDef *tmc5062, tmc5062_callback callback)
void tmc5062_periodicJob(TMC5062TypeDef *tmc5072, uint32_t tick)
uint8_t tmc5062_reset(TMC5062TypeDef *tmc5062)
uint8_t tmc5062_restore(TMC5062TypeDef *tmc5062)
void tmc5062_rotate(TMC5062TypeDef *tmc5062, uint8_t motor, int32_t velocity)
void tmc5062_right(TMC5062TypeDef *tmc5062, uint8_t motor, int32_t velocity)
void tmc5062_left(TMC5062TypeDef *tmc5062, uint8_t motor, int32_t velocity)
void tmc5062_stop(TMC5062TypeDef *tmc5062, uint8_t motor)
void tmc5062_moveTo(TMC5062TypeDef *tmc5062, uint8_t motor, int32_t position, uint32_t velocityMax)
void tmc5062_moveBy(TMC5062TypeDef *tmc5062, uint8_t motor, uint32_t velocityMax, int32_t *ticks)
uint8_t calculateTOFF(uint32_t chopFreq, uint32_t clkFreq)
uint8_t dcStepActive(TMC5062TypeDef *tmc5062, uint8_t channel)
uint8_t setMicroStepTable(TMC5062TypeDef *tmc5062, uint8_t channel, TMC5062_MicroStepTable *table)
uint32_t setEncoderFactor(TMC5062TypeDef *tmc5062, uint8_t channel, uint32_t motorFullSteps, uint32_t microSteps, uint32_t encoderResolution)

Variables

static const int32_t tmc5062_defaultRegisterResetState[TMC5062_REGISTER_COUNT] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R30, 0, R32, 0, 0, 0, 0, 0, 0, 0, R3A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R50, 0, R52, 0, 0, 0, 0, 0, 0, 0, R5A, 0, 0, 0, 0, 0, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, R6C, 0, 0, 0, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, R7C, 0, 0, 0}
static const uint8_t tmc5062_defaultRegisterAccess[TMC5062_REGISTER_COUNT] = {0x03, 0x01, 0x01, 0x02, 0x07, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x01, ____, ____, ____, ____, ____, ____, 0x02, 0x01, ____, ____, ____, ____, ____, ____, 0x03, 0x03, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x03, ____, ____, 0x02, 0x02, 0x02, 0x02, 0x03, 0x01, 0x01, ____, 0x03, 0x03, 0x02, 0x01, 0x01, ____, ____, ____, 0x03, 0x03, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x03, ____, ____, 0x02, 0x02, 0x02, 0x02, 0x03, 0x01, 0x01, ____, 0x03, 0x03, 0x02, 0x01, 0x01, ____, ____, ____, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x01, 0x01, 0x03, 0x02, 0x02, 0x01, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x01, 0x01, 0x03, 0x02, 0x02, 0x01}
static const TMCRegisterConstant tmc5062_RegisterConstants[] = {{0x60, 0xAAAAB554}, {0x61, 0x4A9554AA}, {0x62, 0x24492929}, {0x63, 0x10104222}, {0x64, 0xFBFFFFFF}, {0x65, 0xB5BB777D}, {0x66, 0x49295556}, {0x67, 0x00404222}, {0x68, 0xFFFF8056}, {0x69, 0x00F70000}, {0x70, 0xAAAAB554}, {0x71, 0x4A9554AA}, {0x72, 0x24492929}, {0x73, 0x10104222}, {0x74, 0xFBFFFFFF}, {0x75, 0xB5BB777D}, {0x76, 0x49295556}, {0x77, 0x00404222}, {0x78, 0xFFFF8056}, {0x79, 0x00F70000}}
file TMC5062_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC5062_REGISTER_COUNT
TMC5062_MOTORS
TMC5062_WRITE_BIT
TMC5062_ADDRESS_MASK
TMC5062_MAX_VELOCITY
TMC5062_MAX_ACCELERATION
TMC5062_MODE_POSITION
TMC5062_MODE_VELPOS
TMC5062_MODE_VELNEG
TMC5062_MODE_HOLD
file TMC5062_Fields.h

Defines

TMC5062_POSCMP_ENABLE_MASK
TMC5062_POSCMP_ENABLE_SHIFT
TMC5062_ENC1_REFSEL_MASK
TMC5062_ENC1_REFSEL_SHIFT
TMC5062_ENC2_ENABLE_MASK
TMC5062_ENC2_ENABLE_SHIFT
TMC5062_ENC2_REFSEL_MASK
TMC5062_ENC2_REFSEL_SHIFT
TMC5062_TEST_MODE_MASK
TMC5062_TEST_MODE_SHIFT
TMC5062_SHAFT1_MASK
TMC5062_SHAFT1_SHIFT
TMC5062_SHAFT2_MASK
TMC5062_SHAFT2_SHIFT
TMC5062_LOCK_GCONF_MASK
TMC5062_LOCK_GCONF_SHIFT
TMC5062_RESET_MASK
TMC5062_RESET_SHIFT
TMC5062_DRV_ERR1_MASK
TMC5062_DRV_ERR1_SHIFT
TMC5062_UV_CP_MASK
TMC5062_UV_CP_SHIFT
TMC5062_TEST_SEL_MASK
TMC5062_TEST_SEL_SHIFT
TMC5062_SENDDELAY_MASK
TMC5062_SENDDELAY_SHIFT
TMC5062_IO0_IN_MASK
TMC5062_IO0_IN_SHIFT
TMC5062_IO1_IN_MASK
TMC5062_IO1_IN_SHIFT
TMC5062_IO2_IN_MASK
TMC5062_IO2_IN_SHIFT
TMC5062_IO3_IN_MASK
TMC5062_IO3_IN_SHIFT
TMC5062_IOP_IN_MASK
TMC5062_IOP_IN_SHIFT
TMC5062_ION_IN_MASK
TMC5062_ION_IN_SHIFT
TMC5062_DRV_ENN_MASK
TMC5062_DRV_ENN_SHIFT
TMC5062_VERSION_MASK
TMC5062_VERSION_SHIFT
TMC5062_IO0_OUT_MASK
TMC5062_IO0_OUT_SHIFT
TMC5062_IO1_OUT_MASK
TMC5062_IO1_OUT_SHIFT
TMC5062_IO2_OUT_MASK
TMC5062_IO2_OUT_SHIFT
TMC5062_IO3_OUT_MASK
TMC5062_IO3_OUT_SHIFT
TMC5062_IODDR0_MASK
TMC5062_IODDR0_SHIFT
TMC5062_IODDR1_MASK
TMC5062_IODDR1_SHIFT
TMC5062_IODDR2_MASK
TMC5062_IODDR2_SHIFT
TMC5062_IODDR3_MASK
TMC5062_IODDR3_SHIFT
TMC5062_X_COMPARE_MASK
TMC5062_X_COMPARE_SHIFT
TMC5062_RAMPMODE_MASK
TMC5062_RAMPMODE_SHIFT
TMC5062_XACTUAL_MASK
TMC5062_XACTUAL_SHIFT
TMC5062_VACTUAL_MASK
TMC5062_VACTUAL_SHIFT
TMC5062_VSTART_MASK
TMC5062_VSTART_SHIFT
TMC5062_A1_MASK
TMC5062_A1_SHIFT
TMC5062_V1__MASK
TMC5062_V1__SHIFT
TMC5062_AMAX_MASK
TMC5062_AMAX_SHIFT
TMC5062_VMAX_MASK
TMC5062_VMAX_SHIFT
TMC5062_DMAX_MASK
TMC5062_DMAX_SHIFT
TMC5062_D1_MASK
TMC5062_D1_SHIFT
TMC5062_VSTOP_MASK
TMC5062_VSTOP_SHIFT
TMC5062_TZEROWAIT_MASK
TMC5062_TZEROWAIT_SHIFT
TMC5062_XTARGET_MASK
TMC5062_XTARGET_SHIFT
TMC5062_RAMPMODE_MASK
TMC5062_RAMPMODE_SHIFT
TMC5062_XACTUAL_MASK
TMC5062_XACTUAL_SHIFT
TMC5062_VACTUAL_MASK
TMC5062_VACTUAL_SHIFT
TMC5062_VSTART_MASK
TMC5062_VSTART_SHIFT
TMC5062_A1_MASK
TMC5062_A1_SHIFT
TMC5062_V1__MASK
TMC5062_V1__SHIFT
TMC5062_AMAX_MASK
TMC5062_AMAX_SHIFT
TMC5062_VMAX_MASK
TMC5062_VMAX_SHIFT
TMC5062_DMAX_MASK
TMC5062_DMAX_SHIFT
TMC5062_D1_MASK
TMC5062_D1_SHIFT
TMC5062_VSTOP_MASK
TMC5062_VSTOP_SHIFT
TMC5062_TZEROWAIT_MASK
TMC5062_TZEROWAIT_SHIFT
TMC5062_XTARGET_MASK
TMC5062_XTARGET_SHIFT
TMC5062_IHOLD_MASK
TMC5062_IHOLD_SHIFT
TMC5062_IRUN_MASK
TMC5062_IRUN_SHIFT
TMC5062_IHOLDDELAY_MASK
TMC5062_IHOLDDELAY_SHIFT
TMC5062_VCOOLTHRS_MASK
TMC5062_VCOOLTHRS_SHIFT
TMC5062_VHIGH_MASK
TMC5062_VHIGH_SHIFT
TMC5062_STOP_L_ENABLE_MASK
TMC5062_STOP_L_ENABLE_SHIFT
TMC5062_STOP_R_ENABLE_MASK
TMC5062_STOP_R_ENABLE_SHIFT
TMC5062_POL_STOP_L_MASK
TMC5062_POL_STOP_L_SHIFT
TMC5062_POL_STOP_R_MASK
TMC5062_POL_STOP_R_SHIFT
TMC5062_SWAP_LR_MASK
TMC5062_SWAP_LR_SHIFT
TMC5062_LATCH_L_ACTIVE_MASK
TMC5062_LATCH_L_ACTIVE_SHIFT
TMC5062_LATCH_L_INACTIVE_MASK
TMC5062_LATCH_L_INACTIVE_SHIFT
TMC5062_LATCH_R_ACTIVE_MASK
TMC5062_LATCH_R_ACTIVE_SHIFT
TMC5062_LATCH_R_INACTIVE_MASK
TMC5062_LATCH_R_INACTIVE_SHIFT
TMC5062_EN_LATCH_ENCODER_MASK
TMC5062_EN_LATCH_ENCODER_SHIFT
TMC5062_SG_STOP_MASK
TMC5062_SG_STOP_SHIFT
TMC5062_EN_SOFTSTOP_MASK
TMC5062_EN_SOFTSTOP_SHIFT
TMC5062_STATUS_STOP_L_MASK
TMC5062_STATUS_STOP_L_SHIFT
TMC5062_STATUS_STOP_R_MASK
TMC5062_STATUS_STOP_R_SHIFT
TMC5062_STATUS_LATCH_L_MASK
TMC5062_STATUS_LATCH_L_SHIFT
TMC5062_STATUS_LATCH_R_MASK
TMC5062_STATUS_LATCH_R_SHIFT
TMC5062_EVENT_STOP_L_MASK
TMC5062_EVENT_STOP_L_SHIFT
TMC5062_EVENT_STOP_R_MASK
TMC5062_EVENT_STOP_R_SHIFT
TMC5062_EVENT_STOP_SG_MASK
TMC5062_EVENT_STOP_SG_SHIFT
TMC5062_EVENT_POS_REACHED_MASK
TMC5062_EVENT_POS_REACHED_SHIFT
TMC5062_VELOCITY_REACHED_MASK
TMC5062_VELOCITY_REACHED_SHIFT
TMC5062_POSITION_REACHED_MASK
TMC5062_POSITION_REACHED_SHIFT
TMC5062_VZERO_MASK
TMC5062_VZERO_SHIFT
TMC5062_T_ZEROWAIT_ACTIVE_MASK
TMC5062_T_ZEROWAIT_ACTIVE_SHIFT
TMC5062_SECOND_MOVE_MASK
TMC5062_SECOND_MOVE_SHIFT
TMC5062_STATUS_SG_MASK
TMC5062_STATUS_SG_SHIFT
TMC5062_XLATCH_MASK
TMC5062_XLATCH_SHIFT
TMC5062_IHOLD_MASK
TMC5062_IHOLD_SHIFT
TMC5062_IRUN_MASK
TMC5062_IRUN_SHIFT
TMC5062_IHOLDDELAY_MASK
TMC5062_IHOLDDELAY_SHIFT
TMC5062_VCOOLTHRS_MASK
TMC5062_VCOOLTHRS_SHIFT
TMC5062_VHIGH_MASK
TMC5062_VHIGH_SHIFT
TMC5062_STOP_L_ENABLE_MASK
TMC5062_STOP_L_ENABLE_SHIFT
TMC5062_STOP_R_ENABLE_MASK
TMC5062_STOP_R_ENABLE_SHIFT
TMC5062_POL_STOP_L_MASK
TMC5062_POL_STOP_L_SHIFT
TMC5062_POL_STOP_R_MASK
TMC5062_POL_STOP_R_SHIFT
TMC5062_SWAP_LR_MASK
TMC5062_SWAP_LR_SHIFT
TMC5062_LATCH_L_ACTIVE_MASK
TMC5062_LATCH_L_ACTIVE_SHIFT
TMC5062_LATCH_L_INACTIVE_MASK
TMC5062_LATCH_L_INACTIVE_SHIFT
TMC5062_LATCH_R_ACTIVE_MASK
TMC5062_LATCH_R_ACTIVE_SHIFT
TMC5062_LATCH_R_INACTIVE_MASK
TMC5062_LATCH_R_INACTIVE_SHIFT
TMC5062_EN_LATCH_ENCODER_MASK
TMC5062_EN_LATCH_ENCODER_SHIFT
TMC5062_SG_STOP_MASK
TMC5062_SG_STOP_SHIFT
TMC5062_EN_SOFTSTOP_MASK
TMC5062_EN_SOFTSTOP_SHIFT
TMC5062_STATUS_STOP_L_MASK
TMC5062_STATUS_STOP_L_SHIFT
TMC5062_STATUS_STOP_R_MASK
TMC5062_STATUS_STOP_R_SHIFT
TMC5062_STATUS_LATCH_L_MASK
TMC5062_STATUS_LATCH_L_SHIFT
TMC5062_STATUS_LATCH_R_MASK
TMC5062_STATUS_LATCH_R_SHIFT
TMC5062_EVENT_STOP_L_MASK
TMC5062_EVENT_STOP_L_SHIFT
TMC5062_EVENT_STOP_R_MASK
TMC5062_EVENT_STOP_R_SHIFT
TMC5062_EVENT_STOP_SG_MASK
TMC5062_EVENT_STOP_SG_SHIFT
TMC5062_EVENT_POS_REACHED_MASK
TMC5062_EVENT_POS_REACHED_SHIFT
TMC5062_VELOCITY_REACHED_MASK
TMC5062_VELOCITY_REACHED_SHIFT
TMC5062_POSITION_REACHED_MASK
TMC5062_POSITION_REACHED_SHIFT
TMC5062_VZERO_MASK
TMC5062_VZERO_SHIFT
TMC5062_T_ZEROWAIT_ACTIVE_MASK
TMC5062_T_ZEROWAIT_ACTIVE_SHIFT
TMC5062_SECOND_MOVE_MASK
TMC5062_SECOND_MOVE_SHIFT
TMC5062_STATUS_SG_MASK
TMC5062_STATUS_SG_SHIFT
TMC5062_XLATCH_MASK
TMC5062_XLATCH_SHIFT
TMC5062_POL_A_MASK
TMC5062_POL_A_SHIFT
TMC5062_POL_B_MASK
TMC5062_POL_B_SHIFT
TMC5062_POL_N_MASK
TMC5062_POL_N_SHIFT
TMC5062_IGNORE_AB_MASK
TMC5062_IGNORE_AB_SHIFT
TMC5062_CLR_CONT_MASK
TMC5062_CLR_CONT_SHIFT
TMC5062_CLR_ONCE_MASK
TMC5062_CLR_ONCE_SHIFT
TMC5062_POS_EDGENEG_EDGE_MASK
TMC5062_POS_EDGENEG_EDGE_SHIFT
TMC5062_CLR_ENC_X_MASK
TMC5062_CLR_ENC_X_SHIFT
TMC5062_LATCH_X_ACT_MASK
TMC5062_LATCH_X_ACT_SHIFT
TMC5062_ENC_SEL_DECIMAL_MASK
TMC5062_ENC_SEL_DECIMAL_SHIFT
TMC5062_X_ENC_MASK
TMC5062_X_ENC_SHIFT
TMC5062_INTEGER_MASK
TMC5062_INTEGER_SHIFT
TMC5062_FRACTIONAL_MASK
TMC5062_FRACTIONAL_SHIFT
TMC5062_ENC_STATUS_MASK
TMC5062_ENC_STATUS_SHIFT
TMC5062_ENC_LATCH_MASK
TMC5062_ENC_LATCH_SHIFT
TMC5062_POL_A_MASK
TMC5062_POL_A_SHIFT
TMC5062_POL_B_MASK
TMC5062_POL_B_SHIFT
TMC5062_POL_N_MASK
TMC5062_POL_N_SHIFT
TMC5062_IGNORE_AB_MASK
TMC5062_IGNORE_AB_SHIFT
TMC5062_CLR_CONT_MASK
TMC5062_CLR_CONT_SHIFT
TMC5062_CLR_ONCE_MASK
TMC5062_CLR_ONCE_SHIFT
TMC5062_POS_EDGENEG_EDGE_MASK
TMC5062_POS_EDGENEG_EDGE_SHIFT
TMC5062_CLR_ENC_X_MASK
TMC5062_CLR_ENC_X_SHIFT
TMC5062_LATCH_X_ACT_MASK
TMC5062_LATCH_X_ACT_SHIFT
TMC5062_ENC_SEL_DECIMAL_MASK
TMC5062_ENC_SEL_DECIMAL_SHIFT
TMC5062_X_ENC_MASK
TMC5062_X_ENC_SHIFT
TMC5062_INTEGER_MASK
TMC5062_INTEGER_SHIFT
TMC5062_FRACTIONAL_MASK
TMC5062_FRACTIONAL_SHIFT
TMC5062_ENC_STATUS_MASK
TMC5062_ENC_STATUS_SHIFT
TMC5062_ENC_LATCH_MASK
TMC5062_ENC_LATCH_SHIFT
TMC5062_OFS0_MASK
TMC5062_OFS0_SHIFT
TMC5062_OFS1_MASK
TMC5062_OFS1_SHIFT
TMC5062_OFS2_MASK
TMC5062_OFS2_SHIFT
TMC5062_OFS3_MASK
TMC5062_OFS3_SHIFT
TMC5062_OFS4_MASK
TMC5062_OFS4_SHIFT
TMC5062_OFS5_MASK
TMC5062_OFS5_SHIFT
TMC5062_OFS6_MASK
TMC5062_OFS6_SHIFT
TMC5062_OFS7_MASK
TMC5062_OFS7_SHIFT
TMC5062_OFS8_MASK
TMC5062_OFS8_SHIFT
TMC5062_OFS9_MASK
TMC5062_OFS9_SHIFT
TMC5062_OFS10_MASK
TMC5062_OFS10_SHIFT
TMC5062_OFS11_MASK
TMC5062_OFS11_SHIFT
TMC5062_OFS12_MASK
TMC5062_OFS12_SHIFT
TMC5062_OFS13_MASK
TMC5062_OFS13_SHIFT
TMC5062_OFS14_MASK
TMC5062_OFS14_SHIFT
TMC5062_OFS15_MASK
TMC5062_OFS15_SHIFT
TMC5062_OFS16_MASK
TMC5062_OFS16_SHIFT
TMC5062_OFS17_MASK
TMC5062_OFS17_SHIFT
TMC5062_OFS18_MASK
TMC5062_OFS18_SHIFT
TMC5062_OFS19_MASK
TMC5062_OFS19_SHIFT
TMC5062_OFS20_MASK
TMC5062_OFS20_SHIFT
TMC5062_OFS21_MASK
TMC5062_OFS21_SHIFT
TMC5062_OFS22_MASK
TMC5062_OFS22_SHIFT
TMC5062_OFS23_MASK
TMC5062_OFS23_SHIFT
TMC5062_OFS24_MASK
TMC5062_OFS24_SHIFT
TMC5062_OFS25_MASK
TMC5062_OFS25_SHIFT
TMC5062_OFS26_MASK
TMC5062_OFS26_SHIFT
TMC5062_OFS27_MASK
TMC5062_OFS27_SHIFT
TMC5062_OFS28_MASK
TMC5062_OFS28_SHIFT
TMC5062_OFS29_MASK
TMC5062_OFS29_SHIFT
TMC5062_OFS30_MASK
TMC5062_OFS30_SHIFT
TMC5062_OFS31_MASK
TMC5062_OFS31_SHIFT
TMC5062_OFS32_MASK
TMC5062_OFS32_SHIFT
TMC5062_OFS33_MASK
TMC5062_OFS33_SHIFT
TMC5062_OFS34_MASK
TMC5062_OFS34_SHIFT
TMC5062_OFS35_MASK
TMC5062_OFS35_SHIFT
TMC5062_OFS36_MASK
TMC5062_OFS36_SHIFT
TMC5062_OFS37_MASK
TMC5062_OFS37_SHIFT
TMC5062_OFS38_MASK
TMC5062_OFS38_SHIFT
TMC5062_OFS39_MASK
TMC5062_OFS39_SHIFT
TMC5062_OFS40_MASK
TMC5062_OFS40_SHIFT
TMC5062_OFS41_MASK
TMC5062_OFS41_SHIFT
TMC5062_OFS42_MASK
TMC5062_OFS42_SHIFT
TMC5062_OFS43_MASK
TMC5062_OFS43_SHIFT
TMC5062_OFS44_MASK
TMC5062_OFS44_SHIFT
TMC5062_OFS45_MASK
TMC5062_OFS45_SHIFT
TMC5062_OFS46_MASK
TMC5062_OFS46_SHIFT
TMC5062_OFS47_MASK
TMC5062_OFS47_SHIFT
TMC5062_OFS48_MASK
TMC5062_OFS48_SHIFT
TMC5062_OFS49_MASK
TMC5062_OFS49_SHIFT
TMC5062_OFS50_MASK
TMC5062_OFS50_SHIFT
TMC5062_OFS51_MASK
TMC5062_OFS51_SHIFT
TMC5062_OFS52_MASK
TMC5062_OFS52_SHIFT
TMC5062_OFS53_MASK
TMC5062_OFS53_SHIFT
TMC5062_OFS54_MASK
TMC5062_OFS54_SHIFT
TMC5062_OFS55_MASK
TMC5062_OFS55_SHIFT
TMC5062_OFS56_MASK
TMC5062_OFS56_SHIFT
TMC5062_OFS57_MASK
TMC5062_OFS57_SHIFT
TMC5062_OFS58_MASK
TMC5062_OFS58_SHIFT
TMC5062_OFS59_MASK
TMC5062_OFS59_SHIFT
TMC5062_OFS60_MASK
TMC5062_OFS60_SHIFT
TMC5062_OFS61_MASK
TMC5062_OFS61_SHIFT
TMC5062_OFS62_MASK
TMC5062_OFS62_SHIFT
TMC5062_OFS63_MASK
TMC5062_OFS63_SHIFT
TMC5062_OFS64_MASK
TMC5062_OFS64_SHIFT
TMC5062_OFS65_MASK
TMC5062_OFS65_SHIFT
TMC5062_OFS66_MASK
TMC5062_OFS66_SHIFT
TMC5062_OFS67_MASK
TMC5062_OFS67_SHIFT
TMC5062_OFS68_MASK
TMC5062_OFS68_SHIFT
TMC5062_OFS69_MASK
TMC5062_OFS69_SHIFT
TMC5062_OFS70_MASK
TMC5062_OFS70_SHIFT
TMC5062_OFS71_MASK
TMC5062_OFS71_SHIFT
TMC5062_OFS72_MASK
TMC5062_OFS72_SHIFT
TMC5062_OFS73_MASK
TMC5062_OFS73_SHIFT
TMC5062_OFS74_MASK
TMC5062_OFS74_SHIFT
TMC5062_OFS75_MASK
TMC5062_OFS75_SHIFT
TMC5062_OFS76_MASK
TMC5062_OFS76_SHIFT
TMC5062_OFS77_MASK
TMC5062_OFS77_SHIFT
TMC5062_OFS78_MASK
TMC5062_OFS78_SHIFT
TMC5062_OFS79_MASK
TMC5062_OFS79_SHIFT
TMC5062_OFS80_MASK
TMC5062_OFS80_SHIFT
TMC5062_OFS81_MASK
TMC5062_OFS81_SHIFT
TMC5062_OFS82_MASK
TMC5062_OFS82_SHIFT
TMC5062_OFS83_MASK
TMC5062_OFS83_SHIFT
TMC5062_OFS84_MASK
TMC5062_OFS84_SHIFT
TMC5062_OFS85_MASK
TMC5062_OFS85_SHIFT
TMC5062_OFS86_MASK
TMC5062_OFS86_SHIFT
TMC5062_OFS87_MASK
TMC5062_OFS87_SHIFT
TMC5062_OFS88_MASK
TMC5062_OFS88_SHIFT
TMC5062_OFS89_MASK
TMC5062_OFS89_SHIFT
TMC5062_OFS90_MASK
TMC5062_OFS90_SHIFT
TMC5062_OFS91_MASK
TMC5062_OFS91_SHIFT
TMC5062_OFS92_MASK
TMC5062_OFS92_SHIFT
TMC5062_OFS93_MASK
TMC5062_OFS93_SHIFT
TMC5062_OFS94_MASK
TMC5062_OFS94_SHIFT
TMC5062_OFS95_MASK
TMC5062_OFS95_SHIFT
TMC5062_OFS96_MASK
TMC5062_OFS96_SHIFT
TMC5062_OFS97_MASK
TMC5062_OFS97_SHIFT
TMC5062_OFS98_MASK
TMC5062_OFS98_SHIFT
TMC5062_OFS99_MASK
TMC5062_OFS99_SHIFT
TMC5062_OFS100_MASK
TMC5062_OFS100_SHIFT
TMC5062_OFS101_MASK
TMC5062_OFS101_SHIFT
TMC5062_OFS102_MASK
TMC5062_OFS102_SHIFT
TMC5062_OFS103_MASK
TMC5062_OFS103_SHIFT
TMC5062_OFS104_MASK
TMC5062_OFS104_SHIFT
TMC5062_OFS105_MASK
TMC5062_OFS105_SHIFT
TMC5062_OFS106_MASK
TMC5062_OFS106_SHIFT
TMC5062_OFS107_MASK
TMC5062_OFS107_SHIFT
TMC5062_OFS108_MASK
TMC5062_OFS108_SHIFT
TMC5062_OFS109_MASK
TMC5062_OFS109_SHIFT
TMC5062_OFS110_MASK
TMC5062_OFS110_SHIFT
TMC5062_OFS111_MASK
TMC5062_OFS111_SHIFT
TMC5062_OFS112_MASK
TMC5062_OFS112_SHIFT
TMC5062_OFS113_MASK
TMC5062_OFS113_SHIFT
TMC5062_OFS114_MASK
TMC5062_OFS114_SHIFT
TMC5062_OFS115_MASK
TMC5062_OFS115_SHIFT
TMC5062_OFS116_MASK
TMC5062_OFS116_SHIFT
TMC5062_OFS117_MASK
TMC5062_OFS117_SHIFT
TMC5062_OFS118_MASK
TMC5062_OFS118_SHIFT
TMC5062_OFS119_MASK
TMC5062_OFS119_SHIFT
TMC5062_OFS120_MASK
TMC5062_OFS120_SHIFT
TMC5062_OFS121_MASK
TMC5062_OFS121_SHIFT
TMC5062_OFS122_MASK
TMC5062_OFS122_SHIFT
TMC5062_OFS123_MASK
TMC5062_OFS123_SHIFT
TMC5062_OFS124_MASK
TMC5062_OFS124_SHIFT
TMC5062_OFS125_MASK
TMC5062_OFS125_SHIFT
TMC5062_OFS126_MASK
TMC5062_OFS126_SHIFT
TMC5062_OFS127_MASK
TMC5062_OFS127_SHIFT
TMC5062_OFS128_MASK
TMC5062_OFS128_SHIFT
TMC5062_OFS129_MASK
TMC5062_OFS129_SHIFT
TMC5062_OFS130_MASK
TMC5062_OFS130_SHIFT
TMC5062_OFS131_MASK
TMC5062_OFS131_SHIFT
TMC5062_OFS132_MASK
TMC5062_OFS132_SHIFT
TMC5062_OFS133_MASK
TMC5062_OFS133_SHIFT
TMC5062_OFS134_MASK
TMC5062_OFS134_SHIFT
TMC5062_OFS135_MASK
TMC5062_OFS135_SHIFT
TMC5062_OFS136_MASK
TMC5062_OFS136_SHIFT
TMC5062_OFS137_MASK
TMC5062_OFS137_SHIFT
TMC5062_OFS138_MASK
TMC5062_OFS138_SHIFT
TMC5062_OFS139_MASK
TMC5062_OFS139_SHIFT
TMC5062_OFS140_MASK
TMC5062_OFS140_SHIFT
TMC5062_OFS141_MASK
TMC5062_OFS141_SHIFT
TMC5062_OFS142_MASK
TMC5062_OFS142_SHIFT
TMC5062_OFS143_MASK
TMC5062_OFS143_SHIFT
TMC5062_OFS144_MASK
TMC5062_OFS144_SHIFT
TMC5062_OFS145_MASK
TMC5062_OFS145_SHIFT
TMC5062_OFS146_MASK
TMC5062_OFS146_SHIFT
TMC5062_OFS147_MASK
TMC5062_OFS147_SHIFT
TMC5062_OFS148_MASK
TMC5062_OFS148_SHIFT
TMC5062_OFS149_MASK
TMC5062_OFS149_SHIFT
TMC5062_OFS150_MASK
TMC5062_OFS150_SHIFT
TMC5062_OFS151_MASK
TMC5062_OFS151_SHIFT
TMC5062_OFS152_MASK
TMC5062_OFS152_SHIFT
TMC5062_OFS153_MASK
TMC5062_OFS153_SHIFT
TMC5062_OFS154_MASK
TMC5062_OFS154_SHIFT
TMC5062_OFS155_MASK
TMC5062_OFS155_SHIFT
TMC5062_OFS156_MASK
TMC5062_OFS156_SHIFT
TMC5062_OFS157_MASK
TMC5062_OFS157_SHIFT
TMC5062_OFS158_MASK
TMC5062_OFS158_SHIFT
TMC5062_OFS159_MASK
TMC5062_OFS159_SHIFT
TMC5062_OFS160_MASK
TMC5062_OFS160_SHIFT
TMC5062_OFS161_MASK
TMC5062_OFS161_SHIFT
TMC5062_OFS162_MASK
TMC5062_OFS162_SHIFT
TMC5062_OFS163_MASK
TMC5062_OFS163_SHIFT
TMC5062_OFS164_MASK
TMC5062_OFS164_SHIFT
TMC5062_OFS165_MASK
TMC5062_OFS165_SHIFT
TMC5062_OFS166_MASK
TMC5062_OFS166_SHIFT
TMC5062_OFS167_MASK
TMC5062_OFS167_SHIFT
TMC5062_OFS168_MASK
TMC5062_OFS168_SHIFT
TMC5062_OFS169_MASK
TMC5062_OFS169_SHIFT
TMC5062_OFS170_MASK
TMC5062_OFS170_SHIFT
TMC5062_OFS171_MASK
TMC5062_OFS171_SHIFT
TMC5062_OFS172_MASK
TMC5062_OFS172_SHIFT
TMC5062_OFS173_MASK
TMC5062_OFS173_SHIFT
TMC5062_OFS174_MASK
TMC5062_OFS174_SHIFT
TMC5062_OFS175_MASK
TMC5062_OFS175_SHIFT
TMC5062_OFS176_MASK
TMC5062_OFS176_SHIFT
TMC5062_OFS177_MASK
TMC5062_OFS177_SHIFT
TMC5062_OFS178_MASK
TMC5062_OFS178_SHIFT
TMC5062_OFS179_MASK
TMC5062_OFS179_SHIFT
TMC5062_OFS180_MASK
TMC5062_OFS180_SHIFT
TMC5062_OFS181_MASK
TMC5062_OFS181_SHIFT
TMC5062_OFS182_MASK
TMC5062_OFS182_SHIFT
TMC5062_OFS183_MASK
TMC5062_OFS183_SHIFT
TMC5062_OFS184_MASK
TMC5062_OFS184_SHIFT
TMC5062_OFS185_MASK
TMC5062_OFS185_SHIFT
TMC5062_OFS186_MASK
TMC5062_OFS186_SHIFT
TMC5062_OFS187_MASK
TMC5062_OFS187_SHIFT
TMC5062_OFS188_MASK
TMC5062_OFS188_SHIFT
TMC5062_OFS189_MASK
TMC5062_OFS189_SHIFT
TMC5062_OFS190_MASK
TMC5062_OFS190_SHIFT
TMC5062_OFS191_MASK
TMC5062_OFS191_SHIFT
TMC5062_OFS192_MASK
TMC5062_OFS192_SHIFT
TMC5062_OFS193_MASK
TMC5062_OFS193_SHIFT
TMC5062_OFS194_MASK
TMC5062_OFS194_SHIFT
TMC5062_OFS195_MASK
TMC5062_OFS195_SHIFT
TMC5062_OFS196_MASK
TMC5062_OFS196_SHIFT
TMC5062_OFS197_MASK
TMC5062_OFS197_SHIFT
TMC5062_OFS198_MASK
TMC5062_OFS198_SHIFT
TMC5062_OFS199_MASK
TMC5062_OFS199_SHIFT
TMC5062_OFS200_MASK
TMC5062_OFS200_SHIFT
TMC5062_OFS201_MASK
TMC5062_OFS201_SHIFT
TMC5062_OFS202_MASK
TMC5062_OFS202_SHIFT
TMC5062_OFS203_MASK
TMC5062_OFS203_SHIFT
TMC5062_OFS204_MASK
TMC5062_OFS204_SHIFT
TMC5062_OFS205_MASK
TMC5062_OFS205_SHIFT
TMC5062_OFS206_MASK
TMC5062_OFS206_SHIFT
TMC5062_OFS207_MASK
TMC5062_OFS207_SHIFT
TMC5062_OFS208_MASK
TMC5062_OFS208_SHIFT
TMC5062_OFS209_MASK
TMC5062_OFS209_SHIFT
TMC5062_OFS210_MASK
TMC5062_OFS210_SHIFT
TMC5062_OFS211_MASK
TMC5062_OFS211_SHIFT
TMC5062_OFS212_MASK
TMC5062_OFS212_SHIFT
TMC5062_OFS213_MASK
TMC5062_OFS213_SHIFT
TMC5062_OFS214_MASK
TMC5062_OFS214_SHIFT
TMC5062_OFS215_MASK
TMC5062_OFS215_SHIFT
TMC5062_OFS216_MASK
TMC5062_OFS216_SHIFT
TMC5062_OFS217_MASK
TMC5062_OFS217_SHIFT
TMC5062_OFS218_MASK
TMC5062_OFS218_SHIFT
TMC5062_OFS219_MASK
TMC5062_OFS219_SHIFT
TMC5062_OFS220_MASK
TMC5062_OFS220_SHIFT
TMC5062_OFS221_MASK
TMC5062_OFS221_SHIFT
TMC5062_OFS222_MASK
TMC5062_OFS222_SHIFT
TMC5062_OFS223_MASK
TMC5062_OFS223_SHIFT
TMC5062_OFS224_MASK
TMC5062_OFS224_SHIFT
TMC5062_OFS225_MASK
TMC5062_OFS225_SHIFT
TMC5062_OFS226_MASK
TMC5062_OFS226_SHIFT
TMC5062_OFS227_MASK
TMC5062_OFS227_SHIFT
TMC5062_OFS228_MASK
TMC5062_OFS228_SHIFT
TMC5062_OFS229_MASK
TMC5062_OFS229_SHIFT
TMC5062_OFS230_MASK
TMC5062_OFS230_SHIFT
TMC5062_OFS231_MASK
TMC5062_OFS231_SHIFT
TMC5062_OFS232_MASK
TMC5062_OFS232_SHIFT
TMC5062_OFS233_MASK
TMC5062_OFS233_SHIFT
TMC5062_OFS234_MASK
TMC5062_OFS234_SHIFT
TMC5062_OFS235_MASK
TMC5062_OFS235_SHIFT
TMC5062_OFS236_MASK
TMC5062_OFS236_SHIFT
TMC5062_OFS237_MASK
TMC5062_OFS237_SHIFT
TMC5062_OFS238_MASK
TMC5062_OFS238_SHIFT
TMC5062_OFS239_MASK
TMC5062_OFS239_SHIFT
TMC5062_OFS240_MASK
TMC5062_OFS240_SHIFT
TMC5062_OFS241_MASK
TMC5062_OFS241_SHIFT
TMC5062_OFS242_MASK
TMC5062_OFS242_SHIFT
TMC5062_OFS243_MASK
TMC5062_OFS243_SHIFT
TMC5062_OFS244_MASK
TMC5062_OFS244_SHIFT
TMC5062_OFS245_MASK
TMC5062_OFS245_SHIFT
TMC5062_OFS246_MASK
TMC5062_OFS246_SHIFT
TMC5062_OFS247_MASK
TMC5062_OFS247_SHIFT
TMC5062_OFS248_MASK
TMC5062_OFS248_SHIFT
TMC5062_OFS249_MASK
TMC5062_OFS249_SHIFT
TMC5062_OFS250_MASK
TMC5062_OFS250_SHIFT
TMC5062_OFS251_MASK
TMC5062_OFS251_SHIFT
TMC5062_OFS252_MASK
TMC5062_OFS252_SHIFT
TMC5062_OFS253_MASK
TMC5062_OFS253_SHIFT
TMC5062_OFS254_MASK
TMC5062_OFS254_SHIFT
TMC5062_OFS255_MASK
TMC5062_OFS255_SHIFT
TMC5062_W0_MASK
TMC5062_W0_SHIFT
TMC5062_W1_MASK
TMC5062_W1_SHIFT
TMC5062_W2_MASK
TMC5062_W2_SHIFT
TMC5062_W3_MASK
TMC5062_W3_SHIFT
TMC5062_X1_MASK
TMC5062_X1_SHIFT
TMC5062_X2_MASK
TMC5062_X2_SHIFT
TMC5062_X3_MASK
TMC5062_X3_SHIFT
TMC5062_START_SIN_MASK
TMC5062_START_SIN_SHIFT
TMC5062_START_SIN90_MASK
TMC5062_START_SIN90_SHIFT
TMC5062_MSCNT_MASK
TMC5062_MSCNT_SHIFT
TMC5062_CUR_A_MASK
TMC5062_CUR_A_SHIFT
TMC5062_CUR_B_MASK
TMC5062_CUR_B_SHIFT
TMC5062_TOFF_MASK
TMC5062_TOFF_SHIFT
TMC5062_TFD_ALL_MASK
TMC5062_TFD_ALL_SHIFT
TMC5062_OFFSET_MASK
TMC5062_OFFSET_SHIFT
TMC5062_TFD_3_MASK
TMC5062_TFD_3_SHIFT
TMC5062_DISFDCC_MASK
TMC5062_DISFDCC_SHIFT
TMC5062_RNDTF_MASK
TMC5062_RNDTF_SHIFT
TMC5062_CHM_MASK
TMC5062_CHM_SHIFT
TMC5062_TBL_MASK
TMC5062_TBL_SHIFT
TMC5062_VSENSE_MASK
TMC5062_VSENSE_SHIFT
TMC5062_VHIGHFS_MASK
TMC5062_VHIGHFS_SHIFT
TMC5062_VHIGHCHM_MASK
TMC5062_VHIGHCHM_SHIFT
TMC5062_SYNC_MASK
TMC5062_SYNC_SHIFT
TMC5062_MRES_MASK
TMC5062_MRES_SHIFT
TMC5062_DISS2G_MASK
TMC5062_DISS2G_SHIFT
TMC5062_TOFF_MASK
TMC5062_TOFF_SHIFT
TMC5062_TFD_ALL_MASK
TMC5062_TFD_ALL_SHIFT
TMC5062_OFFSET_MASK
TMC5062_OFFSET_SHIFT
TMC5062_TFD_3_MASK
TMC5062_TFD_3_SHIFT
TMC5062_DISFDCC_MASK
TMC5062_DISFDCC_SHIFT
TMC5062_RNDTF_MASK
TMC5062_RNDTF_SHIFT
TMC5062_CHM_MASK
TMC5062_CHM_SHIFT
TMC5062_TBL_MASK
TMC5062_TBL_SHIFT
TMC5062_VSENSE_MASK
TMC5062_VSENSE_SHIFT
TMC5062_VHIGHFS_MASK
TMC5062_VHIGHFS_SHIFT
TMC5062_VHIGHCHM_MASK
TMC5062_VHIGHCHM_SHIFT
TMC5062_SYNC_MASK
TMC5062_SYNC_SHIFT
TMC5062_MRES_MASK
TMC5062_MRES_SHIFT
TMC5062_DISS2G_MASK
TMC5062_DISS2G_SHIFT
TMC5062_TOFF_MASK
TMC5062_TOFF_SHIFT
TMC5062_HSTRT_MASK
TMC5062_HSTRT_SHIFT
TMC5062_HEND_MASK
TMC5062_HEND_SHIFT
TMC5062_RNDTF_MASK
TMC5062_RNDTF_SHIFT
TMC5062_CHM_MASK
TMC5062_CHM_SHIFT
TMC5062_TBL_MASK
TMC5062_TBL_SHIFT
TMC5062_VSENSE_MASK
TMC5062_VSENSE_SHIFT
TMC5062_VHIGHFS_MASK
TMC5062_VHIGHFS_SHIFT
TMC5062_VHIGHCHM_MASK
TMC5062_VHIGHCHM_SHIFT
TMC5062_SYNC_MASK
TMC5062_SYNC_SHIFT
TMC5062_MRES_MASK
TMC5062_MRES_SHIFT
TMC5062_DISS2G_MASK
TMC5062_DISS2G_SHIFT
TMC5062_SEMIN_MASK
TMC5062_SEMIN_SHIFT
TMC5062_SEUP_MASK
TMC5062_SEUP_SHIFT
TMC5062_SEMAX_MASK
TMC5062_SEMAX_SHIFT
TMC5062_SEDN_MASK
TMC5062_SEDN_SHIFT
TMC5062_SEIMIN_MASK
TMC5062_SEIMIN_SHIFT
TMC5062_SGT_MASK
TMC5062_SGT_SHIFT
TMC5062_SFILT_MASK
TMC5062_SFILT_SHIFT
TMC5062_SG_RESULT_MASK
TMC5062_SG_RESULT_SHIFT
TMC5062_FSACTIVE_MASK
TMC5062_FSACTIVE_SHIFT
TMC5062_CS_ACTUAL_MASK
TMC5062_CS_ACTUAL_SHIFT
TMC5062_STALLGUARD_MASK
TMC5062_STALLGUARD_SHIFT
TMC5062_OT_MASK
TMC5062_OT_SHIFT
TMC5062_OTPW_MASK
TMC5062_OTPW_SHIFT
TMC5062_S2GA_MASK
TMC5062_S2GA_SHIFT
TMC5062_S2GB_MASK
TMC5062_S2GB_SHIFT
TMC5062_OLA_MASK
TMC5062_OLA_SHIFT
TMC5062_OLB_MASK
TMC5062_OLB_SHIFT
TMC5062_STST_MASK
TMC5062_STST_SHIFT
TMC5062_OFS0_MASK
TMC5062_OFS0_SHIFT
TMC5062_OFS1_MASK
TMC5062_OFS1_SHIFT
TMC5062_OFS2_MASK
TMC5062_OFS2_SHIFT
TMC5062_OFS3_MASK
TMC5062_OFS3_SHIFT
TMC5062_OFS4_MASK
TMC5062_OFS4_SHIFT
TMC5062_OFS5_MASK
TMC5062_OFS5_SHIFT
TMC5062_OFS6_MASK
TMC5062_OFS6_SHIFT
TMC5062_OFS7_MASK
TMC5062_OFS7_SHIFT
TMC5062_OFS8_MASK
TMC5062_OFS8_SHIFT
TMC5062_OFS9_MASK
TMC5062_OFS9_SHIFT
TMC5062_OFS10_MASK
TMC5062_OFS10_SHIFT
TMC5062_OFS11_MASK
TMC5062_OFS11_SHIFT
TMC5062_OFS12_MASK
TMC5062_OFS12_SHIFT
TMC5062_OFS13_MASK
TMC5062_OFS13_SHIFT
TMC5062_OFS14_MASK
TMC5062_OFS14_SHIFT
TMC5062_OFS15_MASK
TMC5062_OFS15_SHIFT
TMC5062_OFS16_MASK
TMC5062_OFS16_SHIFT
TMC5062_OFS17_MASK
TMC5062_OFS17_SHIFT
TMC5062_OFS18_MASK
TMC5062_OFS18_SHIFT
TMC5062_OFS19_MASK
TMC5062_OFS19_SHIFT
TMC5062_OFS20_MASK
TMC5062_OFS20_SHIFT
TMC5062_OFS21_MASK
TMC5062_OFS21_SHIFT
TMC5062_OFS22_MASK
TMC5062_OFS22_SHIFT
TMC5062_OFS23_MASK
TMC5062_OFS23_SHIFT
TMC5062_OFS24_MASK
TMC5062_OFS24_SHIFT
TMC5062_OFS25_MASK
TMC5062_OFS25_SHIFT
TMC5062_OFS26_MASK
TMC5062_OFS26_SHIFT
TMC5062_OFS27_MASK
TMC5062_OFS27_SHIFT
TMC5062_OFS28_MASK
TMC5062_OFS28_SHIFT
TMC5062_OFS29_MASK
TMC5062_OFS29_SHIFT
TMC5062_OFS30_MASK
TMC5062_OFS30_SHIFT
TMC5062_OFS31_MASK
TMC5062_OFS31_SHIFT
TMC5062_OFS32_MASK
TMC5062_OFS32_SHIFT
TMC5062_OFS33_MASK
TMC5062_OFS33_SHIFT
TMC5062_OFS34_MASK
TMC5062_OFS34_SHIFT
TMC5062_OFS35_MASK
TMC5062_OFS35_SHIFT
TMC5062_OFS36_MASK
TMC5062_OFS36_SHIFT
TMC5062_OFS37_MASK
TMC5062_OFS37_SHIFT
TMC5062_OFS38_MASK
TMC5062_OFS38_SHIFT
TMC5062_OFS39_MASK
TMC5062_OFS39_SHIFT
TMC5062_OFS40_MASK
TMC5062_OFS40_SHIFT
TMC5062_OFS41_MASK
TMC5062_OFS41_SHIFT
TMC5062_OFS42_MASK
TMC5062_OFS42_SHIFT
TMC5062_OFS43_MASK
TMC5062_OFS43_SHIFT
TMC5062_OFS44_MASK
TMC5062_OFS44_SHIFT
TMC5062_OFS45_MASK
TMC5062_OFS45_SHIFT
TMC5062_OFS46_MASK
TMC5062_OFS46_SHIFT
TMC5062_OFS47_MASK
TMC5062_OFS47_SHIFT
TMC5062_OFS48_MASK
TMC5062_OFS48_SHIFT
TMC5062_OFS49_MASK
TMC5062_OFS49_SHIFT
TMC5062_OFS50_MASK
TMC5062_OFS50_SHIFT
TMC5062_OFS51_MASK
TMC5062_OFS51_SHIFT
TMC5062_OFS52_MASK
TMC5062_OFS52_SHIFT
TMC5062_OFS53_MASK
TMC5062_OFS53_SHIFT
TMC5062_OFS54_MASK
TMC5062_OFS54_SHIFT
TMC5062_OFS55_MASK
TMC5062_OFS55_SHIFT
TMC5062_OFS56_MASK
TMC5062_OFS56_SHIFT
TMC5062_OFS57_MASK
TMC5062_OFS57_SHIFT
TMC5062_OFS58_MASK
TMC5062_OFS58_SHIFT
TMC5062_OFS59_MASK
TMC5062_OFS59_SHIFT
TMC5062_OFS60_MASK
TMC5062_OFS60_SHIFT
TMC5062_OFS61_MASK
TMC5062_OFS61_SHIFT
TMC5062_OFS62_MASK
TMC5062_OFS62_SHIFT
TMC5062_OFS63_MASK
TMC5062_OFS63_SHIFT
TMC5062_OFS64_MASK
TMC5062_OFS64_SHIFT
TMC5062_OFS65_MASK
TMC5062_OFS65_SHIFT
TMC5062_OFS66_MASK
TMC5062_OFS66_SHIFT
TMC5062_OFS67_MASK
TMC5062_OFS67_SHIFT
TMC5062_OFS68_MASK
TMC5062_OFS68_SHIFT
TMC5062_OFS69_MASK
TMC5062_OFS69_SHIFT
TMC5062_OFS70_MASK
TMC5062_OFS70_SHIFT
TMC5062_OFS71_MASK
TMC5062_OFS71_SHIFT
TMC5062_OFS72_MASK
TMC5062_OFS72_SHIFT
TMC5062_OFS73_MASK
TMC5062_OFS73_SHIFT
TMC5062_OFS74_MASK
TMC5062_OFS74_SHIFT
TMC5062_OFS75_MASK
TMC5062_OFS75_SHIFT
TMC5062_OFS76_MASK
TMC5062_OFS76_SHIFT
TMC5062_OFS77_MASK
TMC5062_OFS77_SHIFT
TMC5062_OFS78_MASK
TMC5062_OFS78_SHIFT
TMC5062_OFS79_MASK
TMC5062_OFS79_SHIFT
TMC5062_OFS80_MASK
TMC5062_OFS80_SHIFT
TMC5062_OFS81_MASK
TMC5062_OFS81_SHIFT
TMC5062_OFS82_MASK
TMC5062_OFS82_SHIFT
TMC5062_OFS83_MASK
TMC5062_OFS83_SHIFT
TMC5062_OFS84_MASK
TMC5062_OFS84_SHIFT
TMC5062_OFS85_MASK
TMC5062_OFS85_SHIFT
TMC5062_OFS86_MASK
TMC5062_OFS86_SHIFT
TMC5062_OFS87_MASK
TMC5062_OFS87_SHIFT
TMC5062_OFS88_MASK
TMC5062_OFS88_SHIFT
TMC5062_OFS89_MASK
TMC5062_OFS89_SHIFT
TMC5062_OFS90_MASK
TMC5062_OFS90_SHIFT
TMC5062_OFS91_MASK
TMC5062_OFS91_SHIFT
TMC5062_OFS92_MASK
TMC5062_OFS92_SHIFT
TMC5062_OFS93_MASK
TMC5062_OFS93_SHIFT
TMC5062_OFS94_MASK
TMC5062_OFS94_SHIFT
TMC5062_OFS95_MASK
TMC5062_OFS95_SHIFT
TMC5062_OFS96_MASK
TMC5062_OFS96_SHIFT
TMC5062_OFS97_MASK
TMC5062_OFS97_SHIFT
TMC5062_OFS98_MASK
TMC5062_OFS98_SHIFT
TMC5062_OFS99_MASK
TMC5062_OFS99_SHIFT
TMC5062_OFS100_MASK
TMC5062_OFS100_SHIFT
TMC5062_OFS101_MASK
TMC5062_OFS101_SHIFT
TMC5062_OFS102_MASK
TMC5062_OFS102_SHIFT
TMC5062_OFS103_MASK
TMC5062_OFS103_SHIFT
TMC5062_OFS104_MASK
TMC5062_OFS104_SHIFT
TMC5062_OFS105_MASK
TMC5062_OFS105_SHIFT
TMC5062_OFS106_MASK
TMC5062_OFS106_SHIFT
TMC5062_OFS107_MASK
TMC5062_OFS107_SHIFT
TMC5062_OFS108_MASK
TMC5062_OFS108_SHIFT
TMC5062_OFS109_MASK
TMC5062_OFS109_SHIFT
TMC5062_OFS110_MASK
TMC5062_OFS110_SHIFT
TMC5062_OFS111_MASK
TMC5062_OFS111_SHIFT
TMC5062_OFS112_MASK
TMC5062_OFS112_SHIFT
TMC5062_OFS113_MASK
TMC5062_OFS113_SHIFT
TMC5062_OFS114_MASK
TMC5062_OFS114_SHIFT
TMC5062_OFS115_MASK
TMC5062_OFS115_SHIFT
TMC5062_OFS116_MASK
TMC5062_OFS116_SHIFT
TMC5062_OFS117_MASK
TMC5062_OFS117_SHIFT
TMC5062_OFS118_MASK
TMC5062_OFS118_SHIFT
TMC5062_OFS119_MASK
TMC5062_OFS119_SHIFT
TMC5062_OFS120_MASK
TMC5062_OFS120_SHIFT
TMC5062_OFS121_MASK
TMC5062_OFS121_SHIFT
TMC5062_OFS122_MASK
TMC5062_OFS122_SHIFT
TMC5062_OFS123_MASK
TMC5062_OFS123_SHIFT
TMC5062_OFS124_MASK
TMC5062_OFS124_SHIFT
TMC5062_OFS125_MASK
TMC5062_OFS125_SHIFT
TMC5062_OFS126_MASK
TMC5062_OFS126_SHIFT
TMC5062_OFS127_MASK
TMC5062_OFS127_SHIFT
TMC5062_OFS128_MASK
TMC5062_OFS128_SHIFT
TMC5062_OFS129_MASK
TMC5062_OFS129_SHIFT
TMC5062_OFS130_MASK
TMC5062_OFS130_SHIFT
TMC5062_OFS131_MASK
TMC5062_OFS131_SHIFT
TMC5062_OFS132_MASK
TMC5062_OFS132_SHIFT
TMC5062_OFS133_MASK
TMC5062_OFS133_SHIFT
TMC5062_OFS134_MASK
TMC5062_OFS134_SHIFT
TMC5062_OFS135_MASK
TMC5062_OFS135_SHIFT
TMC5062_OFS136_MASK
TMC5062_OFS136_SHIFT
TMC5062_OFS137_MASK
TMC5062_OFS137_SHIFT
TMC5062_OFS138_MASK
TMC5062_OFS138_SHIFT
TMC5062_OFS139_MASK
TMC5062_OFS139_SHIFT
TMC5062_OFS140_MASK
TMC5062_OFS140_SHIFT
TMC5062_OFS141_MASK
TMC5062_OFS141_SHIFT
TMC5062_OFS142_MASK
TMC5062_OFS142_SHIFT
TMC5062_OFS143_MASK
TMC5062_OFS143_SHIFT
TMC5062_OFS144_MASK
TMC5062_OFS144_SHIFT
TMC5062_OFS145_MASK
TMC5062_OFS145_SHIFT
TMC5062_OFS146_MASK
TMC5062_OFS146_SHIFT
TMC5062_OFS147_MASK
TMC5062_OFS147_SHIFT
TMC5062_OFS148_MASK
TMC5062_OFS148_SHIFT
TMC5062_OFS149_MASK
TMC5062_OFS149_SHIFT
TMC5062_OFS150_MASK
TMC5062_OFS150_SHIFT
TMC5062_OFS151_MASK
TMC5062_OFS151_SHIFT
TMC5062_OFS152_MASK
TMC5062_OFS152_SHIFT
TMC5062_OFS153_MASK
TMC5062_OFS153_SHIFT
TMC5062_OFS154_MASK
TMC5062_OFS154_SHIFT
TMC5062_OFS155_MASK
TMC5062_OFS155_SHIFT
TMC5062_OFS156_MASK
TMC5062_OFS156_SHIFT
TMC5062_OFS157_MASK
TMC5062_OFS157_SHIFT
TMC5062_OFS158_MASK
TMC5062_OFS158_SHIFT
TMC5062_OFS159_MASK
TMC5062_OFS159_SHIFT
TMC5062_OFS160_MASK
TMC5062_OFS160_SHIFT
TMC5062_OFS161_MASK
TMC5062_OFS161_SHIFT
TMC5062_OFS162_MASK
TMC5062_OFS162_SHIFT
TMC5062_OFS163_MASK
TMC5062_OFS163_SHIFT
TMC5062_OFS164_MASK
TMC5062_OFS164_SHIFT
TMC5062_OFS165_MASK
TMC5062_OFS165_SHIFT
TMC5062_OFS166_MASK
TMC5062_OFS166_SHIFT
TMC5062_OFS167_MASK
TMC5062_OFS167_SHIFT
TMC5062_OFS168_MASK
TMC5062_OFS168_SHIFT
TMC5062_OFS169_MASK
TMC5062_OFS169_SHIFT
TMC5062_OFS170_MASK
TMC5062_OFS170_SHIFT
TMC5062_OFS171_MASK
TMC5062_OFS171_SHIFT
TMC5062_OFS172_MASK
TMC5062_OFS172_SHIFT
TMC5062_OFS173_MASK
TMC5062_OFS173_SHIFT
TMC5062_OFS174_MASK
TMC5062_OFS174_SHIFT
TMC5062_OFS175_MASK
TMC5062_OFS175_SHIFT
TMC5062_OFS176_MASK
TMC5062_OFS176_SHIFT
TMC5062_OFS177_MASK
TMC5062_OFS177_SHIFT
TMC5062_OFS178_MASK
TMC5062_OFS178_SHIFT
TMC5062_OFS179_MASK
TMC5062_OFS179_SHIFT
TMC5062_OFS180_MASK
TMC5062_OFS180_SHIFT
TMC5062_OFS181_MASK
TMC5062_OFS181_SHIFT
TMC5062_OFS182_MASK
TMC5062_OFS182_SHIFT
TMC5062_OFS183_MASK
TMC5062_OFS183_SHIFT
TMC5062_OFS184_MASK
TMC5062_OFS184_SHIFT
TMC5062_OFS185_MASK
TMC5062_OFS185_SHIFT
TMC5062_OFS186_MASK
TMC5062_OFS186_SHIFT
TMC5062_OFS187_MASK
TMC5062_OFS187_SHIFT
TMC5062_OFS188_MASK
TMC5062_OFS188_SHIFT
TMC5062_OFS189_MASK
TMC5062_OFS189_SHIFT
TMC5062_OFS190_MASK
TMC5062_OFS190_SHIFT
TMC5062_OFS191_MASK
TMC5062_OFS191_SHIFT
TMC5062_OFS192_MASK
TMC5062_OFS192_SHIFT
TMC5062_OFS193_MASK
TMC5062_OFS193_SHIFT
TMC5062_OFS194_MASK
TMC5062_OFS194_SHIFT
TMC5062_OFS195_MASK
TMC5062_OFS195_SHIFT
TMC5062_OFS196_MASK
TMC5062_OFS196_SHIFT
TMC5062_OFS197_MASK
TMC5062_OFS197_SHIFT
TMC5062_OFS198_MASK
TMC5062_OFS198_SHIFT
TMC5062_OFS199_MASK
TMC5062_OFS199_SHIFT
TMC5062_OFS200_MASK
TMC5062_OFS200_SHIFT
TMC5062_OFS201_MASK
TMC5062_OFS201_SHIFT
TMC5062_OFS202_MASK
TMC5062_OFS202_SHIFT
TMC5062_OFS203_MASK
TMC5062_OFS203_SHIFT
TMC5062_OFS204_MASK
TMC5062_OFS204_SHIFT
TMC5062_OFS205_MASK
TMC5062_OFS205_SHIFT
TMC5062_OFS206_MASK
TMC5062_OFS206_SHIFT
TMC5062_OFS207_MASK
TMC5062_OFS207_SHIFT
TMC5062_OFS208_MASK
TMC5062_OFS208_SHIFT
TMC5062_OFS209_MASK
TMC5062_OFS209_SHIFT
TMC5062_OFS210_MASK
TMC5062_OFS210_SHIFT
TMC5062_OFS211_MASK
TMC5062_OFS211_SHIFT
TMC5062_OFS212_MASK
TMC5062_OFS212_SHIFT
TMC5062_OFS213_MASK
TMC5062_OFS213_SHIFT
TMC5062_OFS214_MASK
TMC5062_OFS214_SHIFT
TMC5062_OFS215_MASK
TMC5062_OFS215_SHIFT
TMC5062_OFS216_MASK
TMC5062_OFS216_SHIFT
TMC5062_OFS217_MASK
TMC5062_OFS217_SHIFT
TMC5062_OFS218_MASK
TMC5062_OFS218_SHIFT
TMC5062_OFS219_MASK
TMC5062_OFS219_SHIFT
TMC5062_OFS220_MASK
TMC5062_OFS220_SHIFT
TMC5062_OFS221_MASK
TMC5062_OFS221_SHIFT
TMC5062_OFS222_MASK
TMC5062_OFS222_SHIFT
TMC5062_OFS223_MASK
TMC5062_OFS223_SHIFT
TMC5062_OFS224_MASK
TMC5062_OFS224_SHIFT
TMC5062_OFS225_MASK
TMC5062_OFS225_SHIFT
TMC5062_OFS226_MASK
TMC5062_OFS226_SHIFT
TMC5062_OFS227_MASK
TMC5062_OFS227_SHIFT
TMC5062_OFS228_MASK
TMC5062_OFS228_SHIFT
TMC5062_OFS229_MASK
TMC5062_OFS229_SHIFT
TMC5062_OFS230_MASK
TMC5062_OFS230_SHIFT
TMC5062_OFS231_MASK
TMC5062_OFS231_SHIFT
TMC5062_OFS232_MASK
TMC5062_OFS232_SHIFT
TMC5062_OFS233_MASK
TMC5062_OFS233_SHIFT
TMC5062_OFS234_MASK
TMC5062_OFS234_SHIFT
TMC5062_OFS235_MASK
TMC5062_OFS235_SHIFT
TMC5062_OFS236_MASK
TMC5062_OFS236_SHIFT
TMC5062_OFS237_MASK
TMC5062_OFS237_SHIFT
TMC5062_OFS238_MASK
TMC5062_OFS238_SHIFT
TMC5062_OFS239_MASK
TMC5062_OFS239_SHIFT
TMC5062_OFS240_MASK
TMC5062_OFS240_SHIFT
TMC5062_OFS241_MASK
TMC5062_OFS241_SHIFT
TMC5062_OFS242_MASK
TMC5062_OFS242_SHIFT
TMC5062_OFS243_MASK
TMC5062_OFS243_SHIFT
TMC5062_OFS244_MASK
TMC5062_OFS244_SHIFT
TMC5062_OFS245_MASK
TMC5062_OFS245_SHIFT
TMC5062_OFS246_MASK
TMC5062_OFS246_SHIFT
TMC5062_OFS247_MASK
TMC5062_OFS247_SHIFT
TMC5062_OFS248_MASK
TMC5062_OFS248_SHIFT
TMC5062_OFS249_MASK
TMC5062_OFS249_SHIFT
TMC5062_OFS250_MASK
TMC5062_OFS250_SHIFT
TMC5062_OFS251_MASK
TMC5062_OFS251_SHIFT
TMC5062_OFS252_MASK
TMC5062_OFS252_SHIFT
TMC5062_OFS253_MASK
TMC5062_OFS253_SHIFT
TMC5062_OFS254_MASK
TMC5062_OFS254_SHIFT
TMC5062_OFS255_MASK
TMC5062_OFS255_SHIFT
TMC5062_W0_MASK
TMC5062_W0_SHIFT
TMC5062_W1_MASK
TMC5062_W1_SHIFT
TMC5062_W2_MASK
TMC5062_W2_SHIFT
TMC5062_W3_MASK
TMC5062_W3_SHIFT
TMC5062_X1_MASK
TMC5062_X1_SHIFT
TMC5062_X2_MASK
TMC5062_X2_SHIFT
TMC5062_X3_MASK
TMC5062_X3_SHIFT
TMC5062_START_SIN_MASK
TMC5062_START_SIN_SHIFT
TMC5062_START_SIN90_MASK
TMC5062_START_SIN90_SHIFT
TMC5062_MSCNT_MASK
TMC5062_MSCNT_SHIFT
TMC5062_CUR_A_MASK
TMC5062_CUR_A_SHIFT
TMC5062_CUR_B_MASK
TMC5062_CUR_B_SHIFT
TMC5062_TOFF_MASK
TMC5062_TOFF_SHIFT
TMC5062_TFD_ALL_MASK
TMC5062_TFD_ALL_SHIFT
TMC5062_OFFSET_MASK
TMC5062_OFFSET_SHIFT
TMC5062_TFD_3_MASK
TMC5062_TFD_3_SHIFT
TMC5062_DISFDCC_MASK
TMC5062_DISFDCC_SHIFT
TMC5062_RNDTF_MASK
TMC5062_RNDTF_SHIFT
TMC5062_CHM_MASK
TMC5062_CHM_SHIFT
TMC5062_TBL_MASK
TMC5062_TBL_SHIFT
TMC5062_VSENSE_MASK
TMC5062_VSENSE_SHIFT
TMC5062_VHIGHFS_MASK
TMC5062_VHIGHFS_SHIFT
TMC5062_VHIGHCHM_MASK
TMC5062_VHIGHCHM_SHIFT
TMC5062_MRES_MASK
TMC5062_MRES_SHIFT
TMC5062_SYNC_MASK
TMC5062_SYNC_SHIFT
TMC5062_MRES_MASK
TMC5062_MRES_SHIFT
TMC5062_DISS2G_MASK
TMC5062_DISS2G_SHIFT
TMC5062_TOFF_MASK
TMC5062_TOFF_SHIFT
TMC5062_TFD_ALL_MASK
TMC5062_TFD_ALL_SHIFT
TMC5062_OFFSET_MASK
TMC5062_OFFSET_SHIFT
TMC5062_TFD_3_MASK
TMC5062_TFD_3_SHIFT
TMC5062_DISFDCC_MASK
TMC5062_DISFDCC_SHIFT
TMC5062_RNDTF_MASK
TMC5062_RNDTF_SHIFT
TMC5062_CHM_MASK
TMC5062_CHM_SHIFT
TMC5062_TBL_MASK
TMC5062_TBL_SHIFT
TMC5062_VSENSE_MASK
TMC5062_VSENSE_SHIFT
TMC5062_VHIGHFS_MASK
TMC5062_VHIGHFS_SHIFT
TMC5062_VHIGHCHM_MASK
TMC5062_VHIGHCHM_SHIFT
TMC5062_SYNC_MASK
TMC5062_SYNC_SHIFT
TMC5062_MRES_MASK
TMC5062_MRES_SHIFT
TMC5062_DISS2G_MASK
TMC5062_DISS2G_SHIFT
TMC5062_TOFF_MASK
TMC5062_TOFF_SHIFT
TMC5062_HSTRT_MASK
TMC5062_HSTRT_SHIFT
TMC5062_HEND_MASK
TMC5062_HEND_SHIFT
TMC5062_RNDTF_MASK
TMC5062_RNDTF_SHIFT
TMC5062_CHM_MASK
TMC5062_CHM_SHIFT
TMC5062_TBL_MASK
TMC5062_TBL_SHIFT
TMC5062_VSENSE_MASK
TMC5062_VSENSE_SHIFT
TMC5062_VHIGHFS_MASK
TMC5062_VHIGHFS_SHIFT
TMC5062_VHIGHCHM_MASK
TMC5062_VHIGHCHM_SHIFT
TMC5062_SYNC_MASK
TMC5062_SYNC_SHIFT
TMC5062_MRES_MASK
TMC5062_MRES_SHIFT
TMC5062_DISS2G_MASK
TMC5062_DISS2G_SHIFT
TMC5062_SEMIN_MASK
TMC5062_SEMIN_SHIFT
TMC5062_SEUP_MASK
TMC5062_SEUP_SHIFT
TMC5062_SEMAX_MASK
TMC5062_SEMAX_SHIFT
TMC5062_SEDN_MASK
TMC5062_SEDN_SHIFT
TMC5062_SEIMIN_MASK
TMC5062_SEIMIN_SHIFT
TMC5062_SGT_MASK
TMC5062_SGT_SHIFT
TMC5062_SFILT_MASK
TMC5062_SFILT_SHIFT
TMC5062_SG_RESULT_MASK
TMC5062_SG_RESULT_SHIFT
TMC5062_FSACTIVE_MASK
TMC5062_FSACTIVE_SHIFT
TMC5062_CS_ACTUAL_MASK
TMC5062_CS_ACTUAL_SHIFT
TMC5062_STALLGUARD_MASK
TMC5062_STALLGUARD_SHIFT
TMC5062_OT_MASK
TMC5062_OT_SHIFT
TMC5062_OTPW_MASK
TMC5062_OTPW_SHIFT
TMC5062_S2GA_MASK
TMC5062_S2GA_SHIFT
TMC5062_S2GB_MASK
TMC5062_S2GB_SHIFT
TMC5062_OLA_MASK
TMC5062_OLA_SHIFT
TMC5062_OLB_MASK
TMC5062_OLB_SHIFT
TMC5062_STST_MASK
TMC5062_STST_SHIFT
file TMC5062_Register.h

Defines

MOTOR_ADDR(m)
MOTOR_ADDR_DRV(m)
MOTOR_ADDR_PWM(m)
TMC5062_GCONF
TMC5062_GSTAT
TMC5062_IFCNT
TMC5062_SLAVECONF
TMC5062_INP_OUT
TMC5062_X_COMPARE
TMC5062_PWMCONF(motor)
TMC5062_PWM_STATUS(motor)
TMC5062_RAMPMODE(motor)
TMC5062_XACTUAL(motor)
TMC5062_VACTUAL(motor)
TMC5062_VSTART(motor)
TMC5062_A1(motor)
TMC5062_V1(motor)
TMC5062_AMAX(motor)
TMC5062_VMAX(motor)
TMC5062_DMAX(motor)
TMC5062_D1(motor)
TMC5062_VSTOP(motor)
TMC5062_TZEROWAIT(motor)
TMC5062_XTARGET(motor)
TMC5062_IHOLD_IRUN(motor)
TMC5062_VCOOLTHRS(motor)
TMC5062_VHIGH(motor)
TMC5062_VDCMIN(motor)
TMC5062_SWMODE(motor)
TMC5062_RAMPSTAT(motor)
TMC5062_XLATCH(motor)
TMC5062_ENCMODE(motor)
TMC5062_XENC(motor)
TMC5062_ENC_CONST(motor)
TMC5062_ENC_STATUS(motor)
TMC5062_ENC_LATCH(motor)
TMC5062_MSLUT0(motor)
TMC5062_MSLUT1(motor)
TMC5062_MSLUT2(motor)
TMC5062_MSLUT3(motor)
TMC5062_MSLUT4(motor)
TMC5062_MSLUT5(motor)
TMC5062_MSLUT6(motor)
TMC5062_MSLUT7(motor)
TMC5062_MSLUTSEL(motor)
TMC5062_MSLUTSTART(motor)
TMC5062_MSCNT(motor)
TMC5062_MSCURACT(motor)
TMC5062_CHOPCONF(motor)
TMC5062_COOLCONF(motor)
TMC5062_DCCTRL(motor)
TMC5062_DRVSTATUS(motor)
file TMC5072.c
#include “TMC5072.h”

Functions

void tmc5072_readWriteArray(uint8_t channel, uint8_t *data, size_t length)
void tmc5072_writeDatagram(TMC5072TypeDef *tmc5072, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc5072_writeInt(TMC5072TypeDef *tmc5072, uint8_t address, int32_t value)
int32_t tmc5072_readInt(TMC5072TypeDef *tmc5072, uint8_t address)
void tmc5072_init(TMC5072TypeDef *tmc5072, uint8_t channel, ConfigurationTypeDef *tmc5072_config, const int32_t *registerResetState)
void tmc5072_fillShadowRegisters(TMC5072TypeDef *tmc5072)
static void writeConfiguration(TMC5072TypeDef *tmc5072)
void tmc5072_periodicJob(TMC5072TypeDef *tmc5072, uint32_t tick)
uint8_t tmc5072_reset(TMC5072TypeDef *tmc5072)
uint8_t tmc5072_restore(TMC5072TypeDef *tmc5072)
void tmc5072_setRegisterResetState(TMC5072TypeDef *tmc5072, const int32_t *resetState)
void tmc5072_setCallback(TMC5072TypeDef *tmc5072, tmc5072_callback callback)
void tmc5072_rotate(TMC5072TypeDef *tmc5072, uint8_t motor, int32_t velocity)
void tmc5072_right(TMC5072TypeDef *tmc5072, uint8_t motor, int32_t velocity)
void tmc5072_left(TMC5072TypeDef *tmc5072, uint8_t motor, int32_t velocity)
void tmc5072_stop(TMC5072TypeDef *tmc5072, uint8_t motor)
void tmc5072_moveTo(TMC5072TypeDef *tmc5072, uint8_t motor, int32_t position, uint32_t velocityMax)
void tmc5072_moveBy(TMC5072TypeDef *tmc5072, uint8_t motor, uint32_t velocityMax, int32_t *ticks)
file TMC5072.h
#include “tmc/helpers/API_Header.h”
#include “TMC5072_Register.h”
#include “TMC5072_Constants.h”
#include “TMC5072_Fields.h”

Defines

TMC5072_FIELD_READ(tdef, address, mask, shift)
TMC5072_FIELD_WRITE(tdef, address, mask, shift, value)
R30
R32
R3A
R50
R52
R5A
R6C
R7C

Typedefs

typedef void (*tmc5072_callback)(TMC5072TypeDef*, ConfigState)

Functions

void tmc5072_writeDatagram(TMC5072TypeDef *tmc5072, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc5072_writeInt(TMC5072TypeDef *tmc5072, uint8_t address, int32_t value)
int32_t tmc5072_readInt(TMC5072TypeDef *tmc5072, uint8_t address)
void tmc5072_init(TMC5072TypeDef *tmc5072, uint8_t channel, ConfigurationTypeDef *tmc5072_config, const int32_t *registerResetState)
void tmc5072_fillShadowRegisters(TMC5072TypeDef *tmc5072)
uint8_t tmc5072_reset(TMC5072TypeDef *tmc5072)
uint8_t tmc5072_restore(TMC5072TypeDef *tmc5072)
void tmc5072_setRegisterResetState(TMC5072TypeDef *tmc5072, const int32_t *resetState)
void tmc5072_setCallback(TMC5072TypeDef *tmc5072, tmc5072_callback callback)
void tmc5072_periodicJob(TMC5072TypeDef *tmc5072, uint32_t tick)
void tmc5072_rotate(TMC5072TypeDef *tmc5072, uint8_t motor, int32_t velocity)
void tmc5072_right(TMC5072TypeDef *tmc5072, uint8_t motor, int32_t velocity)
void tmc5072_left(TMC5072TypeDef *tmc5072, uint8_t motor, int32_t velocity)
void tmc5072_stop(TMC5072TypeDef *tmc5072, uint8_t motor)
void tmc5072_moveTo(TMC5072TypeDef *tmc5072, uint8_t motor, int32_t position, uint32_t velocityMax)
void tmc5072_moveBy(TMC5072TypeDef *tmc5072, uint8_t motor, uint32_t velocityMax, int32_t *ticks)

Variables

static const uint8_t tmc5072_defaultRegisterAccess[TMC5072_REGISTER_COUNT] = {0x03, 0x01, 0x01, 0x02, 0x13, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x01, ____, ____, ____, ____, ____, ____, 0x02, 0x01, ____, ____, ____, ____, ____, ____, 0x03, 0x03, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, ____, 0x02, 0x02, 0x02, 0x03, ____, ____, 0x02, 0x02, 0x02, 0x02, 0x03, 0x01, 0x01, ____, 0x03, 0x03, 0x02, 0x01, 0x01, ____, ____, ____, 0x03, 0x03, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, ____, 0x02, 0x02, 0x02, 0x03, ____, ____, 0x02, 0x02, 0x02, 0x02, 0x03, 0x01, 0x01, ____, 0x03, 0x03, 0x02, 0x01, 0x01, ____, ____, ____, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x01, 0x01, 0x03, 0x02, 0x02, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x01, 0x01, 0x03, 0x02, 0x02, 0x01}
static const int32_t tmc5072_defaultRegisterResetState[TMC5072_REGISTER_COUNT] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R30, 0, R32, 0, 0, 0, 0, 0, 0, 0, R3A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R50, 0, R52, 0, 0, 0, 0, 0, 0, 0, R5A, 0, 0, 0, 0, 0, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, R6C, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R7C, 0, 0, 0}
static const TMCRegisterConstant tmc5072_RegisterConstants[] = {{0x60, 0xAAAAB554}, {0x61, 0x4A9554AA}, {0x62, 0x24492929}, {0x63, 0x10104222}, {0x64, 0xFBFFFFFF}, {0x65, 0xB5BB777D}, {0x66, 0x49295556}, {0x67, 0x00404222}, {0x68, 0xFFFF8056}, {0x69, 0x00F70000}}
file TMC5072_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC5072_REGISTER_COUNT
TMC5072_MOTORS
TMC5072_WRITE_BIT
TMC5072_ADDRESS_MASK
TMC5072_MAX_VELOCITY
TMC5072_MAX_ACCELERATION
TMC5072_MODE_POSITION
TMC5072_MODE_VELPOS
TMC5072_MODE_VELNEG
TMC5072_MODE_HOLD
file TMC5072_Fields.h

Defines

TMC5072_SINGLE_DRIVER_MASK
TMC5072_SINGLE_DRIVER_SHIFT
TMC5072_STEPDIR1_ENABLE_MASK
TMC5072_STEPDIR1_ENABLE_SHIFT
TMC5072_STEPDIR2_ENABLE_MASK
TMC5072_STEPDIR2_ENABLE_SHIFT
TMC5072_POSCMP_ENABLE_MASK
TMC5072_POSCMP_ENABLE_SHIFT
TMC5072_ENC1_REFSEL_MASK
TMC5072_ENC1_REFSEL_SHIFT
TMC5072_ENC2_ENABLE_MASK
TMC5072_ENC2_ENABLE_SHIFT
TMC5072_ENC2_REFSEL_MASK
TMC5072_ENC2_REFSEL_SHIFT
TMC5072_TEST_MODE_MASK
TMC5072_TEST_MODE_SHIFT
TMC5072_SHAFT1_MASK
TMC5072_SHAFT1_SHIFT
TMC5072_SHAFT2_MASK
TMC5072_SHAFT2_SHIFT
TMC5072_LOCK_GCONF_MASK
TMC5072_LOCK_GCONF_SHIFT
TMC5072_DC_SYNC_MASK
TMC5072_DC_SYNC_SHIFT
TMC5072_RESET_MASK
TMC5072_RESET_SHIFT
TMC5072_DRV_ERR1_MASK
TMC5072_DRV_ERR1_SHIFT
TMC5072_UV_CP_MASK
TMC5072_UV_CP_SHIFT
TMC5072_IFCNT_MASK
TMC5072_IFCNT_SHIFT
TMC5072_SLAVEADDR_MASK
TMC5072_SLAVEADDR_SHIFT
TMC5072_SENDDELAY_MASK
TMC5072_SENDDELAY_SHIFT
TMC5072_TEST_SEL_MASK
TMC5072_TEST_SEL_SHIFT
TMC5072_SENDDELAY_MASK
TMC5072_SENDDELAY_SHIFT
TMC5072_IO0_IN_MASK
TMC5072_IO0_IN_SHIFT
TMC5072_IO1_IN_MASK
TMC5072_IO1_IN_SHIFT
TMC5072_IO2_IN_MASK
TMC5072_IO2_IN_SHIFT
TMC5072_IO3_IN_MASK
TMC5072_IO3_IN_SHIFT
TMC5072_IOP_IN_MASK
TMC5072_IOP_IN_SHIFT
TMC5072_ION_IN_MASK
TMC5072_ION_IN_SHIFT
TMC5072_NEXTADDR_IN_MASK
TMC5072_NEXTADDR_IN_SHIFT
TMC5072_DRV_ENN_MASK
TMC5072_DRV_ENN_SHIFT
TMC5072_SW_COMP_IN_MASK
TMC5072_SW_COMP_IN_SHIFT
TMC5072_VERSION_MASK
TMC5072_VERSION_SHIFT
TMC5072_IO0_OUT_MASK
TMC5072_IO0_OUT_SHIFT
TMC5072_IO1_OUT_MASK
TMC5072_IO1_OUT_SHIFT
TMC5072_IO2_OUT_MASK
TMC5072_IO2_OUT_SHIFT
TMC5072_IODDR0_MASK
TMC5072_IODDR0_SHIFT
TMC5072_IODDR1_MASK
TMC5072_IODDR1_SHIFT
TMC5072_IODDR2_MASK
TMC5072_IODDR2_SHIFT
TMC5072_X_COMPARE_MASK
TMC5072_X_COMPARE_SHIFT
TMC5072_PWM_AMPL_MASK
TMC5072_PWM_AMPL_SHIFT
TMC5072_PWM_GRAD_MASK
TMC5072_PWM_GRAD_SHIFT
TMC5072_PWM_FREQ_MASK
TMC5072_PWM_FREQ_SHIFT
TMC5072_PWM_AUTOSCALE_MASK
TMC5072_PWM_AUTOSCALE_SHIFT
TMC5072_PWM_SYMMETRIC_MASK
TMC5072_PWM_SYMMETRIC_SHIFT
TMC5072_FREEWHEEL_MASK
TMC5072_FREEWHEEL_SHIFT
TMC5072_PWM_GRAD_MASK
TMC5072_PWM_GRAD_SHIFT
TMC5072_PWM_FREQ_MASK
TMC5072_PWM_FREQ_SHIFT
TMC5072_PWM_AUTOSCALE_MASK
TMC5072_PWM_AUTOSCALE_SHIFT
TMC5072_PWM_SYMMETRIC_MASK
TMC5072_PWM_SYMMETRIC_SHIFT
TMC5072_FREEWHEEL_MASK
TMC5072_FREEWHEEL_SHIFT
TMC5072_PWM_STATUS_MASK
TMC5072_PWM_STATUS_SHIFT
TMC5072_PWM_AMPL_MASK
TMC5072_PWM_AMPL_SHIFT
TMC5072_PWM_GRAD_MASK
TMC5072_PWM_GRAD_SHIFT
TMC5072_PWM_FREQ_MASK
TMC5072_PWM_FREQ_SHIFT
TMC5072_PWM_AUTOSCALE_MASK
TMC5072_PWM_AUTOSCALE_SHIFT
TMC5072_PWM_SYMMETRIC_MASK
TMC5072_PWM_SYMMETRIC_SHIFT
TMC5072_FREEWHEEL_MASK
TMC5072_FREEWHEEL_SHIFT
TMC5072_PWM_GRAD_MASK
TMC5072_PWM_GRAD_SHIFT
TMC5072_PWM_FREQ_MASK
TMC5072_PWM_FREQ_SHIFT
TMC5072_PWM_AUTOSCALE_MASK
TMC5072_PWM_AUTOSCALE_SHIFT
TMC5072_PWM_SYMMETRIC_MASK
TMC5072_PWM_SYMMETRIC_SHIFT
TMC5072_FREEWHEEL_MASK
TMC5072_FREEWHEEL_SHIFT
TMC5072_PWM_STATUS_MASK
TMC5072_PWM_STATUS_SHIFT
TMC5072_RAMPMODE_MASK
TMC5072_RAMPMODE_SHIFT
TMC5072_XACTUAL_MASK
TMC5072_XACTUAL_SHIFT
TMC5072_VACTUAL_MASK
TMC5072_VACTUAL_SHIFT
TMC5072_VSTART_MASK
TMC5072_VSTART_SHIFT
TMC5072_A1_MASK
TMC5072_A1_SHIFT
TMC5072_V1__MASK
TMC5072_V1__SHIFT
TMC5072_AMAX_MASK
TMC5072_AMAX_SHIFT
TMC5072_VMAX_MASK
TMC5072_VMAX_SHIFT
TMC5072_DMAX_MASK
TMC5072_DMAX_SHIFT
TMC5072_D1_MASK
TMC5072_D1_SHIFT
TMC5072_VSTOP_MASK
TMC5072_VSTOP_SHIFT
TMC5072_TZEROWAIT_MASK
TMC5072_TZEROWAIT_SHIFT
TMC5072_XTARGET_MASK
TMC5072_XTARGET_SHIFT
TMC5072_RAMPMODE_MASK
TMC5072_RAMPMODE_SHIFT
TMC5072_XACTUAL_MASK
TMC5072_XACTUAL_SHIFT
TMC5072_VACTUAL_MASK
TMC5072_VACTUAL_SHIFT
TMC5072_VSTART_MASK
TMC5072_VSTART_SHIFT
TMC5072_A1_MASK
TMC5072_A1_SHIFT
TMC5072_V1__MASK
TMC5072_V1__SHIFT
TMC5072_AMAX_MASK
TMC5072_AMAX_SHIFT
TMC5072_VMAX_MASK
TMC5072_VMAX_SHIFT
TMC5072_DMAX_MASK
TMC5072_DMAX_SHIFT
TMC5072_D1_MASK
TMC5072_D1_SHIFT
TMC5072_VSTOP_MASK
TMC5072_VSTOP_SHIFT
TMC5072_TZEROWAIT_MASK
TMC5072_TZEROWAIT_SHIFT
TMC5072_XTARGET_MASK
TMC5072_XTARGET_SHIFT
TMC5072_IHOLD_MASK
TMC5072_IHOLD_SHIFT
TMC5072_IRUN_MASK
TMC5072_IRUN_SHIFT
TMC5072_IHOLDDELAY_MASK
TMC5072_IHOLDDELAY_SHIFT
TMC5072_VCOOLTHRS_MASK
TMC5072_VCOOLTHRS_SHIFT
TMC5072_VHIGH_MASK
TMC5072_VHIGH_SHIFT
TMC5072_VDCMIN_MASK
TMC5072_VDCMIN_SHIFT
TMC5072_STOP_L_ENABLE_MASK
TMC5072_STOP_L_ENABLE_SHIFT
TMC5072_STOP_R_ENABLE_MASK
TMC5072_STOP_R_ENABLE_SHIFT
TMC5072_POL_STOP_L_MASK
TMC5072_POL_STOP_L_SHIFT
TMC5072_POL_STOP_R_MASK
TMC5072_POL_STOP_R_SHIFT
TMC5072_SWAP_LR_MASK
TMC5072_SWAP_LR_SHIFT
TMC5072_LATCH_L_ACTIVE_MASK
TMC5072_LATCH_L_ACTIVE_SHIFT
TMC5072_LATCH_L_INACTIVE_MASK
TMC5072_LATCH_L_INACTIVE_SHIFT
TMC5072_LATCH_R_ACTIVE_MASK
TMC5072_LATCH_R_ACTIVE_SHIFT
TMC5072_LATCH_R_INACTIVE_MASK
TMC5072_LATCH_R_INACTIVE_SHIFT
TMC5072_EN_LATCH_ENCODER_MASK
TMC5072_EN_LATCH_ENCODER_SHIFT
TMC5072_SG_STOP_MASK
TMC5072_SG_STOP_SHIFT
TMC5072_EN_SOFTSTOP_MASK
TMC5072_EN_SOFTSTOP_SHIFT
TMC5072_STATUS_STOP_L_MASK
TMC5072_STATUS_STOP_L_SHIFT
TMC5072_STATUS_STOP_R_MASK
TMC5072_STATUS_STOP_R_SHIFT
TMC5072_STATUS_LATCH_L_MASK
TMC5072_STATUS_LATCH_L_SHIFT
TMC5072_STATUS_LATCH_R_MASK
TMC5072_STATUS_LATCH_R_SHIFT
TMC5072_EVENT_STOP_L_MASK
TMC5072_EVENT_STOP_L_SHIFT
TMC5072_EVENT_STOP_R_MASK
TMC5072_EVENT_STOP_R_SHIFT
TMC5072_EVENT_STOP_SG_MASK
TMC5072_EVENT_STOP_SG_SHIFT
TMC5072_EVENT_POS_REACHED_MASK
TMC5072_EVENT_POS_REACHED_SHIFT
TMC5072_VELOCITY_REACHED_MASK
TMC5072_VELOCITY_REACHED_SHIFT
TMC5072_POSITION_REACHED_MASK
TMC5072_POSITION_REACHED_SHIFT
TMC5072_VZERO_MASK
TMC5072_VZERO_SHIFT
TMC5072_T_ZEROWAIT_ACTIVE_MASK
TMC5072_T_ZEROWAIT_ACTIVE_SHIFT
TMC5072_SECOND_MOVE_MASK
TMC5072_SECOND_MOVE_SHIFT
TMC5072_STATUS_SG_MASK
TMC5072_STATUS_SG_SHIFT
TMC5072_XLATCH_MASK
TMC5072_XLATCH_SHIFT
TMC5072_IHOLD_MASK
TMC5072_IHOLD_SHIFT
TMC5072_IRUN_MASK
TMC5072_IRUN_SHIFT
TMC5072_IHOLDDELAY_MASK
TMC5072_IHOLDDELAY_SHIFT
TMC5072_VCOOLTHRS_MASK
TMC5072_VCOOLTHRS_SHIFT
TMC5072_VHIGH_MASK
TMC5072_VHIGH_SHIFT
TMC5072_VDCMIN_MASK
TMC5072_VDCMIN_SHIFT
TMC5072_STOP_L_ENABLE_MASK
TMC5072_STOP_L_ENABLE_SHIFT
TMC5072_STOP_R_ENABLE_MASK
TMC5072_STOP_R_ENABLE_SHIFT
TMC5072_POL_STOP_L_MASK
TMC5072_POL_STOP_L_SHIFT
TMC5072_POL_STOP_R_MASK
TMC5072_POL_STOP_R_SHIFT
TMC5072_SWAP_LR_MASK
TMC5072_SWAP_LR_SHIFT
TMC5072_LATCH_L_ACTIVE_MASK
TMC5072_LATCH_L_ACTIVE_SHIFT
TMC5072_LATCH_L_INACTIVE_MASK
TMC5072_LATCH_L_INACTIVE_SHIFT
TMC5072_LATCH_R_ACTIVE_MASK
TMC5072_LATCH_R_ACTIVE_SHIFT
TMC5072_LATCH_R_INACTIVE_MASK
TMC5072_LATCH_R_INACTIVE_SHIFT
TMC5072_EN_LATCH_ENCODER_MASK
TMC5072_EN_LATCH_ENCODER_SHIFT
TMC5072_SG_STOP_MASK
TMC5072_SG_STOP_SHIFT
TMC5072_EN_SOFTSTOP_MASK
TMC5072_EN_SOFTSTOP_SHIFT
TMC5072_STATUS_STOP_L_MASK
TMC5072_STATUS_STOP_L_SHIFT
TMC5072_STATUS_STOP_R_MASK
TMC5072_STATUS_STOP_R_SHIFT
TMC5072_STATUS_LATCH_L_MASK
TMC5072_STATUS_LATCH_L_SHIFT
TMC5072_STATUS_LATCH_R_MASK
TMC5072_STATUS_LATCH_R_SHIFT
TMC5072_EVENT_STOP_L_MASK
TMC5072_EVENT_STOP_L_SHIFT
TMC5072_EVENT_STOP_R_MASK
TMC5072_EVENT_STOP_R_SHIFT
TMC5072_EVENT_STOP_SG_MASK
TMC5072_EVENT_STOP_SG_SHIFT
TMC5072_EVENT_POS_REACHED_MASK
TMC5072_EVENT_POS_REACHED_SHIFT
TMC5072_VELOCITY_REACHED_MASK
TMC5072_VELOCITY_REACHED_SHIFT
TMC5072_POSITION_REACHED_MASK
TMC5072_POSITION_REACHED_SHIFT
TMC5072_VZERO_MASK
TMC5072_VZERO_SHIFT
TMC5072_T_ZEROWAIT_ACTIVE_MASK
TMC5072_T_ZEROWAIT_ACTIVE_SHIFT
TMC5072_SECOND_MOVE_MASK
TMC5072_SECOND_MOVE_SHIFT
TMC5072_STATUS_SG_MASK
TMC5072_STATUS_SG_SHIFT
TMC5072_XLATCH_MASK
TMC5072_XLATCH_SHIFT
TMC5072_POL_A_MASK
TMC5072_POL_A_SHIFT
TMC5072_POL_B_MASK
TMC5072_POL_B_SHIFT
TMC5072_POL_N_MASK
TMC5072_POL_N_SHIFT
TMC5072_IGNORE_AB_MASK
TMC5072_IGNORE_AB_SHIFT
TMC5072_CLR_CONT_MASK
TMC5072_CLR_CONT_SHIFT
TMC5072_CLR_ONCE_MASK
TMC5072_CLR_ONCE_SHIFT
TMC5072_POS_EDGENEG_EDGE_MASK
TMC5072_POS_EDGENEG_EDGE_SHIFT
TMC5072_CLR_ENC_X_MASK
TMC5072_CLR_ENC_X_SHIFT
TMC5072_LATCH_X_ACT_MASK
TMC5072_LATCH_X_ACT_SHIFT
TMC5072_ENC_SEL_DECIMAL_MASK
TMC5072_ENC_SEL_DECIMAL_SHIFT
TMC5072_LATCH_NOW__MASK
TMC5072_LATCH_NOW__SHIFT
TMC5072_X_ENC_MASK
TMC5072_X_ENC_SHIFT
TMC5072_INTEGER_MASK
TMC5072_INTEGER_SHIFT
TMC5072_FRACTIONAL_MASK
TMC5072_FRACTIONAL_SHIFT
TMC5072_ENC_STATUS_MASK
TMC5072_ENC_STATUS_SHIFT
TMC5072_ENC_LATCH_MASK
TMC5072_ENC_LATCH_SHIFT
TMC5072_POL_A_MASK
TMC5072_POL_A_SHIFT
TMC5072_POL_B_MASK
TMC5072_POL_B_SHIFT
TMC5072_POL_N_MASK
TMC5072_POL_N_SHIFT
TMC5072_IGNORE_AB_MASK
TMC5072_IGNORE_AB_SHIFT
TMC5072_CLR_CONT_MASK
TMC5072_CLR_CONT_SHIFT
TMC5072_CLR_ONCE_MASK
TMC5072_CLR_ONCE_SHIFT
TMC5072_POS_EDGENEG_EDGE_MASK
TMC5072_POS_EDGENEG_EDGE_SHIFT
TMC5072_CLR_ENC_X_MASK
TMC5072_CLR_ENC_X_SHIFT
TMC5072_LATCH_X_ACT_MASK
TMC5072_LATCH_X_ACT_SHIFT
TMC5072_ENC_SEL_DECIMAL_MASK
TMC5072_ENC_SEL_DECIMAL_SHIFT
TMC5072_LATCH_NOW__MASK
TMC5072_LATCH_NOW__SHIFT
TMC5072_X_ENC_MASK
TMC5072_X_ENC_SHIFT
TMC5072_INTEGER_MASK
TMC5072_INTEGER_SHIFT
TMC5072_FRACTIONAL_MASK
TMC5072_FRACTIONAL_SHIFT
TMC5072_ENC_STATUS_MASK
TMC5072_ENC_STATUS_SHIFT
TMC5072_ENC_LATCH_MASK
TMC5072_ENC_LATCH_SHIFT
TMC5072_OFS0_MASK
TMC5072_OFS0_SHIFT
TMC5072_OFS1_MASK
TMC5072_OFS1_SHIFT
TMC5072_OFS2_MASK
TMC5072_OFS2_SHIFT
TMC5072_OFS3_MASK
TMC5072_OFS3_SHIFT
TMC5072_OFS4_MASK
TMC5072_OFS4_SHIFT
TMC5072_OFS5_MASK
TMC5072_OFS5_SHIFT
TMC5072_OFS6_MASK
TMC5072_OFS6_SHIFT
TMC5072_OFS7_MASK
TMC5072_OFS7_SHIFT
TMC5072_OFS8_MASK
TMC5072_OFS8_SHIFT
TMC5072_OFS9_MASK
TMC5072_OFS9_SHIFT
TMC5072_OFS10_MASK
TMC5072_OFS10_SHIFT
TMC5072_OFS11_MASK
TMC5072_OFS11_SHIFT
TMC5072_OFS12_MASK
TMC5072_OFS12_SHIFT
TMC5072_OFS13_MASK
TMC5072_OFS13_SHIFT
TMC5072_OFS14_MASK
TMC5072_OFS14_SHIFT
TMC5072_OFS15_MASK
TMC5072_OFS15_SHIFT
TMC5072_OFS16_MASK
TMC5072_OFS16_SHIFT
TMC5072_OFS17_MASK
TMC5072_OFS17_SHIFT
TMC5072_OFS18_MASK
TMC5072_OFS18_SHIFT
TMC5072_OFS19_MASK
TMC5072_OFS19_SHIFT
TMC5072_OFS20_MASK
TMC5072_OFS20_SHIFT
TMC5072_OFS21_MASK
TMC5072_OFS21_SHIFT
TMC5072_OFS22_MASK
TMC5072_OFS22_SHIFT
TMC5072_OFS23_MASK
TMC5072_OFS23_SHIFT
TMC5072_OFS24_MASK
TMC5072_OFS24_SHIFT
TMC5072_OFS25_MASK
TMC5072_OFS25_SHIFT
TMC5072_OFS26_MASK
TMC5072_OFS26_SHIFT
TMC5072_OFS27_MASK
TMC5072_OFS27_SHIFT
TMC5072_OFS28_MASK
TMC5072_OFS28_SHIFT
TMC5072_OFS29_MASK
TMC5072_OFS29_SHIFT
TMC5072_OFS30_MASK
TMC5072_OFS30_SHIFT
TMC5072_OFS31_MASK
TMC5072_OFS31_SHIFT
TMC5072_OFS32_MASK
TMC5072_OFS32_SHIFT
TMC5072_OFS33_MASK
TMC5072_OFS33_SHIFT
TMC5072_OFS34_MASK
TMC5072_OFS34_SHIFT
TMC5072_OFS35_MASK
TMC5072_OFS35_SHIFT
TMC5072_OFS36_MASK
TMC5072_OFS36_SHIFT
TMC5072_OFS37_MASK
TMC5072_OFS37_SHIFT
TMC5072_OFS38_MASK
TMC5072_OFS38_SHIFT
TMC5072_OFS39_MASK
TMC5072_OFS39_SHIFT
TMC5072_OFS40_MASK
TMC5072_OFS40_SHIFT
TMC5072_OFS41_MASK
TMC5072_OFS41_SHIFT
TMC5072_OFS42_MASK
TMC5072_OFS42_SHIFT
TMC5072_OFS43_MASK
TMC5072_OFS43_SHIFT
TMC5072_OFS44_MASK
TMC5072_OFS44_SHIFT
TMC5072_OFS45_MASK
TMC5072_OFS45_SHIFT
TMC5072_OFS46_MASK
TMC5072_OFS46_SHIFT
TMC5072_OFS47_MASK
TMC5072_OFS47_SHIFT
TMC5072_OFS48_MASK
TMC5072_OFS48_SHIFT
TMC5072_OFS49_MASK
TMC5072_OFS49_SHIFT
TMC5072_OFS50_MASK
TMC5072_OFS50_SHIFT
TMC5072_OFS51_MASK
TMC5072_OFS51_SHIFT
TMC5072_OFS52_MASK
TMC5072_OFS52_SHIFT
TMC5072_OFS53_MASK
TMC5072_OFS53_SHIFT
TMC5072_OFS54_MASK
TMC5072_OFS54_SHIFT
TMC5072_OFS55_MASK
TMC5072_OFS55_SHIFT
TMC5072_OFS56_MASK
TMC5072_OFS56_SHIFT
TMC5072_OFS57_MASK
TMC5072_OFS57_SHIFT
TMC5072_OFS58_MASK
TMC5072_OFS58_SHIFT
TMC5072_OFS59_MASK
TMC5072_OFS59_SHIFT
TMC5072_OFS60_MASK
TMC5072_OFS60_SHIFT
TMC5072_OFS61_MASK
TMC5072_OFS61_SHIFT
TMC5072_OFS62_MASK
TMC5072_OFS62_SHIFT
TMC5072_OFS63_MASK
TMC5072_OFS63_SHIFT
TMC5072_OFS64_MASK
TMC5072_OFS64_SHIFT
TMC5072_OFS65_MASK
TMC5072_OFS65_SHIFT
TMC5072_OFS66_MASK
TMC5072_OFS66_SHIFT
TMC5072_OFS67_MASK
TMC5072_OFS67_SHIFT
TMC5072_OFS68_MASK
TMC5072_OFS68_SHIFT
TMC5072_OFS69_MASK
TMC5072_OFS69_SHIFT
TMC5072_OFS70_MASK
TMC5072_OFS70_SHIFT
TMC5072_OFS71_MASK
TMC5072_OFS71_SHIFT
TMC5072_OFS72_MASK
TMC5072_OFS72_SHIFT
TMC5072_OFS73_MASK
TMC5072_OFS73_SHIFT
TMC5072_OFS74_MASK
TMC5072_OFS74_SHIFT
TMC5072_OFS75_MASK
TMC5072_OFS75_SHIFT
TMC5072_OFS76_MASK
TMC5072_OFS76_SHIFT
TMC5072_OFS77_MASK
TMC5072_OFS77_SHIFT
TMC5072_OFS78_MASK
TMC5072_OFS78_SHIFT
TMC5072_OFS79_MASK
TMC5072_OFS79_SHIFT
TMC5072_OFS80_MASK
TMC5072_OFS80_SHIFT
TMC5072_OFS81_MASK
TMC5072_OFS81_SHIFT
TMC5072_OFS82_MASK
TMC5072_OFS82_SHIFT
TMC5072_OFS83_MASK
TMC5072_OFS83_SHIFT
TMC5072_OFS84_MASK
TMC5072_OFS84_SHIFT
TMC5072_OFS85_MASK
TMC5072_OFS85_SHIFT
TMC5072_OFS86_MASK
TMC5072_OFS86_SHIFT
TMC5072_OFS87_MASK
TMC5072_OFS87_SHIFT
TMC5072_OFS88_MASK
TMC5072_OFS88_SHIFT
TMC5072_OFS89_MASK
TMC5072_OFS89_SHIFT
TMC5072_OFS90_MASK
TMC5072_OFS90_SHIFT
TMC5072_OFS91_MASK
TMC5072_OFS91_SHIFT
TMC5072_OFS92_MASK
TMC5072_OFS92_SHIFT
TMC5072_OFS93_MASK
TMC5072_OFS93_SHIFT
TMC5072_OFS94_MASK
TMC5072_OFS94_SHIFT
TMC5072_OFS95_MASK
TMC5072_OFS95_SHIFT
TMC5072_OFS96_MASK
TMC5072_OFS96_SHIFT
TMC5072_OFS97_MASK
TMC5072_OFS97_SHIFT
TMC5072_OFS98_MASK
TMC5072_OFS98_SHIFT
TMC5072_OFS99_MASK
TMC5072_OFS99_SHIFT
TMC5072_OFS100_MASK
TMC5072_OFS100_SHIFT
TMC5072_OFS101_MASK
TMC5072_OFS101_SHIFT
TMC5072_OFS102_MASK
TMC5072_OFS102_SHIFT
TMC5072_OFS103_MASK
TMC5072_OFS103_SHIFT
TMC5072_OFS104_MASK
TMC5072_OFS104_SHIFT
TMC5072_OFS105_MASK
TMC5072_OFS105_SHIFT
TMC5072_OFS106_MASK
TMC5072_OFS106_SHIFT
TMC5072_OFS107_MASK
TMC5072_OFS107_SHIFT
TMC5072_OFS108_MASK
TMC5072_OFS108_SHIFT
TMC5072_OFS109_MASK
TMC5072_OFS109_SHIFT
TMC5072_OFS110_MASK
TMC5072_OFS110_SHIFT
TMC5072_OFS111_MASK
TMC5072_OFS111_SHIFT
TMC5072_OFS112_MASK
TMC5072_OFS112_SHIFT
TMC5072_OFS113_MASK
TMC5072_OFS113_SHIFT
TMC5072_OFS114_MASK
TMC5072_OFS114_SHIFT
TMC5072_OFS115_MASK
TMC5072_OFS115_SHIFT
TMC5072_OFS116_MASK
TMC5072_OFS116_SHIFT
TMC5072_OFS117_MASK
TMC5072_OFS117_SHIFT
TMC5072_OFS118_MASK
TMC5072_OFS118_SHIFT
TMC5072_OFS119_MASK
TMC5072_OFS119_SHIFT
TMC5072_OFS120_MASK
TMC5072_OFS120_SHIFT
TMC5072_OFS121_MASK
TMC5072_OFS121_SHIFT
TMC5072_OFS122_MASK
TMC5072_OFS122_SHIFT
TMC5072_OFS123_MASK
TMC5072_OFS123_SHIFT
TMC5072_OFS124_MASK
TMC5072_OFS124_SHIFT
TMC5072_OFS125_MASK
TMC5072_OFS125_SHIFT
TMC5072_OFS126_MASK
TMC5072_OFS126_SHIFT
TMC5072_OFS127_MASK
TMC5072_OFS127_SHIFT
TMC5072_OFS128_MASK
TMC5072_OFS128_SHIFT
TMC5072_OFS129_MASK
TMC5072_OFS129_SHIFT
TMC5072_OFS130_MASK
TMC5072_OFS130_SHIFT
TMC5072_OFS131_MASK
TMC5072_OFS131_SHIFT
TMC5072_OFS132_MASK
TMC5072_OFS132_SHIFT
TMC5072_OFS133_MASK
TMC5072_OFS133_SHIFT
TMC5072_OFS134_MASK
TMC5072_OFS134_SHIFT
TMC5072_OFS135_MASK
TMC5072_OFS135_SHIFT
TMC5072_OFS136_MASK
TMC5072_OFS136_SHIFT
TMC5072_OFS137_MASK
TMC5072_OFS137_SHIFT
TMC5072_OFS138_MASK
TMC5072_OFS138_SHIFT
TMC5072_OFS139_MASK
TMC5072_OFS139_SHIFT
TMC5072_OFS140_MASK
TMC5072_OFS140_SHIFT
TMC5072_OFS141_MASK
TMC5072_OFS141_SHIFT
TMC5072_OFS142_MASK
TMC5072_OFS142_SHIFT
TMC5072_OFS143_MASK
TMC5072_OFS143_SHIFT
TMC5072_OFS144_MASK
TMC5072_OFS144_SHIFT
TMC5072_OFS145_MASK
TMC5072_OFS145_SHIFT
TMC5072_OFS146_MASK
TMC5072_OFS146_SHIFT
TMC5072_OFS147_MASK
TMC5072_OFS147_SHIFT
TMC5072_OFS148_MASK
TMC5072_OFS148_SHIFT
TMC5072_OFS149_MASK
TMC5072_OFS149_SHIFT
TMC5072_OFS150_MASK
TMC5072_OFS150_SHIFT
TMC5072_OFS151_MASK
TMC5072_OFS151_SHIFT
TMC5072_OFS152_MASK
TMC5072_OFS152_SHIFT
TMC5072_OFS153_MASK
TMC5072_OFS153_SHIFT
TMC5072_OFS154_MASK
TMC5072_OFS154_SHIFT
TMC5072_OFS155_MASK
TMC5072_OFS155_SHIFT
TMC5072_OFS156_MASK
TMC5072_OFS156_SHIFT
TMC5072_OFS157_MASK
TMC5072_OFS157_SHIFT
TMC5072_OFS158_MASK
TMC5072_OFS158_SHIFT
TMC5072_OFS159_MASK
TMC5072_OFS159_SHIFT
TMC5072_OFS160_MASK
TMC5072_OFS160_SHIFT
TMC5072_OFS161_MASK
TMC5072_OFS161_SHIFT
TMC5072_OFS162_MASK
TMC5072_OFS162_SHIFT
TMC5072_OFS163_MASK
TMC5072_OFS163_SHIFT
TMC5072_OFS164_MASK
TMC5072_OFS164_SHIFT
TMC5072_OFS165_MASK
TMC5072_OFS165_SHIFT
TMC5072_OFS166_MASK
TMC5072_OFS166_SHIFT
TMC5072_OFS167_MASK
TMC5072_OFS167_SHIFT
TMC5072_OFS168_MASK
TMC5072_OFS168_SHIFT
TMC5072_OFS169_MASK
TMC5072_OFS169_SHIFT
TMC5072_OFS170_MASK
TMC5072_OFS170_SHIFT
TMC5072_OFS171_MASK
TMC5072_OFS171_SHIFT
TMC5072_OFS172_MASK
TMC5072_OFS172_SHIFT
TMC5072_OFS173_MASK
TMC5072_OFS173_SHIFT
TMC5072_OFS174_MASK
TMC5072_OFS174_SHIFT
TMC5072_OFS175_MASK
TMC5072_OFS175_SHIFT
TMC5072_OFS176_MASK
TMC5072_OFS176_SHIFT
TMC5072_OFS177_MASK
TMC5072_OFS177_SHIFT
TMC5072_OFS178_MASK
TMC5072_OFS178_SHIFT
TMC5072_OFS179_MASK
TMC5072_OFS179_SHIFT
TMC5072_OFS180_MASK
TMC5072_OFS180_SHIFT
TMC5072_OFS181_MASK
TMC5072_OFS181_SHIFT
TMC5072_OFS182_MASK
TMC5072_OFS182_SHIFT
TMC5072_OFS183_MASK
TMC5072_OFS183_SHIFT
TMC5072_OFS184_MASK
TMC5072_OFS184_SHIFT
TMC5072_OFS185_MASK
TMC5072_OFS185_SHIFT
TMC5072_OFS186_MASK
TMC5072_OFS186_SHIFT
TMC5072_OFS187_MASK
TMC5072_OFS187_SHIFT
TMC5072_OFS188_MASK
TMC5072_OFS188_SHIFT
TMC5072_OFS189_MASK
TMC5072_OFS189_SHIFT
TMC5072_OFS190_MASK
TMC5072_OFS190_SHIFT
TMC5072_OFS191_MASK
TMC5072_OFS191_SHIFT
TMC5072_OFS192_MASK
TMC5072_OFS192_SHIFT
TMC5072_OFS193_MASK
TMC5072_OFS193_SHIFT
TMC5072_OFS194_MASK
TMC5072_OFS194_SHIFT
TMC5072_OFS195_MASK
TMC5072_OFS195_SHIFT
TMC5072_OFS196_MASK
TMC5072_OFS196_SHIFT
TMC5072_OFS197_MASK
TMC5072_OFS197_SHIFT
TMC5072_OFS198_MASK
TMC5072_OFS198_SHIFT
TMC5072_OFS199_MASK
TMC5072_OFS199_SHIFT
TMC5072_OFS200_MASK
TMC5072_OFS200_SHIFT
TMC5072_OFS201_MASK
TMC5072_OFS201_SHIFT
TMC5072_OFS202_MASK
TMC5072_OFS202_SHIFT
TMC5072_OFS203_MASK
TMC5072_OFS203_SHIFT
TMC5072_OFS204_MASK
TMC5072_OFS204_SHIFT
TMC5072_OFS205_MASK
TMC5072_OFS205_SHIFT
TMC5072_OFS206_MASK
TMC5072_OFS206_SHIFT
TMC5072_OFS207_MASK
TMC5072_OFS207_SHIFT
TMC5072_OFS208_MASK
TMC5072_OFS208_SHIFT
TMC5072_OFS209_MASK
TMC5072_OFS209_SHIFT
TMC5072_OFS210_MASK
TMC5072_OFS210_SHIFT
TMC5072_OFS211_MASK
TMC5072_OFS211_SHIFT
TMC5072_OFS212_MASK
TMC5072_OFS212_SHIFT
TMC5072_OFS213_MASK
TMC5072_OFS213_SHIFT
TMC5072_OFS214_MASK
TMC5072_OFS214_SHIFT
TMC5072_OFS215_MASK
TMC5072_OFS215_SHIFT
TMC5072_OFS216_MASK
TMC5072_OFS216_SHIFT
TMC5072_OFS217_MASK
TMC5072_OFS217_SHIFT
TMC5072_OFS218_MASK
TMC5072_OFS218_SHIFT
TMC5072_OFS219_MASK
TMC5072_OFS219_SHIFT
TMC5072_OFS220_MASK
TMC5072_OFS220_SHIFT
TMC5072_OFS221_MASK
TMC5072_OFS221_SHIFT
TMC5072_OFS222_MASK
TMC5072_OFS222_SHIFT
TMC5072_OFS223_MASK
TMC5072_OFS223_SHIFT
TMC5072_OFS224_MASK
TMC5072_OFS224_SHIFT
TMC5072_OFS225_MASK
TMC5072_OFS225_SHIFT
TMC5072_OFS226_MASK
TMC5072_OFS226_SHIFT
TMC5072_OFS227_MASK
TMC5072_OFS227_SHIFT
TMC5072_OFS228_MASK
TMC5072_OFS228_SHIFT
TMC5072_OFS229_MASK
TMC5072_OFS229_SHIFT
TMC5072_OFS230_MASK
TMC5072_OFS230_SHIFT
TMC5072_OFS231_MASK
TMC5072_OFS231_SHIFT
TMC5072_OFS232_MASK
TMC5072_OFS232_SHIFT
TMC5072_OFS233_MASK
TMC5072_OFS233_SHIFT
TMC5072_OFS234_MASK
TMC5072_OFS234_SHIFT
TMC5072_OFS235_MASK
TMC5072_OFS235_SHIFT
TMC5072_OFS236_MASK
TMC5072_OFS236_SHIFT
TMC5072_OFS237_MASK
TMC5072_OFS237_SHIFT
TMC5072_OFS238_MASK
TMC5072_OFS238_SHIFT
TMC5072_OFS239_MASK
TMC5072_OFS239_SHIFT
TMC5072_OFS240_MASK
TMC5072_OFS240_SHIFT
TMC5072_OFS241_MASK
TMC5072_OFS241_SHIFT
TMC5072_OFS242_MASK
TMC5072_OFS242_SHIFT
TMC5072_OFS243_MASK
TMC5072_OFS243_SHIFT
TMC5072_OFS244_MASK
TMC5072_OFS244_SHIFT
TMC5072_OFS245_MASK
TMC5072_OFS245_SHIFT
TMC5072_OFS246_MASK
TMC5072_OFS246_SHIFT
TMC5072_OFS247_MASK
TMC5072_OFS247_SHIFT
TMC5072_OFS248_MASK
TMC5072_OFS248_SHIFT
TMC5072_OFS249_MASK
TMC5072_OFS249_SHIFT
TMC5072_OFS250_MASK
TMC5072_OFS250_SHIFT
TMC5072_OFS251_MASK
TMC5072_OFS251_SHIFT
TMC5072_OFS252_MASK
TMC5072_OFS252_SHIFT
TMC5072_OFS253_MASK
TMC5072_OFS253_SHIFT
TMC5072_OFS254_MASK
TMC5072_OFS254_SHIFT
TMC5072_OFS255_MASK
TMC5072_OFS255_SHIFT
TMC5072_W0_MASK
TMC5072_W0_SHIFT
TMC5072_W1_MASK
TMC5072_W1_SHIFT
TMC5072_W2_MASK
TMC5072_W2_SHIFT
TMC5072_W3_MASK
TMC5072_W3_SHIFT
TMC5072_X1_MASK
TMC5072_X1_SHIFT
TMC5072_X2_MASK
TMC5072_X2_SHIFT
TMC5072_X3_MASK
TMC5072_X3_SHIFT
TMC5072_START_SIN_MASK
TMC5072_START_SIN_SHIFT
TMC5072_START_SIN90_MASK
TMC5072_START_SIN90_SHIFT
TMC5072_MSCNT_MASK
TMC5072_MSCNT_SHIFT
TMC5072_CUR_A_MASK
TMC5072_CUR_A_SHIFT
TMC5072_CUR_B_MASK
TMC5072_CUR_B_SHIFT
TMC5072_TOFF_MASK
TMC5072_TOFF_SHIFT
TMC5072_TFD_ALL_MASK
TMC5072_TFD_ALL_SHIFT
TMC5072_OFFSET_MASK
TMC5072_OFFSET_SHIFT
TMC5072_TFD_3_MASK
TMC5072_TFD_3_SHIFT
TMC5072_DISFDCC_MASK
TMC5072_DISFDCC_SHIFT
TMC5072_RNDTF_MASK
TMC5072_RNDTF_SHIFT
TMC5072_CHM_MASK
TMC5072_CHM_SHIFT
TMC5072_TBL_MASK
TMC5072_TBL_SHIFT
TMC5072_VSENSE_MASK
TMC5072_VSENSE_SHIFT
TMC5072_VHIGHFS_MASK
TMC5072_VHIGHFS_SHIFT
TMC5072_VHIGHCHM_MASK
TMC5072_VHIGHCHM_SHIFT
TMC5072_MRES_MASK
TMC5072_MRES_SHIFT
TMC5072_INTPOL_MASK
TMC5072_INTPOL_SHIFT
TMC5072_DEDGE_MASK
TMC5072_DEDGE_SHIFT
TMC5072_DISS2G_MASK
TMC5072_DISS2G_SHIFT
TMC5072_TOFF_MASK
TMC5072_TOFF_SHIFT
TMC5072_TFD_ALL_MASK
TMC5072_TFD_ALL_SHIFT
TMC5072_OFFSET_MASK
TMC5072_OFFSET_SHIFT
TMC5072_TFD_3_MASK
TMC5072_TFD_3_SHIFT
TMC5072_DISFDCC_MASK
TMC5072_DISFDCC_SHIFT
TMC5072_RNDTF_MASK
TMC5072_RNDTF_SHIFT
TMC5072_CHM_MASK
TMC5072_CHM_SHIFT
TMC5072_TBL_MASK
TMC5072_TBL_SHIFT
TMC5072_VSENSE_MASK
TMC5072_VSENSE_SHIFT
TMC5072_VHIGHFS_MASK
TMC5072_VHIGHFS_SHIFT
TMC5072_VHIGHCHM_MASK
TMC5072_VHIGHCHM_SHIFT
TMC5072_MRES_MASK
TMC5072_MRES_SHIFT
TMC5072_INTPOL_MASK
TMC5072_INTPOL_SHIFT
TMC5072_DEDGE_MASK
TMC5072_DEDGE_SHIFT
TMC5072_DISS2G_MASK
TMC5072_DISS2G_SHIFT
TMC5072_TOFF_MASK
TMC5072_TOFF_SHIFT
TMC5072_HSTRT_MASK
TMC5072_HSTRT_SHIFT
TMC5072_HEND_MASK
TMC5072_HEND_SHIFT
TMC5072_RNDTF_MASK
TMC5072_RNDTF_SHIFT
TMC5072_CHM_MASK
TMC5072_CHM_SHIFT
TMC5072_TBL_MASK
TMC5072_TBL_SHIFT
TMC5072_VSENSE_MASK
TMC5072_VSENSE_SHIFT
TMC5072_VHIGHFS_MASK
TMC5072_VHIGHFS_SHIFT
TMC5072_VHIGHCHM_MASK
TMC5072_VHIGHCHM_SHIFT
TMC5072_MRES_MASK
TMC5072_MRES_SHIFT
TMC5072_INTPOL_MASK
TMC5072_INTPOL_SHIFT
TMC5072_DEDGE_MASK
TMC5072_DEDGE_SHIFT
TMC5072_DISS2G_MASK
TMC5072_DISS2G_SHIFT
TMC5072_SEMIN_MASK
TMC5072_SEMIN_SHIFT
TMC5072_SEUP_MASK
TMC5072_SEUP_SHIFT
TMC5072_SEMAX_MASK
TMC5072_SEMAX_SHIFT
TMC5072_SEDN_MASK
TMC5072_SEDN_SHIFT
TMC5072_SEIMIN_MASK
TMC5072_SEIMIN_SHIFT
TMC5072_SGT_MASK
TMC5072_SGT_SHIFT
TMC5072_SFILT_MASK
TMC5072_SFILT_SHIFT
TMC5072_DC_TIME_MASK
TMC5072_DC_TIME_SHIFT
TMC5072_DC_SG_MASK
TMC5072_DC_SG_SHIFT
TMC5072_SG_RESULT_MASK
TMC5072_SG_RESULT_SHIFT
TMC5072_FSACTIVE_MASK
TMC5072_FSACTIVE_SHIFT
TMC5072_CS_ACTUAL_MASK
TMC5072_CS_ACTUAL_SHIFT
TMC5072_STALLGUARD_MASK
TMC5072_STALLGUARD_SHIFT
TMC5072_OT_MASK
TMC5072_OT_SHIFT
TMC5072_OTPW_MASK
TMC5072_OTPW_SHIFT
TMC5072_S2GA_MASK
TMC5072_S2GA_SHIFT
TMC5072_S2GB_MASK
TMC5072_S2GB_SHIFT
TMC5072_OLA_MASK
TMC5072_OLA_SHIFT
TMC5072_OLB_MASK
TMC5072_OLB_SHIFT
TMC5072_STST_MASK
TMC5072_STST_SHIFT
TMC5072_MSCNT_MASK
TMC5072_MSCNT_SHIFT
TMC5072_CUR_A_MASK
TMC5072_CUR_A_SHIFT
TMC5072_CUR_B_MASK
TMC5072_CUR_B_SHIFT
TMC5072_TOFF_MASK
TMC5072_TOFF_SHIFT
TMC5072_TFD_ALL_MASK
TMC5072_TFD_ALL_SHIFT
TMC5072_OFFSET_MASK
TMC5072_OFFSET_SHIFT
TMC5072_TFD_3_MASK
TMC5072_TFD_3_SHIFT
TMC5072_DISFDCC_MASK
TMC5072_DISFDCC_SHIFT
TMC5072_RNDTF_MASK
TMC5072_RNDTF_SHIFT
TMC5072_CHM_MASK
TMC5072_CHM_SHIFT
TMC5072_TBL_MASK
TMC5072_TBL_SHIFT
TMC5072_VSENSE_MASK
TMC5072_VSENSE_SHIFT
TMC5072_VHIGHFS_MASK
TMC5072_VHIGHFS_SHIFT
TMC5072_VHIGHCHM_MASK
TMC5072_VHIGHCHM_SHIFT
TMC5072_MRES_MASK
TMC5072_MRES_SHIFT
TMC5072_INTPOL_MASK
TMC5072_INTPOL_SHIFT
TMC5072_DEDGE_MASK
TMC5072_DEDGE_SHIFT
TMC5072_DISS2G_MASK
TMC5072_DISS2G_SHIFT
TMC5072_TOFF_MASK
TMC5072_TOFF_SHIFT
TMC5072_TFD_ALL_MASK
TMC5072_TFD_ALL_SHIFT
TMC5072_OFFSET_MASK
TMC5072_OFFSET_SHIFT
TMC5072_TFD_3_MASK
TMC5072_TFD_3_SHIFT
TMC5072_DISFDCC_MASK
TMC5072_DISFDCC_SHIFT
TMC5072_RNDTF_MASK
TMC5072_RNDTF_SHIFT
TMC5072_CHM_MASK
TMC5072_CHM_SHIFT
TMC5072_TBL_MASK
TMC5072_TBL_SHIFT
TMC5072_VSENSE_MASK
TMC5072_VSENSE_SHIFT
TMC5072_VHIGHFS_MASK
TMC5072_VHIGHFS_SHIFT
TMC5072_VHIGHCHM_MASK
TMC5072_VHIGHCHM_SHIFT
TMC5072_MRES_MASK
TMC5072_MRES_SHIFT
TMC5072_INTPOL_MASK
TMC5072_INTPOL_SHIFT
TMC5072_DEDGE_MASK
TMC5072_DEDGE_SHIFT
TMC5072_DISS2G_MASK
TMC5072_DISS2G_SHIFT
TMC5072_TOFF_MASK
TMC5072_TOFF_SHIFT
TMC5072_HSTRT_MASK
TMC5072_HSTRT_SHIFT
TMC5072_HEND_MASK
TMC5072_HEND_SHIFT
TMC5072_RNDTF_MASK
TMC5072_RNDTF_SHIFT
TMC5072_CHM_MASK
TMC5072_CHM_SHIFT
TMC5072_TBL_MASK
TMC5072_TBL_SHIFT
TMC5072_VSENSE_MASK
TMC5072_VSENSE_SHIFT
TMC5072_VHIGHFS_MASK
TMC5072_VHIGHFS_SHIFT
TMC5072_VHIGHCHM_MASK
TMC5072_VHIGHCHM_SHIFT
TMC5072_MRES_MASK
TMC5072_MRES_SHIFT
TMC5072_INTPOL_MASK
TMC5072_INTPOL_SHIFT
TMC5072_DEDGE_MASK
TMC5072_DEDGE_SHIFT
TMC5072_DISS2G_MASK
TMC5072_DISS2G_SHIFT
TMC5072_SEMIN_MASK
TMC5072_SEMIN_SHIFT
TMC5072_SEUP_MASK
TMC5072_SEUP_SHIFT
TMC5072_SEMAX_MASK
TMC5072_SEMAX_SHIFT
TMC5072_SEDN_MASK
TMC5072_SEDN_SHIFT
TMC5072_SEIMIN_MASK
TMC5072_SEIMIN_SHIFT
TMC5072_SGT_MASK
TMC5072_SGT_SHIFT
TMC5072_SFILT_MASK
TMC5072_SFILT_SHIFT
TMC5072_DC_TIME_MASK
TMC5072_DC_TIME_SHIFT
TMC5072_DC_SG_MASK
TMC5072_DC_SG_SHIFT
TMC5072_SG_RESULT_MASK
TMC5072_SG_RESULT_SHIFT
TMC5072_FSACTIVE_MASK
TMC5072_FSACTIVE_SHIFT
TMC5072_CS_ACTUAL_MASK
TMC5072_CS_ACTUAL_SHIFT
TMC5072_STALLGUARD_MASK
TMC5072_STALLGUARD_SHIFT
TMC5072_OT_MASK
TMC5072_OT_SHIFT
TMC5072_OTPW_MASK
TMC5072_OTPW_SHIFT
TMC5072_S2GA_MASK
TMC5072_S2GA_SHIFT
TMC5072_S2GB_MASK
TMC5072_S2GB_SHIFT
TMC5072_OLA_MASK
TMC5072_OLA_SHIFT
TMC5072_OLB_MASK
TMC5072_OLB_SHIFT
TMC5072_STST_MASK
TMC5072_STST_SHIFT
file TMC5072_Register.h

Defines

MOTOR_ADDR(m)
MOTOR_ADDR_DRV(m)
MOTOR_ADDR_PWM(m)
TMC5072_GCONF
TMC5072_GSTAT
TMC5072_IFCNT
TMC5072_SLAVECONF
TMC5072_INPUT
TMC5072_OUTPUT
TMC5072_X_COMPARE
TMC5072_PWMCONF(motor)
TMC5072_PWM_STATUS(motor)
TMC5072_RAMPMODE(motor)
TMC5072_XACTUAL(motor)
TMC5072_VACTUAL(motor)
TMC5072_VSTART(motor)
TMC5072_A1(motor)
TMC5072_V1(motor)
TMC5072_AMAX(motor)
TMC5072_VMAX(motor)
TMC5072_DMAX(motor)
TMC5072_D1(motor)
TMC5072_VSTOP(motor)
TMC5072_TZEROWAIT(motor)
TMC5072_XTARGET(motor)
TMC5072_IHOLD_IRUN(motor)
TMC5072_VCOOLTHRS(motor)
TMC5072_VHIGH(motor)
TMC5072_VDCMIN(motor)
TMC5072_SWMODE(motor)
TMC5072_RAMPSTAT(motor)
TMC5072_XLATCH(motor)
TMC5072_ENCMODE(motor)
TMC5072_XENC(motor)
TMC5072_ENC_CONST(motor)
TMC5072_ENC_STATUS(motor)
TMC5072_ENC_LATCH(motor)
TMC5072_MSLUT0
TMC5072_MSLUT1
TMC5072_MSLUT2
TMC5072_MSLUT3
TMC5072_MSLUT4
TMC5072_MSLUT5
TMC5072_MSLUT6
TMC5072_MSLUT7
TMC5072_MSLUTSEL
TMC5072_MSLUTSTART
TMC5072_MSCNT(motor)
TMC5072_MSCURACT(motor)
TMC5072_CHOPCONF(motor)
TMC5072_COOLCONF(motor)
TMC5072_DCCTRL(motor)
TMC5072_DRVSTATUS(motor)
file TMC5130.c
#include “TMC5130.h”

Functions

void tmc5130_readWriteArray(uint8_t channel, uint8_t *data, size_t length)
void tmc5130_writeDatagram(TMC5130TypeDef *tmc5130, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc5130_writeInt(TMC5130TypeDef *tmc5130, uint8_t address, int32_t value)
int32_t tmc5130_readInt(TMC5130TypeDef *tmc5130, uint8_t address)
void tmc5130_init(TMC5130TypeDef *tmc5130, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
void tmc5130_fillShadowRegisters(TMC5130TypeDef *tmc5130)
uint8_t tmc5130_reset(TMC5130TypeDef *tmc5130)
uint8_t tmc5130_restore(TMC5130TypeDef *tmc5130)
void tmc5130_setRegisterResetState(TMC5130TypeDef *tmc5130, const int32_t *resetState)
void tmc5130_setCallback(TMC5130TypeDef *tmc5130, tmc5130_callback callback)
static void writeConfiguration(TMC5130TypeDef *tmc5130)
void tmc5130_periodicJob(TMC5130TypeDef *tmc5130, uint32_t tick)
void tmc5130_rotate(TMC5130TypeDef *tmc5130, int32_t velocity)
void tmc5130_right(TMC5130TypeDef *tmc5130, uint32_t velocity)
void tmc5130_left(TMC5130TypeDef *tmc5130, uint32_t velocity)
void tmc5130_stop(TMC5130TypeDef *tmc5130)
void tmc5130_moveTo(TMC5130TypeDef *tmc5130, int32_t position, uint32_t velocityMax)
void tmc5130_moveBy(TMC5130TypeDef *tmc5130, int32_t *ticks, uint32_t velocityMax)
file TMC5130.h
#include “tmc/helpers/API_Header.h”
#include “TMC5130_Register.h”
#include “TMC5130_Constants.h”
#include “TMC5130_Fields.h”

Defines

TMC5130_FIELD_READ(tdef, address, mask, shift)
TMC5130_FIELD_WRITE(tdef, address, mask, shift, value)
R10
R3A
R6C

Typedefs

typedef void (*tmc5130_callback)(TMC5130TypeDef*, ConfigState)

Functions

void tmc5130_writeDatagram(TMC5130TypeDef *tmc5130, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc5130_writeInt(TMC5130TypeDef *tmc5130, uint8_t address, int32_t value)
int32_t tmc5130_readInt(TMC5130TypeDef *tmc5130, uint8_t address)
void tmc5130_init(TMC5130TypeDef *tmc5130, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
void tmc5130_fillShadowRegisters(TMC5130TypeDef *tmc5130)
uint8_t tmc5130_reset(TMC5130TypeDef *tmc5130)
uint8_t tmc5130_restore(TMC5130TypeDef *tmc5130)
void tmc5130_setRegisterResetState(TMC5130TypeDef *tmc5130, const int32_t *resetState)
void tmc5130_setCallback(TMC5130TypeDef *tmc5130, tmc5130_callback callback)
void tmc5130_periodicJob(TMC5130TypeDef *tmc5130, uint32_t tick)
void tmc5130_rotate(TMC5130TypeDef *tmc5130, int32_t velocity)
void tmc5130_right(TMC5130TypeDef *tmc5130, uint32_t velocity)
void tmc5130_left(TMC5130TypeDef *tmc5130, uint32_t velocity)
void tmc5130_stop(TMC5130TypeDef *tmc5130)
void tmc5130_moveTo(TMC5130TypeDef *tmc5130, int32_t position, uint32_t velocityMax)
void tmc5130_moveBy(TMC5130TypeDef *tmc5130, int32_t *ticks, uint32_t velocityMax)

Variables

static const int32_t tmc5130_defaultRegisterResetState[TMC5130_REGISTER_COUNT] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R3A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, R6C, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,}
static const uint8_t tmc5130_defaultRegisterAccess[TMC5130_REGISTER_COUNT] = {0x03, 0x21, 0x01, 0x02, 0x13, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, 0x02, 0x01, 0x02, 0x02, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x03, 0x03, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, ____, 0x02, 0x02, 0x02, 0x03, ____, ____, ____, ____, ____, 0x02, 0x03, 0x21, 0x01, ____, 0x03, 0x03, 0x02, 0x21, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x01, 0x01, 0x03, 0x02, 0x02, 0x01, 0x42, 0x01, 0x02, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const TMCRegisterConstant tmc5130_RegisterConstants[] = {{0x60, 0xAAAAB554}, {0x61, 0x4A9554AA}, {0x62, 0x24492929}, {0x63, 0x10104222}, {0x64, 0xFBFFFFFF}, {0x65, 0xB5BB777D}, {0x66, 0x49295556}, {0x67, 0x00404222}, {0x68, 0xFFFF8056}, {0x69, 0x00F70000}, {0x70, 0x00050480}}
file TMC5130_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC5130_REGISTER_COUNT
TMC5130_MOTORS
TMC5130_WRITE_BIT
TMC5130_ADDRESS_MASK
TMC5130_MAX_VELOCITY
TMC5130_MAX_ACCELERATION
TMC5130_MODE_POSITION
TMC5130_MODE_VELPOS
TMC5130_MODE_VELNEG
TMC5130_MODE_HOLD
TMC5130_SW_STOPL_ENABLE
TMC5130_SW_STOPR_ENABLE
TMC5130_SW_STOPL_POLARITY
TMC5130_SW_STOPR_POLARITY
TMC5130_SW_SWAP_LR
TMC5130_SW_LATCH_L_ACT
TMC5130_SW_LATCH_L_INACT
TMC5130_SW_LATCH_R_ACT
TMC5130_SW_LATCH_R_INACT
TMC5130_SW_LATCH_ENC
TMC5130_SW_SG_STOP
TMC5130_SW_SOFTSTOP
TMC5130_RS_STOPL
TMC5130_RS_STOPR
TMC5130_RS_LATCHL
TMC5130_RS_LATCHR
TMC5130_RS_EV_STOPL
TMC5130_RS_EV_STOPR
TMC5130_RS_EV_STOP_SG
TMC5130_RS_EV_POSREACHED
TMC5130_RS_VELREACHED
TMC5130_RS_POSREACHED
TMC5130_RS_VZERO
TMC5130_RS_ZEROWAIT
TMC5130_RS_SECONDMOVE
TMC5130_RS_SG
TMC5130_EM_DECIMAL
TMC5130_EM_LATCH_XACT
TMC5130_EM_CLR_XENC
TMC5130_EM_NEG_EDGE
TMC5130_EM_POS_EDGE
TMC5130_EM_CLR_ONCE
TMC5130_EM_CLR_CONT
TMC5130_EM_IGNORE_AB
TMC5130_EM_POL_N
TMC5130_EM_POL_B
TMC5130_EM_POL_A
file TMC5130_Fields.h

Defines

TMC5130_SW_STOPL_ENABLE_MASK
TMC5130_SW_STOPL_ENABLE_SHIFT
TMC5130_SW_STOPL_ENABLE_FIELD
TMC5130_SW_STOPR_ENABLE_MASK
TMC5130_SW_STOPR_ENABLE_SHIFT
TMC5130_SW_STOPR_ENABLE_FIELD
TMC5130_SW_STOPL_POLARITY_MASK
TMC5130_SW_STOPL_POLARITY_SHIFT
TMC5130_SW_STOPL_POLARITY_FIELD
TMC5130_SW_STOPR_POLARITY_MASK
TMC5130_SW_STOPR_POLARITY_SHIFT
TMC5130_SW_STOPR_POLARITY_FIELD
TMC5130_SW_SWAP_LR_MASK
TMC5130_SW_SWAP_LR_SHIFT
TMC5130_SW_SWAP_LR_FIELD
TMC5130_SW_LATCH_L_ACT_MASK
TMC5130_SW_LATCH_L_ACT_SHIFT
TMC5130_SW_LATCH_L_ACT_FIELD
TMC5130_SW_LATCH_L_INACT_MASK
TMC5130_SW_LATCH_L_INACT_SHIFT
TMC5130_SW_LATCH_L_INACT_FIELD
TMC5130_SW_LATCH_R_ACT_MASK
TMC5130_SW_LATCH_R_ACT_SHIFT
TMC5130_SW_LATCH_R_ACT_FIELD
TMC5130_SW_LATCH_R_INACT_MASK
TMC5130_SW_LATCH_R_INACT_SHIFT
TMC5130_SW_LATCH_R_INACT_FIELD
TMC5130_SW_LATCH_ENC_MASK
TMC5130_SW_LATCH_ENC_SHIFT
TMC5130_SW_LATCH_ENC_FIELD
TMC5130_SW_SG_STOP_MASK
TMC5130_SW_SG_STOP_SHIFT
TMC5130_SW_SG_STOP_FIELD
TMC5130_SW_SOFTSTOP_MASK
TMC5130_SW_SOFTSTOP_SHIFT
TMC5130_SW_SOFTSTOP_FIELD
TMC5130_RS_STOPL_MASK
TMC5130_RS_STOPL_SHIFT
TMC5130_RS_STOPL_FIELD
TMC5130_RS_STOPR_MASK
TMC5130_RS_STOPR_SHIFT
TMC5130_RS_STOPR_FIELD
TMC5130_RS_LATCHL_MASK
TMC5130_RS_LATCHL_SHIFT
TMC5130_RS_LATCHL_FIELD
TMC5130_RS_LATCHR_MASK
TMC5130_RS_LATCHR_SHIFT
TMC5130_RS_LATCHR_FIELD
TMC5130_RS_EV_STOPL_MASK
TMC5130_RS_EV_STOPL_SHIFT
TMC5130_RS_EV_STOPL_FIELD
TMC5130_RS_EV_STOPR_MASK
TMC5130_RS_EV_STOPR_SHIFT
TMC5130_RS_EV_STOPR_FIELD
TMC5130_RS_EV_STOP_SG_MASK
TMC5130_RS_EV_STOP_SG_SHIFT
TMC5130_RS_EV_STOP_SG_FIELD
TMC5130_RS_EV_POSREACHED_MASK
TMC5130_RS_EV_POSREACHED_SHIFT
TMC5130_RS_EV_POSREACHED_FIELD
TMC5130_RS_VELREACHED_MASK
TMC5130_RS_VELREACHED_SHIFT
TMC5130_RS_VELREACHED_FIELD
TMC5130_RS_POSREACHED_MASK
TMC5130_RS_POSREACHED_SHIFT
TMC5130_RS_POSREACHED_FIELD
TMC5130_RS_VZERO_MASK
TMC5130_RS_VZERO_SHIFT
TMC5130_RS_VZERO_FIELD
TMC5130_RS_ZEROWAIT_MASK
TMC5130_RS_ZEROWAIT_SHIFT
TMC5130_RS_ZEROWAIT_FIELD
TMC5130_RS_SECONDMOVE_MASK
TMC5130_RS_SECONDMOVE_SHIFT
TMC5130_RS_SECONDMOVE_FIELD
TMC5130_RS_SG_MASK
TMC5130_RS_SG_SHIFT
TMC5130_RS_SG_FIELD
TMC5130_I_SCALE_ANALOG_MASK
TMC5130_I_SCALE_ANALOG_SHIFT
TMC5130_I_SCALE_ANALOG_FIELD
TMC5130_INTERNAL_RSENSE_MASK
TMC5130_INTERNAL_RSENSE_SHIFT
TMC5130_INTERNAL_RSENSE_FIELD
TMC5130_EN_PWM_MODE_MASK
TMC5130_EN_PWM_MODE_SHIFT
TMC5130_EN_PWM_MODE_FIELD
TMC5130_ENC_COMMUTATION_MASK
TMC5130_ENC_COMMUTATION_SHIFT
TMC5130_ENC_COMMUTATION_FIELD
TMC5130_SHAFT_MASK
TMC5130_SHAFT_SHIFT
TMC5130_SHAFT_FIELD
TMC5130_DIAG0_ERROR_ONLY_WITH_SD_MODE1_MASK
TMC5130_DIAG0_ERROR_ONLY_WITH_SD_MODE1_SHIFT
TMC5130_DIAG0_ERROR_ONLY_WITH_SD_MODE1_FIELD
TMC5130_DIAG0_OTPW_ONLY_WITH_SD_MODE1_MASK
TMC5130_DIAG0_OTPW_ONLY_WITH_SD_MODE1_SHIFT
TMC5130_DIAG0_OTPW_ONLY_WITH_SD_MODE1_FIELD
TMC5130_DIAG0_STALL_MASK
TMC5130_DIAG0_STALL_SHIFT
TMC5130_DIAG0_STALL_FIELD
TMC5130_DIAG1_STALL_MASK
TMC5130_DIAG1_STALL_SHIFT
TMC5130_DIAG1_STALL_FIELD
TMC5130_DIAG1_INDEX_MASK
TMC5130_DIAG1_INDEX_SHIFT
TMC5130_DIAG1_INDEX_FIELD
TMC5130_DIAG1_ONSTATE_MASK
TMC5130_DIAG1_ONSTATE_SHIFT
TMC5130_DIAG1_ONSTATE_FIELD
TMC5130_DIAG1_STEPS_SKIPPED_MASK
TMC5130_DIAG1_STEPS_SKIPPED_SHIFT
TMC5130_DIAG1_STEPS_SKIPPED_FIELD
TMC5130_DIAG0_INT_PUSHPULL_MASK
TMC5130_DIAG0_INT_PUSHPULL_SHIFT
TMC5130_DIAG0_INT_PUSHPULL_FIELD
TMC5130_DIAG1_POSCOMP_PUSHPULL_MASK
TMC5130_DIAG1_POSCOMP_PUSHPULL_SHIFT
TMC5130_DIAG1_POSCOMP_PUSHPULL_FIELD
TMC5130_SMALL_HYSTERESIS_MASK
TMC5130_SMALL_HYSTERESIS_SHIFT
TMC5130_SMALL_HYSTERESIS_FIELD
TMC5130_STOP_ENABLE_MASK
TMC5130_STOP_ENABLE_SHIFT
TMC5130_STOP_ENABLE_FIELD
TMC5130_DIRECT_MODE_MASK
TMC5130_DIRECT_MODE_SHIFT
TMC5130_DIRECT_MODE_FIELD
TMC5130_TEST_MODE_MASK
TMC5130_TEST_MODE_SHIFT
TMC5130_TEST_MODE_FIELD
TMC5130_I_SCALE_ANALOG_MASK
TMC5130_I_SCALE_ANALOG_SHIFT
TMC5130_I_SCALE_ANALOG_FIELD
TMC5130_INTERNAL_RSENSE_MASK
TMC5130_INTERNAL_RSENSE_SHIFT
TMC5130_INTERNAL_RSENSE_FIELD
TMC5130_EN_PWM_MODE_MASK
TMC5130_EN_PWM_MODE_SHIFT
TMC5130_EN_PWM_MODE_FIELD
TMC5130_ENC_COMMUTATION_MASK
TMC5130_ENC_COMMUTATION_SHIFT
TMC5130_ENC_COMMUTATION_FIELD
TMC5130_SHAFT_MASK
TMC5130_SHAFT_SHIFT
TMC5130_SHAFT_FIELD
TMC5130_DIAG0_STEP_MASK
TMC5130_DIAG0_STEP_SHIFT
TMC5130_DIAG0_STEP_FIELD
TMC5130_DIAG1_DIR_MASK
TMC5130_DIAG1_DIR_SHIFT
TMC5130_DIAG1_DIR_FIELD
TMC5130_DIAG0_INT_PUSHPULL_MASK
TMC5130_DIAG0_INT_PUSHPULL_SHIFT
TMC5130_DIAG0_INT_PUSHPULL_FIELD
TMC5130_DIAG1_POSCOMP_PUSHPULL_MASK
TMC5130_DIAG1_POSCOMP_PUSHPULL_SHIFT
TMC5130_DIAG1_POSCOMP_PUSHPULL_FIELD
TMC5130_SMALL_HYSTERESIS_MASK
TMC5130_SMALL_HYSTERESIS_SHIFT
TMC5130_SMALL_HYSTERESIS_FIELD
TMC5130_STOP_ENABLE_MASK
TMC5130_STOP_ENABLE_SHIFT
TMC5130_STOP_ENABLE_FIELD
TMC5130_DIRECT_MODE_MASK
TMC5130_DIRECT_MODE_SHIFT
TMC5130_DIRECT_MODE_FIELD
TMC5130_TEST_MODE_MASK
TMC5130_TEST_MODE_SHIFT
TMC5130_TEST_MODE_FIELD
TMC5130_RESET_MASK
TMC5130_RESET_SHIFT
TMC5130_RESET_FIELD
TMC5130_DRV_ERR_MASK
TMC5130_DRV_ERR_SHIFT
TMC5130_DRV_ERR_FIELD
TMC5130_UV_CP_MASK
TMC5130_UV_CP_SHIFT
TMC5130_UV_CP_FIELD
TMC5130_IFCNT_MASK
TMC5130_IFCNT_SHIFT
TMC5130_IFCNT_FIELD
TMC5130_SLAVEADDR_MASK
TMC5130_SLAVEADDR_SHIFT
TMC5130_SLAVEADDR_FIELD
TMC5130_SENDDELAY_MASK
TMC5130_SENDDELAY_SHIFT
TMC5130_SENDDELAY_FIELD
TMC5130_REFL_STEP_MASK
TMC5130_REFL_STEP_SHIFT
TMC5130_REFL_STEP_FIELD
TMC5130_REFR_DIR_MASK
TMC5130_REFR_DIR_SHIFT
TMC5130_REFR_DIR_FIELD
TMC5130_ENCB_DCEN_CFG4_MASK
TMC5130_ENCB_DCEN_CFG4_SHIFT
TMC5130_ENCB_DCEN_CFG4_FIELD
TMC5130_ENCA_DCIN_CFG5_MASK
TMC5130_ENCA_DCIN_CFG5_SHIFT
TMC5130_ENCA_DCIN_CFG5_FIELD
TMC5130_DRV_ENN_CFG6_MASK
TMC5130_DRV_ENN_CFG6_SHIFT
TMC5130_DRV_ENN_CFG6_FIELD
TMC5130_ENC_N_DCO_MASK
TMC5130_ENC_N_DCO_SHIFT
TMC5130_ENC_N_DCO_FIELD
TMC5130_SD_MODE_MASK
TMC5130_SD_MODE_SHIFT
TMC5130_SD_MODE_FIELD
TMC5130_SWCOMP_IN_MASK
TMC5130_SWCOMP_IN_SHIFT
TMC5130_SWCOMP_IN_FIELD
TMC5130_VERSION_MASK
TMC5130_VERSION_SHIFT
TMC5130_VERSION_FIELD
TMC5130_OUTPUT_PIN_POLARITY_MASK
TMC5130_OUTPUT_PIN_POLARITY_SHIFT
TMC5130_OUTPUT_PIN_POLARITY_FIELD
TMC5130_X_COMPARE_MASK
TMC5130_X_COMPARE_SHIFT
TMC5130_X_COMPARE_FIELD
TMC5130_IHOLD_MASK
TMC5130_IHOLD_SHIFT
TMC5130_IHOLD_FIELD
TMC5130_IRUN_MASK
TMC5130_IRUN_SHIFT
TMC5130_IRUN_FIELD
TMC5130_IHOLDDELAY_MASK
TMC5130_IHOLDDELAY_SHIFT
TMC5130_IHOLDDELAY_FIELD
TMC5130_TPOWERDOWN_MASK
TMC5130_TPOWERDOWN_SHIFT
TMC5130_TPOWERDOWN_FIELD
TMC5130_TSTEP_MASK
TMC5130_TSTEP_SHIFT
TMC5130_TSTEP_FIELD
TMC5130_TPWMTHRS_MASK
TMC5130_TPWMTHRS_SHIFT
TMC5130_TPWMTHRS_FIELD
TMC5130_TCOOLTHRS_MASK
TMC5130_TCOOLTHRS_SHIFT
TMC5130_TCOOLTHRS_FIELD
TMC5130_THIGH_MASK
TMC5130_THIGH_SHIFT
TMC5130_THIGH_FIELD
TMC5130_RAMPMODE_MASK
TMC5130_RAMPMODE_SHIFT
TMC5130_RAMPMODE_FIELD
TMC5130_XACTUAL_MASK
TMC5130_XACTUAL_SHIFT
TMC5130_XACTUAL_FIELD
TMC5130_VACTUAL_MASK
TMC5130_VACTUAL_SHIFT
TMC5130_VACTUAL_FIELD
TMC5130_VSTART_MASK
TMC5130_VSTART_SHIFT
TMC5130_VSTART_FIELD
TMC5130_A1_MASK
TMC5130_A1_SHIFT
TMC5130_A1_FIELD
TMC5130_V1_MASK
TMC5130_V1_SHIFT
TMC5130_V1_FIELD
TMC5130_AMAX_MASK
TMC5130_AMAX_SHIFT
TMC5130_AMAX_FIELD
TMC5130_VMAX_MASK
TMC5130_VMAX_SHIFT
TMC5130_VMAX_FIELD
TMC5130_DMAX_MASK
TMC5130_DMAX_SHIFT
TMC5130_DMAX_FIELD
TMC5130_D1_MASK
TMC5130_D1_SHIFT
TMC5130_D1_FIELD
TMC5130_VSTOP_MASK
TMC5130_VSTOP_SHIFT
TMC5130_VSTOP_FIELD
TMC5130_TZEROWAIT_MASK
TMC5130_TZEROWAIT_SHIFT
TMC5130_TZEROWAIT_FIELD
TMC5130_XTARGET_MASK
TMC5130_XTARGET_SHIFT
TMC5130_XTARGET_FIELD
TMC5130_VDCMIN_MASK
TMC5130_VDCMIN_SHIFT
TMC5130_VDCMIN_FIELD
TMC5130_STOP_L_ENABLE_MASK
TMC5130_STOP_L_ENABLE_SHIFT
TMC5130_STOP_L_ENABLE_FIELD
TMC5130_STOP_R_ENABLE_MASK
TMC5130_STOP_R_ENABLE_SHIFT
TMC5130_STOP_R_ENABLE_FIELD
TMC5130_POL_STOP_L_MASK
TMC5130_POL_STOP_L_SHIFT
TMC5130_POL_STOP_L_FIELD
TMC5130_POL_STOP_R_MASK
TMC5130_POL_STOP_R_SHIFT
TMC5130_POL_STOP_R_FIELD
TMC5130_SWAP_LR_MASK
TMC5130_SWAP_LR_SHIFT
TMC5130_SWAP_LR_FIELD
TMC5130_LATCH_L_ACTIVE_MASK
TMC5130_LATCH_L_ACTIVE_SHIFT
TMC5130_LATCH_L_ACTIVE_FIELD
TMC5130_LATCH_L_INACTIVE_MASK
TMC5130_LATCH_L_INACTIVE_SHIFT
TMC5130_LATCH_L_INACTIVE_FIELD
TMC5130_LATCH_R_ACTIVE_MASK
TMC5130_LATCH_R_ACTIVE_SHIFT
TMC5130_LATCH_R_ACTIVE_FIELD
TMC5130_LATCH_R_INACTIVE_MASK
TMC5130_LATCH_R_INACTIVE_SHIFT
TMC5130_LATCH_R_INACTIVE_FIELD
TMC5130_EN_LATCH_ENCODER_MASK
TMC5130_EN_LATCH_ENCODER_SHIFT
TMC5130_EN_LATCH_ENCODER_FIELD
TMC5130_SG_STOP_MASK
TMC5130_SG_STOP_SHIFT
TMC5130_SG_STOP_FIELD
TMC5130_EN_SOFTSTOP_MASK
TMC5130_EN_SOFTSTOP_SHIFT
TMC5130_EN_SOFTSTOP_FIELD
TMC5130_STATUS_STOP_L_MASK
TMC5130_STATUS_STOP_L_SHIFT
TMC5130_STATUS_STOP_L_FIELD
TMC5130_STATUS_STOP_R_MASK
TMC5130_STATUS_STOP_R_SHIFT
TMC5130_STATUS_STOP_R_FIELD
TMC5130_STATUS_LATCH_L_MASK
TMC5130_STATUS_LATCH_L_SHIFT
TMC5130_STATUS_LATCH_L_FIELD
TMC5130_STATUS_LATCH_R_MASK
TMC5130_STATUS_LATCH_R_SHIFT
TMC5130_STATUS_LATCH_R_FIELD
TMC5130_EVENT_STOP_L_MASK
TMC5130_EVENT_STOP_L_SHIFT
TMC5130_EVENT_STOP_L_FIELD
TMC5130_EVENT_STOP_R_MASK
TMC5130_EVENT_STOP_R_SHIFT
TMC5130_EVENT_STOP_R_FIELD
TMC5130_EVENT_STOP_SG_MASK
TMC5130_EVENT_STOP_SG_SHIFT
TMC5130_EVENT_STOP_SG_FIELD
TMC5130_EVENT_POS_REACHED_MASK
TMC5130_EVENT_POS_REACHED_SHIFT
TMC5130_EVENT_POS_REACHED_FIELD
TMC5130_VELOCITY_REACHED_MASK
TMC5130_VELOCITY_REACHED_SHIFT
TMC5130_VELOCITY_REACHED_FIELD
TMC5130_POSITION_REACHED_MASK
TMC5130_POSITION_REACHED_SHIFT
TMC5130_POSITION_REACHED_FIELD
TMC5130_VZERO_MASK
TMC5130_VZERO_SHIFT
TMC5130_VZERO_FIELD
TMC5130_T_ZEROWAIT_ACTIVE_MASK
TMC5130_T_ZEROWAIT_ACTIVE_SHIFT
TMC5130_T_ZEROWAIT_ACTIVE_FIELD
TMC5130_SECOND_MOVE_MASK
TMC5130_SECOND_MOVE_SHIFT
TMC5130_SECOND_MOVE_FIELD
TMC5130_STATUS_SG_MASK
TMC5130_STATUS_SG_SHIFT
TMC5130_STATUS_SG_FIELD
TMC5130_XLATCH_MASK
TMC5130_XLATCH_SHIFT
TMC5130_XLATCH_FIELD
TMC5130_POL_A_MASK
TMC5130_POL_A_SHIFT
TMC5130_POL_A_FIELD
TMC5130_POL_B_MASK
TMC5130_POL_B_SHIFT
TMC5130_POL_B_FIELD
TMC5130_POL_N_MASK
TMC5130_POL_N_SHIFT
TMC5130_POL_N_FIELD
TMC5130_IGNORE_AB_MASK
TMC5130_IGNORE_AB_SHIFT
TMC5130_IGNORE_AB_FIELD
TMC5130_CLR_CONT_MASK
TMC5130_CLR_CONT_SHIFT
TMC5130_CLR_CONT_FIELD
TMC5130_CLR_ONCE_MASK
TMC5130_CLR_ONCE_SHIFT
TMC5130_CLR_ONCE_FIELD
TMC5130_POS_EDGENEG_EDGE_MASK
TMC5130_POS_EDGENEG_EDGE_SHIFT
TMC5130_POS_EDGENEG_EDGE_FIELD
TMC5130_CLR_ENC_X_MASK
TMC5130_CLR_ENC_X_SHIFT
TMC5130_CLR_ENC_X_FIELD
TMC5130_LATCH_X_ACT_MASK
TMC5130_LATCH_X_ACT_SHIFT
TMC5130_LATCH_X_ACT_FIELD
TMC5130_ENC_SEL_DECIMAL_MASK
TMC5130_ENC_SEL_DECIMAL_SHIFT
TMC5130_ENC_SEL_DECIMAL_FIELD
TMC5130_X_ENC_MASK
TMC5130_X_ENC_SHIFT
TMC5130_X_ENC_FIELD
TMC5130_INTEGER_MASK
TMC5130_INTEGER_SHIFT
TMC5130_INTEGER_FIELD
TMC5130_FRACTIONAL_MASK
TMC5130_FRACTIONAL_SHIFT
TMC5130_FRACTIONAL_FIELD
TMC5130_ENC_STATUS_MASK
TMC5130_ENC_STATUS_SHIFT
TMC5130_ENC_STATUS_FIELD
TMC5130_ENC_LATCH_MASK
TMC5130_ENC_LATCH_SHIFT
TMC5130_ENC_LATCH_FIELD
TMC5130_OFS0_MASK
TMC5130_OFS0_SHIFT
TMC5130_OFS0_FIELD
TMC5130_OFS1_MASK
TMC5130_OFS1_SHIFT
TMC5130_OFS1_FIELD
TMC5130_OFS2_MASK
TMC5130_OFS2_SHIFT
TMC5130_OFS2_FIELD
TMC5130_OFS3_MASK
TMC5130_OFS3_SHIFT
TMC5130_OFS3_FIELD
TMC5130_OFS4_MASK
TMC5130_OFS4_SHIFT
TMC5130_OFS4_FIELD
TMC5130_OFS5_MASK
TMC5130_OFS5_SHIFT
TMC5130_OFS5_FIELD
TMC5130_OFS6_MASK
TMC5130_OFS6_SHIFT
TMC5130_OFS6_FIELD
TMC5130_OFS7_MASK
TMC5130_OFS7_SHIFT
TMC5130_OFS7_FIELD
TMC5130_OFS8_MASK
TMC5130_OFS8_SHIFT
TMC5130_OFS8_FIELD
TMC5130_OFS9_MASK
TMC5130_OFS9_SHIFT
TMC5130_OFS9_FIELD
TMC5130_OFS10_MASK
TMC5130_OFS10_SHIFT
TMC5130_OFS10_FIELD
TMC5130_OFS11_MASK
TMC5130_OFS11_SHIFT
TMC5130_OFS11_FIELD
TMC5130_OFS12_MASK
TMC5130_OFS12_SHIFT
TMC5130_OFS12_FIELD
TMC5130_OFS13_MASK
TMC5130_OFS13_SHIFT
TMC5130_OFS13_FIELD
TMC5130_OFS14_MASK
TMC5130_OFS14_SHIFT
TMC5130_OFS14_FIELD
TMC5130_OFS15_MASK
TMC5130_OFS15_SHIFT
TMC5130_OFS15_FIELD
TMC5130_OFS16_MASK
TMC5130_OFS16_SHIFT
TMC5130_OFS16_FIELD
TMC5130_OFS17_MASK
TMC5130_OFS17_SHIFT
TMC5130_OFS17_FIELD
TMC5130_OFS18_MASK
TMC5130_OFS18_SHIFT
TMC5130_OFS18_FIELD
TMC5130_OFS19_MASK
TMC5130_OFS19_SHIFT
TMC5130_OFS19_FIELD
TMC5130_OFS20_MASK
TMC5130_OFS20_SHIFT
TMC5130_OFS20_FIELD
TMC5130_OFS21_MASK
TMC5130_OFS21_SHIFT
TMC5130_OFS21_FIELD
TMC5130_OFS22_MASK
TMC5130_OFS22_SHIFT
TMC5130_OFS22_FIELD
TMC5130_OFS23_MASK
TMC5130_OFS23_SHIFT
TMC5130_OFS23_FIELD
TMC5130_OFS24_MASK
TMC5130_OFS24_SHIFT
TMC5130_OFS24_FIELD
TMC5130_OFS25_MASK
TMC5130_OFS25_SHIFT
TMC5130_OFS25_FIELD
TMC5130_OFS26_MASK
TMC5130_OFS26_SHIFT
TMC5130_OFS26_FIELD
TMC5130_OFS27_MASK
TMC5130_OFS27_SHIFT
TMC5130_OFS27_FIELD
TMC5130_OFS28_MASK
TMC5130_OFS28_SHIFT
TMC5130_OFS28_FIELD
TMC5130_OFS29_MASK
TMC5130_OFS29_SHIFT
TMC5130_OFS29_FIELD
TMC5130_OFS30_MASK
TMC5130_OFS30_SHIFT
TMC5130_OFS30_FIELD
TMC5130_OFS31_MASK
TMC5130_OFS31_SHIFT
TMC5130_OFS31_FIELD
TMC5130_OFS32_MASK
TMC5130_OFS32_SHIFT
TMC5130_OFS32_FIELD
TMC5130_OFS33_MASK
TMC5130_OFS33_SHIFT
TMC5130_OFS33_FIELD
TMC5130_OFS34_MASK
TMC5130_OFS34_SHIFT
TMC5130_OFS34_FIELD
TMC5130_OFS35_MASK
TMC5130_OFS35_SHIFT
TMC5130_OFS35_FIELD
TMC5130_OFS36_MASK
TMC5130_OFS36_SHIFT
TMC5130_OFS36_FIELD
TMC5130_OFS37_MASK
TMC5130_OFS37_SHIFT
TMC5130_OFS37_FIELD
TMC5130_OFS38_MASK
TMC5130_OFS38_SHIFT
TMC5130_OFS38_FIELD
TMC5130_OFS39_MASK
TMC5130_OFS39_SHIFT
TMC5130_OFS39_FIELD
TMC5130_OFS40_MASK
TMC5130_OFS40_SHIFT
TMC5130_OFS40_FIELD
TMC5130_OFS41_MASK
TMC5130_OFS41_SHIFT
TMC5130_OFS41_FIELD
TMC5130_OFS42_MASK
TMC5130_OFS42_SHIFT
TMC5130_OFS42_FIELD
TMC5130_OFS43_MASK
TMC5130_OFS43_SHIFT
TMC5130_OFS43_FIELD
TMC5130_OFS44_MASK
TMC5130_OFS44_SHIFT
TMC5130_OFS44_FIELD
TMC5130_OFS45_MASK
TMC5130_OFS45_SHIFT
TMC5130_OFS45_FIELD
TMC5130_OFS46_MASK
TMC5130_OFS46_SHIFT
TMC5130_OFS46_FIELD
TMC5130_OFS47_MASK
TMC5130_OFS47_SHIFT
TMC5130_OFS47_FIELD
TMC5130_OFS48_MASK
TMC5130_OFS48_SHIFT
TMC5130_OFS48_FIELD
TMC5130_OFS49_MASK
TMC5130_OFS49_SHIFT
TMC5130_OFS49_FIELD
TMC5130_OFS50_MASK
TMC5130_OFS50_SHIFT
TMC5130_OFS50_FIELD
TMC5130_OFS51_MASK
TMC5130_OFS51_SHIFT
TMC5130_OFS51_FIELD
TMC5130_OFS52_MASK
TMC5130_OFS52_SHIFT
TMC5130_OFS52_FIELD
TMC5130_OFS53_MASK
TMC5130_OFS53_SHIFT
TMC5130_OFS53_FIELD
TMC5130_OFS54_MASK
TMC5130_OFS54_SHIFT
TMC5130_OFS54_FIELD
TMC5130_OFS55_MASK
TMC5130_OFS55_SHIFT
TMC5130_OFS55_FIELD
TMC5130_OFS56_MASK
TMC5130_OFS56_SHIFT
TMC5130_OFS56_FIELD
TMC5130_OFS57_MASK
TMC5130_OFS57_SHIFT
TMC5130_OFS57_FIELD
TMC5130_OFS58_MASK
TMC5130_OFS58_SHIFT
TMC5130_OFS58_FIELD
TMC5130_OFS59_MASK
TMC5130_OFS59_SHIFT
TMC5130_OFS59_FIELD
TMC5130_OFS60_MASK
TMC5130_OFS60_SHIFT
TMC5130_OFS60_FIELD
TMC5130_OFS61_MASK
TMC5130_OFS61_SHIFT
TMC5130_OFS61_FIELD
TMC5130_OFS62_MASK
TMC5130_OFS62_SHIFT
TMC5130_OFS62_FIELD
TMC5130_OFS63_MASK
TMC5130_OFS63_SHIFT
TMC5130_OFS63_FIELD
TMC5130_OFS64_MASK
TMC5130_OFS64_SHIFT
TMC5130_OFS64_FIELD
TMC5130_OFS65_MASK
TMC5130_OFS65_SHIFT
TMC5130_OFS65_FIELD
TMC5130_OFS66_MASK
TMC5130_OFS66_SHIFT
TMC5130_OFS66_FIELD
TMC5130_OFS67_MASK
TMC5130_OFS67_SHIFT
TMC5130_OFS67_FIELD
TMC5130_OFS68_MASK
TMC5130_OFS68_SHIFT
TMC5130_OFS68_FIELD
TMC5130_OFS69_MASK
TMC5130_OFS69_SHIFT
TMC5130_OFS69_FIELD
TMC5130_OFS70_MASK
TMC5130_OFS70_SHIFT
TMC5130_OFS70_FIELD
TMC5130_OFS71_MASK
TMC5130_OFS71_SHIFT
TMC5130_OFS71_FIELD
TMC5130_OFS72_MASK
TMC5130_OFS72_SHIFT
TMC5130_OFS72_FIELD
TMC5130_OFS73_MASK
TMC5130_OFS73_SHIFT
TMC5130_OFS73_FIELD
TMC5130_OFS74_MASK
TMC5130_OFS74_SHIFT
TMC5130_OFS74_FIELD
TMC5130_OFS75_MASK
TMC5130_OFS75_SHIFT
TMC5130_OFS75_FIELD
TMC5130_OFS76_MASK
TMC5130_OFS76_SHIFT
TMC5130_OFS76_FIELD
TMC5130_OFS77_MASK
TMC5130_OFS77_SHIFT
TMC5130_OFS77_FIELD
TMC5130_OFS78_MASK
TMC5130_OFS78_SHIFT
TMC5130_OFS78_FIELD
TMC5130_OFS79_MASK
TMC5130_OFS79_SHIFT
TMC5130_OFS79_FIELD
TMC5130_OFS80_MASK
TMC5130_OFS80_SHIFT
TMC5130_OFS80_FIELD
TMC5130_OFS81_MASK
TMC5130_OFS81_SHIFT
TMC5130_OFS81_FIELD
TMC5130_OFS82_MASK
TMC5130_OFS82_SHIFT
TMC5130_OFS82_FIELD
TMC5130_OFS83_MASK
TMC5130_OFS83_SHIFT
TMC5130_OFS83_FIELD
TMC5130_OFS84_MASK
TMC5130_OFS84_SHIFT
TMC5130_OFS84_FIELD
TMC5130_OFS85_MASK
TMC5130_OFS85_SHIFT
TMC5130_OFS85_FIELD
TMC5130_OFS86_MASK
TMC5130_OFS86_SHIFT
TMC5130_OFS86_FIELD
TMC5130_OFS87_MASK
TMC5130_OFS87_SHIFT
TMC5130_OFS87_FIELD
TMC5130_OFS88_MASK
TMC5130_OFS88_SHIFT
TMC5130_OFS88_FIELD
TMC5130_OFS89_MASK
TMC5130_OFS89_SHIFT
TMC5130_OFS89_FIELD
TMC5130_OFS90_MASK
TMC5130_OFS90_SHIFT
TMC5130_OFS90_FIELD
TMC5130_OFS91_MASK
TMC5130_OFS91_SHIFT
TMC5130_OFS91_FIELD
TMC5130_OFS92_MASK
TMC5130_OFS92_SHIFT
TMC5130_OFS92_FIELD
TMC5130_OFS93_MASK
TMC5130_OFS93_SHIFT
TMC5130_OFS93_FIELD
TMC5130_OFS94_MASK
TMC5130_OFS94_SHIFT
TMC5130_OFS94_FIELD
TMC5130_OFS95_MASK
TMC5130_OFS95_SHIFT
TMC5130_OFS95_FIELD
TMC5130_OFS96_MASK
TMC5130_OFS96_SHIFT
TMC5130_OFS96_FIELD
TMC5130_OFS97_MASK
TMC5130_OFS97_SHIFT
TMC5130_OFS97_FIELD
TMC5130_OFS98_MASK
TMC5130_OFS98_SHIFT
TMC5130_OFS98_FIELD
TMC5130_OFS99_MASK
TMC5130_OFS99_SHIFT
TMC5130_OFS99_FIELD
TMC5130_OFS100_MASK
TMC5130_OFS100_SHIFT
TMC5130_OFS100_FIELD
TMC5130_OFS101_MASK
TMC5130_OFS101_SHIFT
TMC5130_OFS101_FIELD
TMC5130_OFS102_MASK
TMC5130_OFS102_SHIFT
TMC5130_OFS102_FIELD
TMC5130_OFS103_MASK
TMC5130_OFS103_SHIFT
TMC5130_OFS103_FIELD
TMC5130_OFS104_MASK
TMC5130_OFS104_SHIFT
TMC5130_OFS104_FIELD
TMC5130_OFS105_MASK
TMC5130_OFS105_SHIFT
TMC5130_OFS105_FIELD
TMC5130_OFS106_MASK
TMC5130_OFS106_SHIFT
TMC5130_OFS106_FIELD
TMC5130_OFS107_MASK
TMC5130_OFS107_SHIFT
TMC5130_OFS107_FIELD
TMC5130_OFS108_MASK
TMC5130_OFS108_SHIFT
TMC5130_OFS108_FIELD
TMC5130_OFS109_MASK
TMC5130_OFS109_SHIFT
TMC5130_OFS109_FIELD
TMC5130_OFS110_MASK
TMC5130_OFS110_SHIFT
TMC5130_OFS110_FIELD
TMC5130_OFS111_MASK
TMC5130_OFS111_SHIFT
TMC5130_OFS111_FIELD
TMC5130_OFS112_MASK
TMC5130_OFS112_SHIFT
TMC5130_OFS112_FIELD
TMC5130_OFS113_MASK
TMC5130_OFS113_SHIFT
TMC5130_OFS113_FIELD
TMC5130_OFS114_MASK
TMC5130_OFS114_SHIFT
TMC5130_OFS114_FIELD
TMC5130_OFS115_MASK
TMC5130_OFS115_SHIFT
TMC5130_OFS115_FIELD
TMC5130_OFS116_MASK
TMC5130_OFS116_SHIFT
TMC5130_OFS116_FIELD
TMC5130_OFS117_MASK
TMC5130_OFS117_SHIFT
TMC5130_OFS117_FIELD
TMC5130_OFS118_MASK
TMC5130_OFS118_SHIFT
TMC5130_OFS118_FIELD
TMC5130_OFS119_MASK
TMC5130_OFS119_SHIFT
TMC5130_OFS119_FIELD
TMC5130_OFS120_MASK
TMC5130_OFS120_SHIFT
TMC5130_OFS120_FIELD
TMC5130_OFS121_MASK
TMC5130_OFS121_SHIFT
TMC5130_OFS121_FIELD
TMC5130_OFS122_MASK
TMC5130_OFS122_SHIFT
TMC5130_OFS122_FIELD
TMC5130_OFS123_MASK
TMC5130_OFS123_SHIFT
TMC5130_OFS123_FIELD
TMC5130_OFS124_MASK
TMC5130_OFS124_SHIFT
TMC5130_OFS124_FIELD
TMC5130_OFS125_MASK
TMC5130_OFS125_SHIFT
TMC5130_OFS125_FIELD
TMC5130_OFS126_MASK
TMC5130_OFS126_SHIFT
TMC5130_OFS126_FIELD
TMC5130_OFS127_MASK
TMC5130_OFS127_SHIFT
TMC5130_OFS127_FIELD
TMC5130_OFS128_MASK
TMC5130_OFS128_SHIFT
TMC5130_OFS128_FIELD
TMC5130_OFS129_MASK
TMC5130_OFS129_SHIFT
TMC5130_OFS129_FIELD
TMC5130_OFS130_MASK
TMC5130_OFS130_SHIFT
TMC5130_OFS130_FIELD
TMC5130_OFS131_MASK
TMC5130_OFS131_SHIFT
TMC5130_OFS131_FIELD
TMC5130_OFS132_MASK
TMC5130_OFS132_SHIFT
TMC5130_OFS132_FIELD
TMC5130_OFS133_MASK
TMC5130_OFS133_SHIFT
TMC5130_OFS133_FIELD
TMC5130_OFS134_MASK
TMC5130_OFS134_SHIFT
TMC5130_OFS134_FIELD
TMC5130_OFS135_MASK
TMC5130_OFS135_SHIFT
TMC5130_OFS135_FIELD
TMC5130_OFS136_MASK
TMC5130_OFS136_SHIFT
TMC5130_OFS136_FIELD
TMC5130_OFS137_MASK
TMC5130_OFS137_SHIFT
TMC5130_OFS137_FIELD
TMC5130_OFS138_MASK
TMC5130_OFS138_SHIFT
TMC5130_OFS138_FIELD
TMC5130_OFS139_MASK
TMC5130_OFS139_SHIFT
TMC5130_OFS139_FIELD
TMC5130_OFS140_MASK
TMC5130_OFS140_SHIFT
TMC5130_OFS140_FIELD
TMC5130_OFS141_MASK
TMC5130_OFS141_SHIFT
TMC5130_OFS141_FIELD
TMC5130_OFS142_MASK
TMC5130_OFS142_SHIFT
TMC5130_OFS142_FIELD
TMC5130_OFS143_MASK
TMC5130_OFS143_SHIFT
TMC5130_OFS143_FIELD
TMC5130_OFS144_MASK
TMC5130_OFS144_SHIFT
TMC5130_OFS144_FIELD
TMC5130_OFS145_MASK
TMC5130_OFS145_SHIFT
TMC5130_OFS145_FIELD
TMC5130_OFS146_MASK
TMC5130_OFS146_SHIFT
TMC5130_OFS146_FIELD
TMC5130_OFS147_MASK
TMC5130_OFS147_SHIFT
TMC5130_OFS147_FIELD
TMC5130_OFS148_MASK
TMC5130_OFS148_SHIFT
TMC5130_OFS148_FIELD
TMC5130_OFS149_MASK
TMC5130_OFS149_SHIFT
TMC5130_OFS149_FIELD
TMC5130_OFS150_MASK
TMC5130_OFS150_SHIFT
TMC5130_OFS150_FIELD
TMC5130_OFS151_MASK
TMC5130_OFS151_SHIFT
TMC5130_OFS151_FIELD
TMC5130_OFS152_MASK
TMC5130_OFS152_SHIFT
TMC5130_OFS152_FIELD
TMC5130_OFS153_MASK
TMC5130_OFS153_SHIFT
TMC5130_OFS153_FIELD
TMC5130_OFS154_MASK
TMC5130_OFS154_SHIFT
TMC5130_OFS154_FIELD
TMC5130_OFS155_MASK
TMC5130_OFS155_SHIFT
TMC5130_OFS155_FIELD
TMC5130_OFS156_MASK
TMC5130_OFS156_SHIFT
TMC5130_OFS156_FIELD
TMC5130_OFS157_MASK
TMC5130_OFS157_SHIFT
TMC5130_OFS157_FIELD
TMC5130_OFS158_MASK
TMC5130_OFS158_SHIFT
TMC5130_OFS158_FIELD
TMC5130_OFS159_MASK
TMC5130_OFS159_SHIFT
TMC5130_OFS159_FIELD
TMC5130_OFS160_MASK
TMC5130_OFS160_SHIFT
TMC5130_OFS160_FIELD
TMC5130_OFS161_MASK
TMC5130_OFS161_SHIFT
TMC5130_OFS161_FIELD
TMC5130_OFS162_MASK
TMC5130_OFS162_SHIFT
TMC5130_OFS162_FIELD
TMC5130_OFS163_MASK
TMC5130_OFS163_SHIFT
TMC5130_OFS163_FIELD
TMC5130_OFS164_MASK
TMC5130_OFS164_SHIFT
TMC5130_OFS164_FIELD
TMC5130_OFS165_MASK
TMC5130_OFS165_SHIFT
TMC5130_OFS165_FIELD
TMC5130_OFS166_MASK
TMC5130_OFS166_SHIFT
TMC5130_OFS166_FIELD
TMC5130_OFS167_MASK
TMC5130_OFS167_SHIFT
TMC5130_OFS167_FIELD
TMC5130_OFS168_MASK
TMC5130_OFS168_SHIFT
TMC5130_OFS168_FIELD
TMC5130_OFS169_MASK
TMC5130_OFS169_SHIFT
TMC5130_OFS169_FIELD
TMC5130_OFS170_MASK
TMC5130_OFS170_SHIFT
TMC5130_OFS170_FIELD
TMC5130_OFS171_MASK
TMC5130_OFS171_SHIFT
TMC5130_OFS171_FIELD
TMC5130_OFS172_MASK
TMC5130_OFS172_SHIFT
TMC5130_OFS172_FIELD
TMC5130_OFS173_MASK
TMC5130_OFS173_SHIFT
TMC5130_OFS173_FIELD
TMC5130_OFS174_MASK
TMC5130_OFS174_SHIFT
TMC5130_OFS174_FIELD
TMC5130_OFS175_MASK
TMC5130_OFS175_SHIFT
TMC5130_OFS175_FIELD
TMC5130_OFS176_MASK
TMC5130_OFS176_SHIFT
TMC5130_OFS176_FIELD
TMC5130_OFS177_MASK
TMC5130_OFS177_SHIFT
TMC5130_OFS177_FIELD
TMC5130_OFS178_MASK
TMC5130_OFS178_SHIFT
TMC5130_OFS178_FIELD
TMC5130_OFS179_MASK
TMC5130_OFS179_SHIFT
TMC5130_OFS179_FIELD
TMC5130_OFS180_MASK
TMC5130_OFS180_SHIFT
TMC5130_OFS180_FIELD
TMC5130_OFS181_MASK
TMC5130_OFS181_SHIFT
TMC5130_OFS181_FIELD
TMC5130_OFS182_MASK
TMC5130_OFS182_SHIFT
TMC5130_OFS182_FIELD
TMC5130_OFS183_MASK
TMC5130_OFS183_SHIFT
TMC5130_OFS183_FIELD
TMC5130_OFS184_MASK
TMC5130_OFS184_SHIFT
TMC5130_OFS184_FIELD
TMC5130_OFS185_MASK
TMC5130_OFS185_SHIFT
TMC5130_OFS185_FIELD
TMC5130_OFS186_MASK
TMC5130_OFS186_SHIFT
TMC5130_OFS186_FIELD
TMC5130_OFS187_MASK
TMC5130_OFS187_SHIFT
TMC5130_OFS187_FIELD
TMC5130_OFS188_MASK
TMC5130_OFS188_SHIFT
TMC5130_OFS188_FIELD
TMC5130_OFS189_MASK
TMC5130_OFS189_SHIFT
TMC5130_OFS189_FIELD
TMC5130_OFS190_MASK
TMC5130_OFS190_SHIFT
TMC5130_OFS190_FIELD
TMC5130_OFS191_MASK
TMC5130_OFS191_SHIFT
TMC5130_OFS191_FIELD
TMC5130_OFS192_MASK
TMC5130_OFS192_SHIFT
TMC5130_OFS192_FIELD
TMC5130_OFS193_MASK
TMC5130_OFS193_SHIFT
TMC5130_OFS193_FIELD
TMC5130_OFS194_MASK
TMC5130_OFS194_SHIFT
TMC5130_OFS194_FIELD
TMC5130_OFS195_MASK
TMC5130_OFS195_SHIFT
TMC5130_OFS195_FIELD
TMC5130_OFS196_MASK
TMC5130_OFS196_SHIFT
TMC5130_OFS196_FIELD
TMC5130_OFS197_MASK
TMC5130_OFS197_SHIFT
TMC5130_OFS197_FIELD
TMC5130_OFS198_MASK
TMC5130_OFS198_SHIFT
TMC5130_OFS198_FIELD
TMC5130_OFS199_MASK
TMC5130_OFS199_SHIFT
TMC5130_OFS199_FIELD
TMC5130_OFS200_MASK
TMC5130_OFS200_SHIFT
TMC5130_OFS200_FIELD
TMC5130_OFS201_MASK
TMC5130_OFS201_SHIFT
TMC5130_OFS201_FIELD
TMC5130_OFS202_MASK
TMC5130_OFS202_SHIFT
TMC5130_OFS202_FIELD
TMC5130_OFS203_MASK
TMC5130_OFS203_SHIFT
TMC5130_OFS203_FIELD
TMC5130_OFS204_MASK
TMC5130_OFS204_SHIFT
TMC5130_OFS204_FIELD
TMC5130_OFS205_MASK
TMC5130_OFS205_SHIFT
TMC5130_OFS205_FIELD
TMC5130_OFS206_MASK
TMC5130_OFS206_SHIFT
TMC5130_OFS206_FIELD
TMC5130_OFS207_MASK
TMC5130_OFS207_SHIFT
TMC5130_OFS207_FIELD
TMC5130_OFS208_MASK
TMC5130_OFS208_SHIFT
TMC5130_OFS208_FIELD
TMC5130_OFS209_MASK
TMC5130_OFS209_SHIFT
TMC5130_OFS209_FIELD
TMC5130_OFS210_MASK
TMC5130_OFS210_SHIFT
TMC5130_OFS210_FIELD
TMC5130_OFS211_MASK
TMC5130_OFS211_SHIFT
TMC5130_OFS211_FIELD
TMC5130_OFS212_MASK
TMC5130_OFS212_SHIFT
TMC5130_OFS212_FIELD
TMC5130_OFS213_MASK
TMC5130_OFS213_SHIFT
TMC5130_OFS213_FIELD
TMC5130_OFS214_MASK
TMC5130_OFS214_SHIFT
TMC5130_OFS214_FIELD
TMC5130_OFS215_MASK
TMC5130_OFS215_SHIFT
TMC5130_OFS215_FIELD
TMC5130_OFS216_MASK
TMC5130_OFS216_SHIFT
TMC5130_OFS216_FIELD
TMC5130_OFS217_MASK
TMC5130_OFS217_SHIFT
TMC5130_OFS217_FIELD
TMC5130_OFS218_MASK
TMC5130_OFS218_SHIFT
TMC5130_OFS218_FIELD
TMC5130_OFS219_MASK
TMC5130_OFS219_SHIFT
TMC5130_OFS219_FIELD
TMC5130_OFS220_MASK
TMC5130_OFS220_SHIFT
TMC5130_OFS220_FIELD
TMC5130_OFS221_MASK
TMC5130_OFS221_SHIFT
TMC5130_OFS221_FIELD
TMC5130_OFS222_MASK
TMC5130_OFS222_SHIFT
TMC5130_OFS222_FIELD
TMC5130_OFS223_MASK
TMC5130_OFS223_SHIFT
TMC5130_OFS223_FIELD
TMC5130_OFS224_MASK
TMC5130_OFS224_SHIFT
TMC5130_OFS224_FIELD
TMC5130_OFS225_MASK
TMC5130_OFS225_SHIFT
TMC5130_OFS225_FIELD
TMC5130_OFS226_MASK
TMC5130_OFS226_SHIFT
TMC5130_OFS226_FIELD
TMC5130_OFS227_MASK
TMC5130_OFS227_SHIFT
TMC5130_OFS227_FIELD
TMC5130_OFS228_MASK
TMC5130_OFS228_SHIFT
TMC5130_OFS228_FIELD
TMC5130_OFS229_MASK
TMC5130_OFS229_SHIFT
TMC5130_OFS229_FIELD
TMC5130_OFS230_MASK
TMC5130_OFS230_SHIFT
TMC5130_OFS230_FIELD
TMC5130_OFS231_MASK
TMC5130_OFS231_SHIFT
TMC5130_OFS231_FIELD
TMC5130_OFS232_MASK
TMC5130_OFS232_SHIFT
TMC5130_OFS232_FIELD
TMC5130_OFS233_MASK
TMC5130_OFS233_SHIFT
TMC5130_OFS233_FIELD
TMC5130_OFS234_MASK
TMC5130_OFS234_SHIFT
TMC5130_OFS234_FIELD
TMC5130_OFS235_MASK
TMC5130_OFS235_SHIFT
TMC5130_OFS235_FIELD
TMC5130_OFS236_MASK
TMC5130_OFS236_SHIFT
TMC5130_OFS236_FIELD
TMC5130_OFS237_MASK
TMC5130_OFS237_SHIFT
TMC5130_OFS237_FIELD
TMC5130_OFS238_MASK
TMC5130_OFS238_SHIFT
TMC5130_OFS238_FIELD
TMC5130_OFS239_MASK
TMC5130_OFS239_SHIFT
TMC5130_OFS239_FIELD
TMC5130_OFS240_MASK
TMC5130_OFS240_SHIFT
TMC5130_OFS240_FIELD
TMC5130_OFS241_MASK
TMC5130_OFS241_SHIFT
TMC5130_OFS241_FIELD
TMC5130_OFS242_MASK
TMC5130_OFS242_SHIFT
TMC5130_OFS242_FIELD
TMC5130_OFS243_MASK
TMC5130_OFS243_SHIFT
TMC5130_OFS243_FIELD
TMC5130_OFS244_MASK
TMC5130_OFS244_SHIFT
TMC5130_OFS244_FIELD
TMC5130_OFS245_MASK
TMC5130_OFS245_SHIFT
TMC5130_OFS245_FIELD
TMC5130_OFS246_MASK
TMC5130_OFS246_SHIFT
TMC5130_OFS246_FIELD
TMC5130_OFS247_MASK
TMC5130_OFS247_SHIFT
TMC5130_OFS247_FIELD
TMC5130_OFS248_MASK
TMC5130_OFS248_SHIFT
TMC5130_OFS248_FIELD
TMC5130_OFS249_MASK
TMC5130_OFS249_SHIFT
TMC5130_OFS249_FIELD
TMC5130_OFS250_MASK
TMC5130_OFS250_SHIFT
TMC5130_OFS250_FIELD
TMC5130_OFS251_MASK
TMC5130_OFS251_SHIFT
TMC5130_OFS251_FIELD
TMC5130_OFS252_MASK
TMC5130_OFS252_SHIFT
TMC5130_OFS252_FIELD
TMC5130_OFS253_MASK
TMC5130_OFS253_SHIFT
TMC5130_OFS253_FIELD
TMC5130_OFS254_MASK
TMC5130_OFS254_SHIFT
TMC5130_OFS254_FIELD
TMC5130_OFS255_MASK
TMC5130_OFS255_SHIFT
TMC5130_OFS255_FIELD
TMC5130_W0_MASK
TMC5130_W0_SHIFT
TMC5130_W0_FIELD
TMC5130_W1_MASK
TMC5130_W1_SHIFT
TMC5130_W1_FIELD
TMC5130_W2_MASK
TMC5130_W2_SHIFT
TMC5130_W2_FIELD
TMC5130_W3_MASK
TMC5130_W3_SHIFT
TMC5130_W3_FIELD
TMC5130_X1_MASK
TMC5130_X1_SHIFT
TMC5130_X1_FIELD
TMC5130_X2_MASK
TMC5130_X2_SHIFT
TMC5130_X2_FIELD
TMC5130_X3_MASK
TMC5130_X3_SHIFT
TMC5130_X3_FIELD
TMC5130_START_SIN_MASK
TMC5130_START_SIN_SHIFT
TMC5130_START_SIN_FIELD
TMC5130_START_SIN90_MASK
TMC5130_START_SIN90_SHIFT
TMC5130_START_SIN90_FIELD
TMC5130_MSCNT_MASK
TMC5130_MSCNT_SHIFT
TMC5130_MSCNT_FIELD
TMC5130_CUR_A_MASK
TMC5130_CUR_A_SHIFT
TMC5130_CUR_A_FIELD
TMC5130_CUR_B_MASK
TMC5130_CUR_B_SHIFT
TMC5130_CUR_B_FIELD
TMC5130_TOFF_MASK
TMC5130_TOFF_SHIFT
TMC5130_TOFF_FIELD
TMC5130_TFD_ALL_MASK
TMC5130_TFD_ALL_SHIFT
TMC5130_TFD_ALL_FIELD
TMC5130_OFFSET_MASK
TMC5130_OFFSET_SHIFT
TMC5130_OFFSET_FIELD
TMC5130_TFD_3_MASK
TMC5130_TFD_3_SHIFT
TMC5130_TFD_3_FIELD
TMC5130_DISFDCC_MASK
TMC5130_DISFDCC_SHIFT
TMC5130_DISFDCC_FIELD
TMC5130_RNDTF_MASK
TMC5130_RNDTF_SHIFT
TMC5130_RNDTF_FIELD
TMC5130_CHM_MASK
TMC5130_CHM_SHIFT
TMC5130_CHM_FIELD
TMC5130_TBL_MASK
TMC5130_TBL_SHIFT
TMC5130_TBL_FIELD
TMC5130_VSENSE_MASK
TMC5130_VSENSE_SHIFT
TMC5130_VSENSE_FIELD
TMC5130_VHIGHFS_MASK
TMC5130_VHIGHFS_SHIFT
TMC5130_VHIGHFS_FIELD
TMC5130_VHIGHCHM_MASK
TMC5130_VHIGHCHM_SHIFT
TMC5130_VHIGHCHM_FIELD
TMC5130_SYNC_MASK
TMC5130_SYNC_SHIFT
TMC5130_SYNC_FIELD
TMC5130_MRES_MASK
TMC5130_MRES_SHIFT
TMC5130_MRES_FIELD
TMC5130_INTPOL_MASK
TMC5130_INTPOL_SHIFT
TMC5130_INTPOL_FIELD
TMC5130_DEDGE_MASK
TMC5130_DEDGE_SHIFT
TMC5130_DEDGE_FIELD
TMC5130_DISS2G_MASK
TMC5130_DISS2G_SHIFT
TMC5130_DISS2G_FIELD
TMC5130_TOFF_MASK
TMC5130_TOFF_SHIFT
TMC5130_TOFF_FIELD
TMC5130_TFD_ALL_MASK
TMC5130_TFD_ALL_SHIFT
TMC5130_TFD_ALL_FIELD
TMC5130_OFFSET_MASK
TMC5130_OFFSET_SHIFT
TMC5130_OFFSET_FIELD
TMC5130_TFD_3_MASK
TMC5130_TFD_3_SHIFT
TMC5130_TFD_3_FIELD
TMC5130_DISFDCC_MASK
TMC5130_DISFDCC_SHIFT
TMC5130_DISFDCC_FIELD
TMC5130_RNDTF_MASK
TMC5130_RNDTF_SHIFT
TMC5130_RNDTF_FIELD
TMC5130_CHM_MASK
TMC5130_CHM_SHIFT
TMC5130_CHM_FIELD
TMC5130_TBL_MASK
TMC5130_TBL_SHIFT
TMC5130_TBL_FIELD
TMC5130_VSENSE_MASK
TMC5130_VSENSE_SHIFT
TMC5130_VSENSE_FIELD
TMC5130_VHIGHFS_MASK
TMC5130_VHIGHFS_SHIFT
TMC5130_VHIGHFS_FIELD
TMC5130_VHIGHCHM_MASK
TMC5130_VHIGHCHM_SHIFT
TMC5130_VHIGHCHM_FIELD
TMC5130_SYNC_MASK
TMC5130_SYNC_SHIFT
TMC5130_SYNC_FIELD
TMC5130_MRES_MASK
TMC5130_MRES_SHIFT
TMC5130_MRES_FIELD
TMC5130_INTPOL_MASK
TMC5130_INTPOL_SHIFT
TMC5130_INTPOL_FIELD
TMC5130_DEDGE_MASK
TMC5130_DEDGE_SHIFT
TMC5130_DEDGE_FIELD
TMC5130_DISS2G_MASK
TMC5130_DISS2G_SHIFT
TMC5130_DISS2G_FIELD
TMC5130_TOFF_MASK
TMC5130_TOFF_SHIFT
TMC5130_TOFF_FIELD
TMC5130_HSTRT_MASK
TMC5130_HSTRT_SHIFT
TMC5130_HSTRT_FIELD
TMC5130_HEND_MASK
TMC5130_HEND_SHIFT
TMC5130_HEND_FIELD
TMC5130_RNDTF_MASK
TMC5130_RNDTF_SHIFT
TMC5130_RNDTF_FIELD
TMC5130_CHM_MASK
TMC5130_CHM_SHIFT
TMC5130_CHM_FIELD
TMC5130_TBL_MASK
TMC5130_TBL_SHIFT
TMC5130_TBL_FIELD
TMC5130_VSENSE_MASK
TMC5130_VSENSE_SHIFT
TMC5130_VSENSE_FIELD
TMC5130_VHIGHFS_MASK
TMC5130_VHIGHFS_SHIFT
TMC5130_VHIGHFS_FIELD
TMC5130_VHIGHCHM_MASK
TMC5130_VHIGHCHM_SHIFT
TMC5130_VHIGHCHM_FIELD
TMC5130_SYNC_MASK
TMC5130_SYNC_SHIFT
TMC5130_SYNC_FIELD
TMC5130_MRES_MASK
TMC5130_MRES_SHIFT
TMC5130_MRES_FIELD
TMC5130_INTPOL_MASK
TMC5130_INTPOL_SHIFT
TMC5130_INTPOL_FIELD
TMC5130_DEDGE_MASK
TMC5130_DEDGE_SHIFT
TMC5130_DEDGE_FIELD
TMC5130_DISS2G_MASK
TMC5130_DISS2G_SHIFT
TMC5130_DISS2G_FIELD
TMC5130_SEMIN_MASK
TMC5130_SEMIN_SHIFT
TMC5130_SEMIN_FIELD
TMC5130_SEUP_MASK
TMC5130_SEUP_SHIFT
TMC5130_SEUP_FIELD
TMC5130_SEMAX_MASK
TMC5130_SEMAX_SHIFT
TMC5130_SEMAX_FIELD
TMC5130_SEDN_MASK
TMC5130_SEDN_SHIFT
TMC5130_SEDN_FIELD
TMC5130_SEIMIN_MASK
TMC5130_SEIMIN_SHIFT
TMC5130_SEIMIN_FIELD
TMC5130_SGT_MASK
TMC5130_SGT_SHIFT
TMC5130_SGT_FIELD
TMC5130_SFILT_MASK
TMC5130_SFILT_SHIFT
TMC5130_SFILT_FIELD
TMC5130_DC_TIME_MASK
TMC5130_DC_TIME_SHIFT
TMC5130_DC_TIME_FIELD
TMC5130_DC_SG_MASK
TMC5130_DC_SG_SHIFT
TMC5130_DC_SG_FIELD
TMC5130_SG_RESULT_MASK
TMC5130_SG_RESULT_SHIFT
TMC5130_SG_RESULT_FIELD
TMC5130_FSACTIVE_MASK
TMC5130_FSACTIVE_SHIFT
TMC5130_FSACTIVE_FIELD
TMC5130_CS_ACTUAL_MASK
TMC5130_CS_ACTUAL_SHIFT
TMC5130_CS_ACTUAL_FIELD
TMC5130_STALLGUARD_MASK
TMC5130_STALLGUARD_SHIFT
TMC5130_STALLGUARD_FIELD
TMC5130_OT_MASK
TMC5130_OT_SHIFT
TMC5130_OT_FIELD
TMC5130_OTPW_MASK
TMC5130_OTPW_SHIFT
TMC5130_OTPW_FIELD
TMC5130_S2GA_MASK
TMC5130_S2GA_SHIFT
TMC5130_S2GA_FIELD
TMC5130_S2GB_MASK
TMC5130_S2GB_SHIFT
TMC5130_S2GB_FIELD
TMC5130_OLA_MASK
TMC5130_OLA_SHIFT
TMC5130_OLA_FIELD
TMC5130_OLB_MASK
TMC5130_OLB_SHIFT
TMC5130_OLB_FIELD
TMC5130_STST_MASK
TMC5130_STST_SHIFT
TMC5130_STST_FIELD
TMC5130_PWM_AMPL_MASK
TMC5130_PWM_AMPL_SHIFT
TMC5130_PWM_AMPL_FIELD
TMC5130_PWM_GRAD_MASK
TMC5130_PWM_GRAD_SHIFT
TMC5130_PWM_GRAD_FIELD
TMC5130_PWM_FREQ_MASK
TMC5130_PWM_FREQ_SHIFT
TMC5130_PWM_FREQ_FIELD
TMC5130_PWM_AUTOSCALE_MASK
TMC5130_PWM_AUTOSCALE_SHIFT
TMC5130_PWM_AUTOSCALE_FIELD
TMC5130_PWM_SYMMETRIC_MASK
TMC5130_PWM_SYMMETRIC_SHIFT
TMC5130_PWM_SYMMETRIC_FIELD
TMC5130_FREEWHEEL_MASK
TMC5130_FREEWHEEL_SHIFT
TMC5130_FREEWHEEL_FIELD
TMC5130_PWM_AMPL_MASK
TMC5130_PWM_AMPL_SHIFT
TMC5130_PWM_AMPL_FIELD
TMC5130_PWM_GRAD_MASK
TMC5130_PWM_GRAD_SHIFT
TMC5130_PWM_GRAD_FIELD
TMC5130_PWM_FREQ_MASK
TMC5130_PWM_FREQ_SHIFT
TMC5130_PWM_FREQ_FIELD
TMC5130_PWM_AUTOSCALE_MASK
TMC5130_PWM_AUTOSCALE_SHIFT
TMC5130_PWM_AUTOSCALE_FIELD
TMC5130_PWM_SYMMETRIC_MASK
TMC5130_PWM_SYMMETRIC_SHIFT
TMC5130_PWM_SYMMETRIC_FIELD
TMC5130_FREEWHEEL_MASK
TMC5130_FREEWHEEL_SHIFT
TMC5130_FREEWHEEL_FIELD
TMC5130_PWM_SCALE_MASK
TMC5130_PWM_SCALE_SHIFT
TMC5130_PWM_SCALE_FIELD
TMC5130_INV_MASK
TMC5130_INV_SHIFT
TMC5130_INV_FIELD
TMC5130_MAXSPEED_MASK
TMC5130_MAXSPEED_SHIFT
TMC5130_MAXSPEED_FIELD
TMC5130_LOST_STEPS_MASK
TMC5130_LOST_STEPS_SHIFT
TMC5130_LOST_STEPS_FIELD
file TMC5130_Register.h

Defines

TMC5130_GCONF
TMC5130_GSTAT
TMC5130_IFCNT
TMC5130_SLAVECONF
TMC5130_IOIN
TMC5130_X_COMPARE
TMC5130_IHOLD_IRUN
TMC5130_TPOWERDOWN
TMC5130_TSTEP
TMC5130_TPWMTHRS
TMC5130_TCOOLTHRS
TMC5130_THIGH
TMC5130_RAMPMODE
TMC5130_XACTUAL
TMC5130_VACTUAL
TMC5130_VSTART
TMC5130_A1
TMC5130_V1
TMC5130_AMAX
TMC5130_VMAX
TMC5130_DMAX
TMC5130_D1
TMC5130_VSTOP
TMC5130_TZEROWAIT
TMC5130_XTARGET
TMC5130_VDCMIN
TMC5130_SWMODE
TMC5130_RAMPSTAT
TMC5130_XLATCH
TMC5130_ENCMODE
TMC5130_XENC
TMC5130_ENC_CONST
TMC5130_ENC_STATUS
TMC5130_ENC_LATCH
TMC5130_MSLUT0
TMC5130_MSLUT1
TMC5130_MSLUT2
TMC5130_MSLUT3
TMC5130_MSLUT4
TMC5130_MSLUT5
TMC5130_MSLUT6
TMC5130_MSLUT7
TMC5130_MSLUTSEL
TMC5130_MSLUTSTART
TMC5130_MSCNT
TMC5130_MSCURACT
TMC5130_CHOPCONF
TMC5130_COOLCONF
TMC5130_DCCTRL
TMC5130_DRVSTATUS
TMC5130_PWMCONF
TMC5130_PWMSTATUS
TMC5130_ENCM_CTRL
TMC5130_LOST_STEPS
file TMC5160.c
#include “TMC5160.h”

Functions

void tmc5160_readWriteArray(uint8_t channel, uint8_t *data, size_t length)
void tmc5160_writeDatagram(TMC5160TypeDef *tmc5160, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc5160_writeInt(TMC5160TypeDef *tmc5160, uint8_t address, int32_t value)
int32_t tmc5160_readInt(TMC5160TypeDef *tmc5160, uint8_t address)
void tmc5160_init(TMC5160TypeDef *tmc5160, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
void tmc5160_fillShadowRegisters(TMC5160TypeDef *tmc5160)
uint8_t tmc5160_reset(TMC5160TypeDef *tmc5160)
uint8_t tmc5160_restore(TMC5160TypeDef *tmc5160)
void tmc5160_setRegisterResetState(TMC5160TypeDef *tmc5160, const int32_t *resetState)
void tmc5160_setCallback(TMC5160TypeDef *tmc5160, tmc5160_callback callback)
static void writeConfiguration(TMC5160TypeDef *tmc5160)
void tmc5160_periodicJob(TMC5160TypeDef *tmc5160, uint32_t tick)
void tmc5160_rotate(TMC5160TypeDef *tmc5160, int32_t velocity)
void tmc5160_right(TMC5160TypeDef *tmc5160, uint32_t velocity)
void tmc5160_left(TMC5160TypeDef *tmc5160, uint32_t velocity)
void tmc5160_stop(TMC5160TypeDef *tmc5160)
void tmc5160_moveTo(TMC5160TypeDef *tmc5160, int32_t position, uint32_t velocityMax)
void tmc5160_moveBy(TMC5160TypeDef *tmc5160, int32_t *ticks, uint32_t velocityMax)
uint8_t tmc5160_consistencyCheck(TMC5160TypeDef *tmc5160)
file TMC5160.h
#include “tmc/helpers/API_Header.h”
#include “TMC5160_Register.h”
#include “TMC5160_Constants.h”
#include “TMC5160_Fields.h”

Defines

TMC5160_FIELD_READ(tdef, address, mask, shift)
TMC5160_FIELD_WRITE(tdef, address, mask, shift, value)
R00
R09
R0A
R10
R11
R2B
R3A
R6C
R70

Typedefs

typedef void (*tmc5160_callback)(TMC5160TypeDef*, ConfigState)

Functions

void tmc5160_writeDatagram(TMC5160TypeDef *tmc5160, uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4)
void tmc5160_writeInt(TMC5160TypeDef *tmc5160, uint8_t address, int32_t value)
int32_t tmc5160_readInt(TMC5160TypeDef *tmc5160, uint8_t address)
void tmc5160_init(TMC5160TypeDef *tmc5160, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
void tmc5160_fillShadowRegisters(TMC5160TypeDef *tmc5160)
uint8_t tmc5160_reset(TMC5160TypeDef *tmc5160)
uint8_t tmc5160_restore(TMC5160TypeDef *tmc5160)
void tmc5160_setRegisterResetState(TMC5160TypeDef *tmc5160, const int32_t *resetState)
void tmc5160_setCallback(TMC5160TypeDef *tmc5160, tmc5160_callback callback)
void tmc5160_periodicJob(TMC5160TypeDef *tmc5160, uint32_t tick)
void tmc5160_rotate(TMC5160TypeDef *tmc5160, int32_t velocity)
void tmc5160_right(TMC5160TypeDef *tmc5160, uint32_t velocity)
void tmc5160_left(TMC5160TypeDef *tmc5160, uint32_t velocity)
void tmc5160_stop(TMC5160TypeDef *tmc5160)
void tmc5160_moveTo(TMC5160TypeDef *tmc5160, int32_t position, uint32_t velocityMax)
void tmc5160_moveBy(TMC5160TypeDef *tmc5160, int32_t *ticks, uint32_t velocityMax)
uint8_t tmc5160_consistencyCheck(TMC5160TypeDef *tmc5160)

Variables

static const int32_t tmc5160_defaultRegisterResetState[TMC5160_REGISTER_COUNT] = {R00, 0, 0, 0, 0, 0, 0, 0, 0, R09, R0A, 0, 0, 0, 0, 0, R10, R11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R2B, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R3A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, R6C, 0, 0, 0, R70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,}
static const uint8_t tmc5160_defaultRegisterAccess[TMC5160_REGISTER_COUNT] = {0x03, 0x23, 0x01, 0x02, 0x13, 0x02, 0x02, 0x01, 0x03, 0x02, 0x02, 0x02, 0x01, ____, ____, ____, 0x02, 0x02, 0x01, 0x02, 0x02, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x03, 0x03, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, ____, 0x02, 0x02, 0x02, 0x03, ____, ____, ____, ____, ____, 0x02, 0x03, 0x23, 0x01, ____, 0x03, 0x03, 0x02, 0x23, 0x01, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x01, 0x01, 0x03, 0x02, 0x02, 0x01, 0x42, 0x01, 0x01, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const TMCRegisterConstant tmc5160_RegisterConstants[] = {{0x60, 0xAAAAB554}, {0x61, 0x4A9554AA}, {0x62, 0x24492929}, {0x63, 0x10104222}, {0x64, 0xFBFFFFFF}, {0x65, 0xB5BB777D}, {0x66, 0x49295556}, {0x67, 0x00404222}, {0x68, 0xFFFF8056}, {0x69, 0x00F70000}, {0x70, 0xC40C001E}}
file TMC5160_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC5160_REGISTER_COUNT
TMC5160_MOTORS
TMC5160_WRITE_BIT
TMC5160_ADDRESS_MASK
TMC5160_MAX_VELOCITY
TMC5160_MAX_ACCELERATION
TMC5160_MODE_POSITION
TMC5160_MODE_VELPOS
TMC5160_MODE_VELNEG
TMC5160_MODE_HOLD
TMC5160_SW_STOPL_ENABLE
TMC5160_SW_STOPR_ENABLE
TMC5160_SW_STOPL_POLARITY
TMC5160_SW_STOPR_POLARITY
TMC5160_SW_SWAP_LR
TMC5160_SW_LATCH_L_ACT
TMC5160_SW_LATCH_L_INACT
TMC5160_SW_LATCH_R_ACT
TMC5160_SW_LATCH_R_INACT
TMC5160_SW_LATCH_ENC
TMC5160_SW_SG_STOP
TMC5160_SW_SOFTSTOP
TMC5160_RS_STOPL
TMC5160_RS_STOPR
TMC5160_RS_LATCHL
TMC5160_RS_LATCHR
TMC5160_RS_EV_STOPL
TMC5160_RS_EV_STOPR
TMC5160_RS_EV_STOP_SG
TMC5160_RS_EV_POSREACHED
TMC5160_RS_VELREACHED
TMC5160_RS_POSREACHED
TMC5160_RS_VZERO
TMC5160_RS_ZEROWAIT
TMC5160_RS_SECONDMOVE
TMC5160_RS_SG
TMC5160_EM_DECIMAL
TMC5160_EM_LATCH_XACT
TMC5160_EM_CLR_XENC
TMC5160_EM_NEG_EDGE
TMC5160_EM_POS_EDGE
TMC5160_EM_CLR_ONCE
TMC5160_EM_CLR_CONT
TMC5160_EM_IGNORE_AB
TMC5160_EM_POL_N
TMC5160_EM_POL_B
TMC5160_EM_POL_A
file TMC5160_Fields.h

Defines

TMC5160_SPI_STATUS_RESET_FLAG_MASK
TMC5160_SPI_STATUS_RESET_FLAG_SHIFT
TMC5160_SPI_STATUS_DRIVER_ERROR_MASK
TMC5160_SPI_STATUS_DRIVER_ERROR_SHIFT
TMC5160_SPI_STATUS_SG2_MASK
TMC5160_SPI_STATUS_SG2_SHIFT
TMC5160_SPI_STATUS_STANDSTILL_MASK
TMC5160_SPI_STATUS_STANDSTILL_SHIFT
TMC5160_SPI_STATUS_VELOCITY_REACHED_MASK
TMC5160_SPI_STATUS_VELOCITY_REACHED_SHIFT
TMC5160_SPI_STATUS_POSITION_REACHED_MASK
TMC5160_SPI_STATUS_POSITION_REACHED_SHIFT
TMC5160_SPI_STATUS_STATUS_STOP_L_MASK
TMC5160_SPI_STATUS_STATUS_STOP_L_SHIFT
TMC5160_SPI_STATUS_STATUS_STOP_R_MASK
TMC5160_SPI_STATUS_STATUS_STOP_R_SHIFT
TMC5160_RECALIBRATE_MASK
TMC5160_RECALIBRATE_SHIFT
TMC5160_FASTSTANDSTILL_MASK
TMC5160_FASTSTANDSTILL_SHIFT
TMC5160_EN_PWM_MODE_MASK
TMC5160_EN_PWM_MODE_SHIFT
TMC5160_MULTISTEP_FILT_MASK
TMC5160_MULTISTEP_FILT_SHIFT
TMC5160_SHAFT_MASK
TMC5160_SHAFT_SHIFT
TMC5160_DIAG0_ERROR_ONLY_WITH_SD_MODE1_MASK
TMC5160_DIAG0_ERROR_ONLY_WITH_SD_MODE1_SHIFT
TMC5160_DIAG0_OTPW_ONLY_WITH_SD_MODE1_MASK
TMC5160_DIAG0_OTPW_ONLY_WITH_SD_MODE1_SHIFT
TMC5160_DIAG0_STALL_MASK
TMC5160_DIAG0_STALL_SHIFT
TMC5160_DIAG1_STALL_MASK
TMC5160_DIAG1_STALL_SHIFT
TMC5160_DIAG1_INDEX_MASK
TMC5160_DIAG1_INDEX_SHIFT
TMC5160_DIAG1_ONSTATE_MASK
TMC5160_DIAG1_ONSTATE_SHIFT
TMC5160_DIAG1_STEPS_SKIPPED_MASK
TMC5160_DIAG1_STEPS_SKIPPED_SHIFT
TMC5160_DIAG0_INT_PUSHPULL_MASK
TMC5160_DIAG0_INT_PUSHPULL_SHIFT
TMC5160_DIAG1_POSCOMP_PUSHPULL_MASK
TMC5160_DIAG1_POSCOMP_PUSHPULL_SHIFT
TMC5160_SMALL_HYSTERESIS_MASK
TMC5160_SMALL_HYSTERESIS_SHIFT
TMC5160_STOP_ENABLE_MASK
TMC5160_STOP_ENABLE_SHIFT
TMC5160_DIRECT_MODE_MASK
TMC5160_DIRECT_MODE_SHIFT
TMC5160_TEST_MODE_MASK
TMC5160_TEST_MODE_SHIFT
TMC5160_RECALIBRATE_MASK
TMC5160_RECALIBRATE_SHIFT
TMC5160_FASTSTANDSTILL_MASK
TMC5160_FASTSTANDSTILL_SHIFT
TMC5160_EN_PWM_MODE_MASK
TMC5160_EN_PWM_MODE_SHIFT
TMC5160_MULTISTEP_FILT_MASK
TMC5160_MULTISTEP_FILT_SHIFT
TMC5160_SHAFT_MASK
TMC5160_SHAFT_SHIFT
TMC5160_DIAG0_STEP_MASK
TMC5160_DIAG0_STEP_SHIFT
TMC5160_DIAG1_DIR_MASK
TMC5160_DIAG1_DIR_SHIFT
TMC5160_DIAG0_INT_PUSHPULL_MASK
TMC5160_DIAG0_INT_PUSHPULL_SHIFT
TMC5160_DIAG1_POSCOMP_PUSHPULL_MASK
TMC5160_DIAG1_POSCOMP_PUSHPULL_SHIFT
TMC5160_SMALL_HYSTERESIS_MASK
TMC5160_SMALL_HYSTERESIS_SHIFT
TMC5160_STOP_ENABLE_MASK
TMC5160_STOP_ENABLE_SHIFT
TMC5160_DIRECT_MODE_MASK
TMC5160_DIRECT_MODE_SHIFT
TMC5160_TEST_MODE_MASK
TMC5160_TEST_MODE_SHIFT
TMC5160_RESET_MASK
TMC5160_RESET_SHIFT
TMC5160_DRV_ERR_MASK
TMC5160_DRV_ERR_SHIFT
TMC5160_UV_CP_MASK
TMC5160_UV_CP_SHIFT
TMC5160_IFCNT_MASK
TMC5160_IFCNT_SHIFT
TMC5160_SLAVEADDR_MASK
TMC5160_SLAVEADDR_SHIFT
TMC5160_SENDDELAY_MASK
TMC5160_SENDDELAY_SHIFT
TMC5160_REFL_STEP_MASK
TMC5160_REFL_STEP_SHIFT
TMC5160_REFR_DIR_MASK
TMC5160_REFR_DIR_SHIFT
TMC5160_ENCB_DCEN_CFG4_MASK
TMC5160_ENCB_DCEN_CFG4_SHIFT
TMC5160_ENCA_DCIN_CFG5_MASK
TMC5160_ENCA_DCIN_CFG5_SHIFT
TMC5160_DRV_ENN_CFG6_MASK
TMC5160_DRV_ENN_CFG6_SHIFT
TMC5160_ENC_N_DCO_MASK
TMC5160_ENC_N_DCO_SHIFT
TMC5160_SD_MODE_MASK
TMC5160_SD_MODE_SHIFT
TMC5160_SWCOMP_IN_MASK
TMC5160_SWCOMP_IN_SHIFT
TMC5160_VERSION_MASK
TMC5160_VERSION_SHIFT
TMC5160_OUTPUT_PIN_POLARITY_MASK
TMC5160_OUTPUT_PIN_POLARITY_SHIFT
TMC5160_X_COMPARE_MASK
TMC5160_X_COMPARE_SHIFT
TMC5160_OTPBIT_MASK
TMC5160_OTPBIT_SHIFT
TMC5160_OTPBYTE_MASK
TMC5160_OTPBYTE_SHIFT
TMC5160_OTPMAGIC_MASK
TMC5160_OTPMAGIC_SHIFT
TMC5160_OTP_TBL_MASK
TMC5160_OTP_TBL_SHIFT
TMC5160_OTP_BBM_MASK
TMC5160_OTP_BBM_SHIFT
TMC5160_OTP_S2_LEVEL_MASK
TMC5160_OTP_S2_LEVEL_SHIFT
TMC5160_OTP_FCLKTRIM_MASK
TMC5160_OTP_FCLKTRIM_SHIFT
TMC5160_FCLKTRIM_MASK
TMC5160_FCLKTRIM_SHIFT
TMC5160_S2VS_LEVEL_MASK
TMC5160_S2VS_LEVEL_SHIFT
TMC5160_S2GND_LEVEL_MASK
TMC5160_S2GND_LEVEL_SHIFT
TMC5160_SHORTFILTER_MASK
TMC5160_SHORTFILTER_SHIFT
TMC5160_SHORTDELAY_MASK
TMC5160_SHORTDELAY_SHIFT
TMC5160_BBMTIME_MASK
TMC5160_BBMTIME_SHIFT
TMC5160_BBMCLKS_MASK
TMC5160_BBMCLKS_SHIFT
TMC5160_OTSELECT_MASK
TMC5160_OTSELECT_SHIFT
TMC5160_DRVSTRENGTH_MASK
TMC5160_DRVSTRENGTH_SHIFT
TMC5160_FILT_ISENSE_MASK
TMC5160_FILT_ISENSE_SHIFT
TMC5160_GLOBAL_SCALER_MASK
TMC5160_GLOBAL_SCALER_SHIFT
TMC5160__MASK
TMC5160__SHIFT
TMC5160_IHOLD_MASK
TMC5160_IHOLD_SHIFT
TMC5160_IRUN_MASK
TMC5160_IRUN_SHIFT
TMC5160_IHOLDDELAY_MASK
TMC5160_IHOLDDELAY_SHIFT
TMC5160_TPOWERDOWN_MASK
TMC5160_TPOWERDOWN_SHIFT
TMC5160_TSTEP_MASK
TMC5160_TSTEP_SHIFT
TMC5160_TPWMTHRS_MASK
TMC5160_TPWMTHRS_SHIFT
TMC5160_TCOOLTHRS_MASK
TMC5160_TCOOLTHRS_SHIFT
TMC5160_THIGH_MASK
TMC5160_THIGH_SHIFT
TMC5160_RAMPMODE_MASK
TMC5160_RAMPMODE_SHIFT
TMC5160_XACTUAL_MASK
TMC5160_XACTUAL_SHIFT
TMC5160_VACTUAL_MASK
TMC5160_VACTUAL_SHIFT
TMC5160_VSTART_MASK
TMC5160_VSTART_SHIFT
TMC5160_A1_MASK
TMC5160_A1_SHIFT
TMC5160_V1__MASK
TMC5160_V1__SHIFT
TMC5160_AMAX_MASK
TMC5160_AMAX_SHIFT
TMC5160_VMAX_MASK
TMC5160_VMAX_SHIFT
TMC5160_DMAX_MASK
TMC5160_DMAX_SHIFT
TMC5160_D1_MASK
TMC5160_D1_SHIFT
TMC5160_VSTOP_MASK
TMC5160_VSTOP_SHIFT
TMC5160_TZEROWAIT_MASK
TMC5160_TZEROWAIT_SHIFT
TMC5160_XTARGET_MASK
TMC5160_XTARGET_SHIFT
TMC5160_VDCMIN_MASK
TMC5160_VDCMIN_SHIFT
TMC5160_STOP_L_ENABLE_MASK
TMC5160_STOP_L_ENABLE_SHIFT
TMC5160_STOP_R_ENABLE_MASK
TMC5160_STOP_R_ENABLE_SHIFT
TMC5160_POL_STOP_L_MASK
TMC5160_POL_STOP_L_SHIFT
TMC5160_POL_STOP_R_MASK
TMC5160_POL_STOP_R_SHIFT
TMC5160_SWAP_LR_MASK
TMC5160_SWAP_LR_SHIFT
TMC5160_LATCH_L_ACTIVE_MASK
TMC5160_LATCH_L_ACTIVE_SHIFT
TMC5160_LATCH_L_INACTIVE_MASK
TMC5160_LATCH_L_INACTIVE_SHIFT
TMC5160_LATCH_R_ACTIVE_MASK
TMC5160_LATCH_R_ACTIVE_SHIFT
TMC5160_LATCH_R_INACTIVE_MASK
TMC5160_LATCH_R_INACTIVE_SHIFT
TMC5160_EN_LATCH_ENCODER_MASK
TMC5160_EN_LATCH_ENCODER_SHIFT
TMC5160_SG_STOP_MASK
TMC5160_SG_STOP_SHIFT
TMC5160_EN_SOFTSTOP_MASK
TMC5160_EN_SOFTSTOP_SHIFT
TMC5160_STATUS_STOP_L_MASK
TMC5160_STATUS_STOP_L_SHIFT
TMC5160_STATUS_STOP_R_MASK
TMC5160_STATUS_STOP_R_SHIFT
TMC5160_STATUS_LATCH_L_MASK
TMC5160_STATUS_LATCH_L_SHIFT
TMC5160_STATUS_LATCH_R_MASK
TMC5160_STATUS_LATCH_R_SHIFT
TMC5160_EVENT_STOP_L_MASK
TMC5160_EVENT_STOP_L_SHIFT
TMC5160_EVENT_STOP_R_MASK
TMC5160_EVENT_STOP_R_SHIFT
TMC5160_EVENT_STOP_SG_MASK
TMC5160_EVENT_STOP_SG_SHIFT
TMC5160_EVENT_POS_REACHED_MASK
TMC5160_EVENT_POS_REACHED_SHIFT
TMC5160_VELOCITY_REACHED_MASK
TMC5160_VELOCITY_REACHED_SHIFT
TMC5160_POSITION_REACHED_MASK
TMC5160_POSITION_REACHED_SHIFT
TMC5160_VZERO_MASK
TMC5160_VZERO_SHIFT
TMC5160_T_ZEROWAIT_ACTIVE_MASK
TMC5160_T_ZEROWAIT_ACTIVE_SHIFT
TMC5160_SECOND_MOVE_MASK
TMC5160_SECOND_MOVE_SHIFT
TMC5160_STATUS_SG_MASK
TMC5160_STATUS_SG_SHIFT
TMC5160_XLATCH_MASK
TMC5160_XLATCH_SHIFT
TMC5160_POL_A_MASK
TMC5160_POL_A_SHIFT
TMC5160_POL_B_MASK
TMC5160_POL_B_SHIFT
TMC5160_POL_N_MASK
TMC5160_POL_N_SHIFT
TMC5160_IGNORE_AB_MASK
TMC5160_IGNORE_AB_SHIFT
TMC5160_CLR_CONT_MASK
TMC5160_CLR_CONT_SHIFT
TMC5160_CLR_ONCE_MASK
TMC5160_CLR_ONCE_SHIFT
TMC5160_POS_EDGENEG_EDGE_MASK
TMC5160_POS_EDGENEG_EDGE_SHIFT
TMC5160_CLR_ENC_X_MASK
TMC5160_CLR_ENC_X_SHIFT
TMC5160_LATCH_X_ACT_MASK
TMC5160_LATCH_X_ACT_SHIFT
TMC5160_ENC_SEL_DECIMAL_MASK
TMC5160_ENC_SEL_DECIMAL_SHIFT
TMC5160_X_ENC_MASK
TMC5160_X_ENC_SHIFT
TMC5160_INTEGER_MASK
TMC5160_INTEGER_SHIFT
TMC5160_FRACTIONAL_MASK
TMC5160_FRACTIONAL_SHIFT
TMC5160_N_EVENT_MASK
TMC5160_N_EVENT_SHIFT
TMC5160_DEVIATION_WARN_MASK
TMC5160_DEVIATION_WARN_SHIFT
TMC5160_ENC_LATCH_MASK
TMC5160_ENC_LATCH_SHIFT
TMC5160_ENC_DEVIATION_MASK
TMC5160_ENC_DEVIATION_SHIFT
TMC5160_OFS0_MASK
TMC5160_OFS0_SHIFT
TMC5160_OFS1_MASK
TMC5160_OFS1_SHIFT
TMC5160_OFS2_MASK
TMC5160_OFS2_SHIFT
TMC5160_OFS3_MASK
TMC5160_OFS3_SHIFT
TMC5160_OFS4_MASK
TMC5160_OFS4_SHIFT
TMC5160_OFS5_MASK
TMC5160_OFS5_SHIFT
TMC5160_OFS6_MASK
TMC5160_OFS6_SHIFT
TMC5160_OFS7_MASK
TMC5160_OFS7_SHIFT
TMC5160_OFS8_MASK
TMC5160_OFS8_SHIFT
TMC5160_OFS9_MASK
TMC5160_OFS9_SHIFT
TMC5160_OFS10_MASK
TMC5160_OFS10_SHIFT
TMC5160_OFS11_MASK
TMC5160_OFS11_SHIFT
TMC5160_OFS12_MASK
TMC5160_OFS12_SHIFT
TMC5160_OFS13_MASK
TMC5160_OFS13_SHIFT
TMC5160_OFS14_MASK
TMC5160_OFS14_SHIFT
TMC5160_OFS15_MASK
TMC5160_OFS15_SHIFT
TMC5160_OFS16_MASK
TMC5160_OFS16_SHIFT
TMC5160_OFS17_MASK
TMC5160_OFS17_SHIFT
TMC5160_OFS18_MASK
TMC5160_OFS18_SHIFT
TMC5160_OFS19_MASK
TMC5160_OFS19_SHIFT
TMC5160_OFS20_MASK
TMC5160_OFS20_SHIFT
TMC5160_OFS21_MASK
TMC5160_OFS21_SHIFT
TMC5160_OFS22_MASK
TMC5160_OFS22_SHIFT
TMC5160_OFS23_MASK
TMC5160_OFS23_SHIFT
TMC5160_OFS24_MASK
TMC5160_OFS24_SHIFT
TMC5160_OFS25_MASK
TMC5160_OFS25_SHIFT
TMC5160_OFS26_MASK
TMC5160_OFS26_SHIFT
TMC5160_OFS27_MASK
TMC5160_OFS27_SHIFT
TMC5160_OFS28_MASK
TMC5160_OFS28_SHIFT
TMC5160_OFS29_MASK
TMC5160_OFS29_SHIFT
TMC5160_OFS30_MASK
TMC5160_OFS30_SHIFT
TMC5160_OFS31_MASK
TMC5160_OFS31_SHIFT
TMC5160_OFS32_MASK
TMC5160_OFS32_SHIFT
TMC5160_OFS33_MASK
TMC5160_OFS33_SHIFT
TMC5160_OFS34_MASK
TMC5160_OFS34_SHIFT
TMC5160_OFS35_MASK
TMC5160_OFS35_SHIFT
TMC5160_OFS36_MASK
TMC5160_OFS36_SHIFT
TMC5160_OFS37_MASK
TMC5160_OFS37_SHIFT
TMC5160_OFS38_MASK
TMC5160_OFS38_SHIFT
TMC5160_OFS39_MASK
TMC5160_OFS39_SHIFT
TMC5160_OFS40_MASK
TMC5160_OFS40_SHIFT
TMC5160_OFS41_MASK
TMC5160_OFS41_SHIFT
TMC5160_OFS42_MASK
TMC5160_OFS42_SHIFT
TMC5160_OFS43_MASK
TMC5160_OFS43_SHIFT
TMC5160_OFS44_MASK
TMC5160_OFS44_SHIFT
TMC5160_OFS45_MASK
TMC5160_OFS45_SHIFT
TMC5160_OFS46_MASK
TMC5160_OFS46_SHIFT
TMC5160_OFS47_MASK
TMC5160_OFS47_SHIFT
TMC5160_OFS48_MASK
TMC5160_OFS48_SHIFT
TMC5160_OFS49_MASK
TMC5160_OFS49_SHIFT
TMC5160_OFS50_MASK
TMC5160_OFS50_SHIFT
TMC5160_OFS51_MASK
TMC5160_OFS51_SHIFT
TMC5160_OFS52_MASK
TMC5160_OFS52_SHIFT
TMC5160_OFS53_MASK
TMC5160_OFS53_SHIFT
TMC5160_OFS54_MASK
TMC5160_OFS54_SHIFT
TMC5160_OFS55_MASK
TMC5160_OFS55_SHIFT
TMC5160_OFS56_MASK
TMC5160_OFS56_SHIFT
TMC5160_OFS57_MASK
TMC5160_OFS57_SHIFT
TMC5160_OFS58_MASK
TMC5160_OFS58_SHIFT
TMC5160_OFS59_MASK
TMC5160_OFS59_SHIFT
TMC5160_OFS60_MASK
TMC5160_OFS60_SHIFT
TMC5160_OFS61_MASK
TMC5160_OFS61_SHIFT
TMC5160_OFS62_MASK
TMC5160_OFS62_SHIFT
TMC5160_OFS63_MASK
TMC5160_OFS63_SHIFT
TMC5160_OFS64_MASK
TMC5160_OFS64_SHIFT
TMC5160_OFS65_MASK
TMC5160_OFS65_SHIFT
TMC5160_OFS66_MASK
TMC5160_OFS66_SHIFT
TMC5160_OFS67_MASK
TMC5160_OFS67_SHIFT
TMC5160_OFS68_MASK
TMC5160_OFS68_SHIFT
TMC5160_OFS69_MASK
TMC5160_OFS69_SHIFT
TMC5160_OFS70_MASK
TMC5160_OFS70_SHIFT
TMC5160_OFS71_MASK
TMC5160_OFS71_SHIFT
TMC5160_OFS72_MASK
TMC5160_OFS72_SHIFT
TMC5160_OFS73_MASK
TMC5160_OFS73_SHIFT
TMC5160_OFS74_MASK
TMC5160_OFS74_SHIFT
TMC5160_OFS75_MASK
TMC5160_OFS75_SHIFT
TMC5160_OFS76_MASK
TMC5160_OFS76_SHIFT
TMC5160_OFS77_MASK
TMC5160_OFS77_SHIFT
TMC5160_OFS78_MASK
TMC5160_OFS78_SHIFT
TMC5160_OFS79_MASK
TMC5160_OFS79_SHIFT
TMC5160_OFS80_MASK
TMC5160_OFS80_SHIFT
TMC5160_OFS81_MASK
TMC5160_OFS81_SHIFT
TMC5160_OFS82_MASK
TMC5160_OFS82_SHIFT
TMC5160_OFS83_MASK
TMC5160_OFS83_SHIFT
TMC5160_OFS84_MASK
TMC5160_OFS84_SHIFT
TMC5160_OFS85_MASK
TMC5160_OFS85_SHIFT
TMC5160_OFS86_MASK
TMC5160_OFS86_SHIFT
TMC5160_OFS87_MASK
TMC5160_OFS87_SHIFT
TMC5160_OFS88_MASK
TMC5160_OFS88_SHIFT
TMC5160_OFS89_MASK
TMC5160_OFS89_SHIFT
TMC5160_OFS90_MASK
TMC5160_OFS90_SHIFT
TMC5160_OFS91_MASK
TMC5160_OFS91_SHIFT
TMC5160_OFS92_MASK
TMC5160_OFS92_SHIFT
TMC5160_OFS93_MASK
TMC5160_OFS93_SHIFT
TMC5160_OFS94_MASK
TMC5160_OFS94_SHIFT
TMC5160_OFS95_MASK
TMC5160_OFS95_SHIFT
TMC5160_OFS96_MASK
TMC5160_OFS96_SHIFT
TMC5160_OFS97_MASK
TMC5160_OFS97_SHIFT
TMC5160_OFS98_MASK
TMC5160_OFS98_SHIFT
TMC5160_OFS99_MASK
TMC5160_OFS99_SHIFT
TMC5160_OFS100_MASK
TMC5160_OFS100_SHIFT
TMC5160_OFS101_MASK
TMC5160_OFS101_SHIFT
TMC5160_OFS102_MASK
TMC5160_OFS102_SHIFT
TMC5160_OFS103_MASK
TMC5160_OFS103_SHIFT
TMC5160_OFS104_MASK
TMC5160_OFS104_SHIFT
TMC5160_OFS105_MASK
TMC5160_OFS105_SHIFT
TMC5160_OFS106_MASK
TMC5160_OFS106_SHIFT
TMC5160_OFS107_MASK
TMC5160_OFS107_SHIFT
TMC5160_OFS108_MASK
TMC5160_OFS108_SHIFT
TMC5160_OFS109_MASK
TMC5160_OFS109_SHIFT
TMC5160_OFS110_MASK
TMC5160_OFS110_SHIFT
TMC5160_OFS111_MASK
TMC5160_OFS111_SHIFT
TMC5160_OFS112_MASK
TMC5160_OFS112_SHIFT
TMC5160_OFS113_MASK
TMC5160_OFS113_SHIFT
TMC5160_OFS114_MASK
TMC5160_OFS114_SHIFT
TMC5160_OFS115_MASK
TMC5160_OFS115_SHIFT
TMC5160_OFS116_MASK
TMC5160_OFS116_SHIFT
TMC5160_OFS117_MASK
TMC5160_OFS117_SHIFT
TMC5160_OFS118_MASK
TMC5160_OFS118_SHIFT
TMC5160_OFS119_MASK
TMC5160_OFS119_SHIFT
TMC5160_OFS120_MASK
TMC5160_OFS120_SHIFT
TMC5160_OFS121_MASK
TMC5160_OFS121_SHIFT
TMC5160_OFS122_MASK
TMC5160_OFS122_SHIFT
TMC5160_OFS123_MASK
TMC5160_OFS123_SHIFT
TMC5160_OFS124_MASK
TMC5160_OFS124_SHIFT
TMC5160_OFS125_MASK
TMC5160_OFS125_SHIFT
TMC5160_OFS126_MASK
TMC5160_OFS126_SHIFT
TMC5160_OFS127_MASK
TMC5160_OFS127_SHIFT
TMC5160_OFS128_MASK
TMC5160_OFS128_SHIFT
TMC5160_OFS129_MASK
TMC5160_OFS129_SHIFT
TMC5160_OFS130_MASK
TMC5160_OFS130_SHIFT
TMC5160_OFS131_MASK
TMC5160_OFS131_SHIFT
TMC5160_OFS132_MASK
TMC5160_OFS132_SHIFT
TMC5160_OFS133_MASK
TMC5160_OFS133_SHIFT
TMC5160_OFS134_MASK
TMC5160_OFS134_SHIFT
TMC5160_OFS135_MASK
TMC5160_OFS135_SHIFT
TMC5160_OFS136_MASK
TMC5160_OFS136_SHIFT
TMC5160_OFS137_MASK
TMC5160_OFS137_SHIFT
TMC5160_OFS138_MASK
TMC5160_OFS138_SHIFT
TMC5160_OFS139_MASK
TMC5160_OFS139_SHIFT
TMC5160_OFS140_MASK
TMC5160_OFS140_SHIFT
TMC5160_OFS141_MASK
TMC5160_OFS141_SHIFT
TMC5160_OFS142_MASK
TMC5160_OFS142_SHIFT
TMC5160_OFS143_MASK
TMC5160_OFS143_SHIFT
TMC5160_OFS144_MASK
TMC5160_OFS144_SHIFT
TMC5160_OFS145_MASK
TMC5160_OFS145_SHIFT
TMC5160_OFS146_MASK
TMC5160_OFS146_SHIFT
TMC5160_OFS147_MASK
TMC5160_OFS147_SHIFT
TMC5160_OFS148_MASK
TMC5160_OFS148_SHIFT
TMC5160_OFS149_MASK
TMC5160_OFS149_SHIFT
TMC5160_OFS150_MASK
TMC5160_OFS150_SHIFT
TMC5160_OFS151_MASK
TMC5160_OFS151_SHIFT
TMC5160_OFS152_MASK
TMC5160_OFS152_SHIFT
TMC5160_OFS153_MASK
TMC5160_OFS153_SHIFT
TMC5160_OFS154_MASK
TMC5160_OFS154_SHIFT
TMC5160_OFS155_MASK
TMC5160_OFS155_SHIFT
TMC5160_OFS156_MASK
TMC5160_OFS156_SHIFT
TMC5160_OFS157_MASK
TMC5160_OFS157_SHIFT
TMC5160_OFS158_MASK
TMC5160_OFS158_SHIFT
TMC5160_OFS159_MASK
TMC5160_OFS159_SHIFT
TMC5160_OFS160_MASK
TMC5160_OFS160_SHIFT
TMC5160_OFS161_MASK
TMC5160_OFS161_SHIFT
TMC5160_OFS162_MASK
TMC5160_OFS162_SHIFT
TMC5160_OFS163_MASK
TMC5160_OFS163_SHIFT
TMC5160_OFS164_MASK
TMC5160_OFS164_SHIFT
TMC5160_OFS165_MASK
TMC5160_OFS165_SHIFT
TMC5160_OFS166_MASK
TMC5160_OFS166_SHIFT
TMC5160_OFS167_MASK
TMC5160_OFS167_SHIFT
TMC5160_OFS168_MASK
TMC5160_OFS168_SHIFT
TMC5160_OFS169_MASK
TMC5160_OFS169_SHIFT
TMC5160_OFS170_MASK
TMC5160_OFS170_SHIFT
TMC5160_OFS171_MASK
TMC5160_OFS171_SHIFT
TMC5160_OFS172_MASK
TMC5160_OFS172_SHIFT
TMC5160_OFS173_MASK
TMC5160_OFS173_SHIFT
TMC5160_OFS174_MASK
TMC5160_OFS174_SHIFT
TMC5160_OFS175_MASK
TMC5160_OFS175_SHIFT
TMC5160_OFS176_MASK
TMC5160_OFS176_SHIFT
TMC5160_OFS177_MASK
TMC5160_OFS177_SHIFT
TMC5160_OFS178_MASK
TMC5160_OFS178_SHIFT
TMC5160_OFS179_MASK
TMC5160_OFS179_SHIFT
TMC5160_OFS180_MASK
TMC5160_OFS180_SHIFT
TMC5160_OFS181_MASK
TMC5160_OFS181_SHIFT
TMC5160_OFS182_MASK
TMC5160_OFS182_SHIFT
TMC5160_OFS183_MASK
TMC5160_OFS183_SHIFT
TMC5160_OFS184_MASK
TMC5160_OFS184_SHIFT
TMC5160_OFS185_MASK
TMC5160_OFS185_SHIFT
TMC5160_OFS186_MASK
TMC5160_OFS186_SHIFT
TMC5160_OFS187_MASK
TMC5160_OFS187_SHIFT
TMC5160_OFS188_MASK
TMC5160_OFS188_SHIFT
TMC5160_OFS189_MASK
TMC5160_OFS189_SHIFT
TMC5160_OFS190_MASK
TMC5160_OFS190_SHIFT
TMC5160_OFS191_MASK
TMC5160_OFS191_SHIFT
TMC5160_OFS192_MASK
TMC5160_OFS192_SHIFT
TMC5160_OFS193_MASK
TMC5160_OFS193_SHIFT
TMC5160_OFS194_MASK
TMC5160_OFS194_SHIFT
TMC5160_OFS195_MASK
TMC5160_OFS195_SHIFT
TMC5160_OFS196_MASK
TMC5160_OFS196_SHIFT
TMC5160_OFS197_MASK
TMC5160_OFS197_SHIFT
TMC5160_OFS198_MASK
TMC5160_OFS198_SHIFT
TMC5160_OFS199_MASK
TMC5160_OFS199_SHIFT
TMC5160_OFS200_MASK
TMC5160_OFS200_SHIFT
TMC5160_OFS201_MASK
TMC5160_OFS201_SHIFT
TMC5160_OFS202_MASK
TMC5160_OFS202_SHIFT
TMC5160_OFS203_MASK
TMC5160_OFS203_SHIFT
TMC5160_OFS204_MASK
TMC5160_OFS204_SHIFT
TMC5160_OFS205_MASK
TMC5160_OFS205_SHIFT
TMC5160_OFS206_MASK
TMC5160_OFS206_SHIFT
TMC5160_OFS207_MASK
TMC5160_OFS207_SHIFT
TMC5160_OFS208_MASK
TMC5160_OFS208_SHIFT
TMC5160_OFS209_MASK
TMC5160_OFS209_SHIFT
TMC5160_OFS210_MASK
TMC5160_OFS210_SHIFT
TMC5160_OFS211_MASK
TMC5160_OFS211_SHIFT
TMC5160_OFS212_MASK
TMC5160_OFS212_SHIFT
TMC5160_OFS213_MASK
TMC5160_OFS213_SHIFT
TMC5160_OFS214_MASK
TMC5160_OFS214_SHIFT
TMC5160_OFS215_MASK
TMC5160_OFS215_SHIFT
TMC5160_OFS216_MASK
TMC5160_OFS216_SHIFT
TMC5160_OFS217_MASK
TMC5160_OFS217_SHIFT
TMC5160_OFS218_MASK
TMC5160_OFS218_SHIFT
TMC5160_OFS219_MASK
TMC5160_OFS219_SHIFT
TMC5160_OFS220_MASK
TMC5160_OFS220_SHIFT
TMC5160_OFS221_MASK
TMC5160_OFS221_SHIFT
TMC5160_OFS222_MASK
TMC5160_OFS222_SHIFT
TMC5160_OFS223_MASK
TMC5160_OFS223_SHIFT
TMC5160_OFS224_MASK
TMC5160_OFS224_SHIFT
TMC5160_OFS225_MASK
TMC5160_OFS225_SHIFT
TMC5160_OFS226_MASK
TMC5160_OFS226_SHIFT
TMC5160_OFS227_MASK
TMC5160_OFS227_SHIFT
TMC5160_OFS228_MASK
TMC5160_OFS228_SHIFT
TMC5160_OFS229_MASK
TMC5160_OFS229_SHIFT
TMC5160_OFS230_MASK
TMC5160_OFS230_SHIFT
TMC5160_OFS231_MASK
TMC5160_OFS231_SHIFT
TMC5160_OFS232_MASK
TMC5160_OFS232_SHIFT
TMC5160_OFS233_MASK
TMC5160_OFS233_SHIFT
TMC5160_OFS234_MASK
TMC5160_OFS234_SHIFT
TMC5160_OFS235_MASK
TMC5160_OFS235_SHIFT
TMC5160_OFS236_MASK
TMC5160_OFS236_SHIFT
TMC5160_OFS237_MASK
TMC5160_OFS237_SHIFT
TMC5160_OFS238_MASK
TMC5160_OFS238_SHIFT
TMC5160_OFS239_MASK
TMC5160_OFS239_SHIFT
TMC5160_OFS240_MASK
TMC5160_OFS240_SHIFT
TMC5160_OFS241_MASK
TMC5160_OFS241_SHIFT
TMC5160_OFS242_MASK
TMC5160_OFS242_SHIFT
TMC5160_OFS243_MASK
TMC5160_OFS243_SHIFT
TMC5160_OFS244_MASK
TMC5160_OFS244_SHIFT
TMC5160_OFS245_MASK
TMC5160_OFS245_SHIFT
TMC5160_OFS246_MASK
TMC5160_OFS246_SHIFT
TMC5160_OFS247_MASK
TMC5160_OFS247_SHIFT
TMC5160_OFS248_MASK
TMC5160_OFS248_SHIFT
TMC5160_OFS249_MASK
TMC5160_OFS249_SHIFT
TMC5160_OFS250_MASK
TMC5160_OFS250_SHIFT
TMC5160_OFS251_MASK
TMC5160_OFS251_SHIFT
TMC5160_OFS252_MASK
TMC5160_OFS252_SHIFT
TMC5160_OFS253_MASK
TMC5160_OFS253_SHIFT
TMC5160_OFS254_MASK
TMC5160_OFS254_SHIFT
TMC5160_OFS255_MASK
TMC5160_OFS255_SHIFT
TMC5160_W0_MASK
TMC5160_W0_SHIFT
TMC5160_W1_MASK
TMC5160_W1_SHIFT
TMC5160_W2_MASK
TMC5160_W2_SHIFT
TMC5160_W3_MASK
TMC5160_W3_SHIFT
TMC5160_X1_MASK
TMC5160_X1_SHIFT
TMC5160_X2_MASK
TMC5160_X2_SHIFT
TMC5160_X3_MASK
TMC5160_X3_SHIFT
TMC5160_START_SIN_MASK
TMC5160_START_SIN_SHIFT
TMC5160_START_SIN90_MASK
TMC5160_START_SIN90_SHIFT
TMC5160_MSCNT_MASK
TMC5160_MSCNT_SHIFT
TMC5160_CUR_A_MASK
TMC5160_CUR_A_SHIFT
TMC5160_CUR_B_MASK
TMC5160_CUR_B_SHIFT
TMC5160_TOFF_MASK
TMC5160_TOFF_SHIFT
TMC5160_TFD_ALL_MASK
TMC5160_TFD_ALL_SHIFT
TMC5160_OFFSET_MASK
TMC5160_OFFSET_SHIFT
TMC5160_TFD_3_MASK
TMC5160_TFD_3_SHIFT
TMC5160_DISFDCC_MASK
TMC5160_DISFDCC_SHIFT
TMC5160_CHM_MASK
TMC5160_CHM_SHIFT
TMC5160_TBL_MASK
TMC5160_TBL_SHIFT
TMC5160_VHIGHFS_MASK
TMC5160_VHIGHFS_SHIFT
TMC5160_VHIGHCHM_MASK
TMC5160_VHIGHCHM_SHIFT
TMC5160_TPFD_MASK
TMC5160_TPFD_SHIFT
TMC5160_MRES_MASK
TMC5160_MRES_SHIFT
TMC5160_INTPOL_MASK
TMC5160_INTPOL_SHIFT
TMC5160_DEDGE_MASK
TMC5160_DEDGE_SHIFT
TMC5160_DISS2G_MASK
TMC5160_DISS2G_SHIFT
TMC5160_DISS2VS_MASK
TMC5160_DISS2VS_SHIFT
TMC5160_TOFF_MASK
TMC5160_TOFF_SHIFT
TMC5160_TFD_ALL_MASK
TMC5160_TFD_ALL_SHIFT
TMC5160_OFFSET_MASK
TMC5160_OFFSET_SHIFT
TMC5160_TFD_3_MASK
TMC5160_TFD_3_SHIFT
TMC5160_DISFDCC_MASK
TMC5160_DISFDCC_SHIFT
TMC5160_RNDTF_MASK
TMC5160_RNDTF_SHIFT
TMC5160_CHM_MASK
TMC5160_CHM_SHIFT
TMC5160_TBL_MASK
TMC5160_TBL_SHIFT
TMC5160_VSENSE_MASK
TMC5160_VSENSE_SHIFT
TMC5160_VHIGHFS_MASK
TMC5160_VHIGHFS_SHIFT
TMC5160_VHIGHCHM_MASK
TMC5160_VHIGHCHM_SHIFT
TMC5160_TPFD_MASK
TMC5160_TPFD_SHIFT
TMC5160_MRES_MASK
TMC5160_MRES_SHIFT
TMC5160_INTPOL_MASK
TMC5160_INTPOL_SHIFT
TMC5160_DEDGE_MASK
TMC5160_DEDGE_SHIFT
TMC5160_DISS2G_MASK
TMC5160_DISS2G_SHIFT
TMC5160_DISS2VS_MASK
TMC5160_DISS2VS_SHIFT
TMC5160_TOFF_MASK
TMC5160_TOFF_SHIFT
TMC5160_HSTRT_MASK
TMC5160_HSTRT_SHIFT
TMC5160_HEND_MASK
TMC5160_HEND_SHIFT
TMC5160_CHM_MASK
TMC5160_CHM_SHIFT
TMC5160_TBL_MASK
TMC5160_TBL_SHIFT
TMC5160_VHIGHFS_MASK
TMC5160_VHIGHFS_SHIFT
TMC5160_VHIGHCHM_MASK
TMC5160_VHIGHCHM_SHIFT
TMC5160_TPFD_MASK
TMC5160_TPFD_SHIFT
TMC5160_MRES_MASK
TMC5160_MRES_SHIFT
TMC5160_INTPOL_MASK
TMC5160_INTPOL_SHIFT
TMC5160_DEDGE_MASK
TMC5160_DEDGE_SHIFT
TMC5160_DISS2G_MASK
TMC5160_DISS2G_SHIFT
TMC5160_DISS2VS_MASK
TMC5160_DISS2VS_SHIFT
TMC5160_SEMIN_MASK
TMC5160_SEMIN_SHIFT
TMC5160_SEUP_MASK
TMC5160_SEUP_SHIFT
TMC5160_SEMAX_MASK
TMC5160_SEMAX_SHIFT
TMC5160_SEDN_MASK
TMC5160_SEDN_SHIFT
TMC5160_SEIMIN_MASK
TMC5160_SEIMIN_SHIFT
TMC5160_SGT_MASK
TMC5160_SGT_SHIFT
TMC5160_SFILT_MASK
TMC5160_SFILT_SHIFT
TMC5160_DC_TIME_MASK
TMC5160_DC_TIME_SHIFT
TMC5160_DC_SG_MASK
TMC5160_DC_SG_SHIFT
TMC5160_SG_RESULT_MASK
TMC5160_SG_RESULT_SHIFT
TMC5160_S2VSA_MASK
TMC5160_S2VSA_SHIFT
TMC5160_S2VSB_MASK
TMC5160_S2VSB_SHIFT
TMC5160_STEALTH_MASK
TMC5160_STEALTH_SHIFT
TMC5160_FSACTIVE_MASK
TMC5160_FSACTIVE_SHIFT
TMC5160_CS_ACTUAL_MASK
TMC5160_CS_ACTUAL_SHIFT
TMC5160_STALLGUARD_MASK
TMC5160_STALLGUARD_SHIFT
TMC5160_OT_MASK
TMC5160_OT_SHIFT
TMC5160_OTPW_MASK
TMC5160_OTPW_SHIFT
TMC5160_S2GA_MASK
TMC5160_S2GA_SHIFT
TMC5160_S2GB_MASK
TMC5160_S2GB_SHIFT
TMC5160_OLA_MASK
TMC5160_OLA_SHIFT
TMC5160_OLB_MASK
TMC5160_OLB_SHIFT
TMC5160_STST_MASK
TMC5160_STST_SHIFT
TMC5160_PWM_OFS_MASK
TMC5160_PWM_OFS_SHIFT
TMC5160_PWM_GRAD_MASK
TMC5160_PWM_GRAD_SHIFT
TMC5160_PWM_FREQ_MASK
TMC5160_PWM_FREQ_SHIFT
TMC5160_PWM_AUTOSCALE_MASK
TMC5160_PWM_AUTOSCALE_SHIFT
TMC5160_PWM_AUTOGRAD_MASK
TMC5160_PWM_AUTOGRAD_SHIFT
TMC5160_FREEWHEEL_MASK
TMC5160_FREEWHEEL_SHIFT
TMC5160_PWM_REG_MASK
TMC5160_PWM_REG_SHIFT
TMC5160_PWM_LIM_MASK
TMC5160_PWM_LIM_SHIFT
TMC5160_PWM_SCALE_SUM_MASK
TMC5160_PWM_SCALE_SUM_SHIFT
TMC5160_PWM_SCALE_AUTO_MASK
TMC5160_PWM_SCALE_AUTO_SHIFT
TMC5160_PWM_OFS_AUTO_MASK
TMC5160_PWM_OFS_AUTO_SHIFT
TMC5160_PWM_GRAD_AUTO_MASK
TMC5160_PWM_GRAD_AUTO_SHIFT
TMC5160_LOST_STEPS_MASK
TMC5160_LOST_STEPS_SHIFT
file TMC5160_Register.h

Defines

TMC5160_GCONF
TMC5160_GSTAT
TMC5160_IFCNT
TMC5160_SLAVECONF
TMC5160_INP_OUT
TMC5160_X_COMPARE
TMC5160_OTP_PROG
TMC5160_OTP_READ
TMC5160_FACTORY_CONF
TMC5160_SHORT_CONF
TMC5160_DRV_CONF
TMC5160_GLOBAL_SCALER
TMC5160_OFFSET_READ
TMC5160_IHOLD_IRUN
TMC5160_TPOWERDOWN
TMC5160_TSTEP
TMC5160_TPWMTHRS
TMC5160_TCOOLTHRS
TMC5160_THIGH
TMC5160_RAMPMODE
TMC5160_XACTUAL
TMC5160_VACTUAL
TMC5160_VSTART
TMC5160_A1
TMC5160_V1
TMC5160_AMAX
TMC5160_VMAX
TMC5160_DMAX
TMC5160_D1
TMC5160_VSTOP
TMC5160_TZEROWAIT
TMC5160_XTARGET
TMC5160_VDCMIN
TMC5160_SWMODE
TMC5160_RAMPSTAT
TMC5160_XLATCH
TMC5160_ENCMODE
TMC5160_XENC
TMC5160_ENC_CONST
TMC5160_ENC_STATUS
TMC5160_ENC_LATCH
TMC5160_ENC_DEVIATION
TMC5160_MSLUT0
TMC5160_MSLUT1
TMC5160_MSLUT2
TMC5160_MSLUT3
TMC5160_MSLUT4
TMC5160_MSLUT5
TMC5160_MSLUT6
TMC5160_MSLUT7
TMC5160_MSLUTSEL
TMC5160_MSLUTSTART
TMC5160_MSCNT
TMC5160_MSCURACT
TMC5160_CHOPCONF
TMC5160_COOLCONF
TMC5160_DCCTRL
TMC5160_DRVSTATUS
TMC5160_PWMCONF
TMC5160_PWMSCALE
TMC5160_PWM_AUTO
TMC5160_LOST_STEPS
file TMC5240.c
#include “TMC5240.h”

Functions

void tmc5240_init(TMC5240TypeDef *tmc5240, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
uint8_t tmc5240_reset(TMC5240TypeDef *tmc5240)
uint8_t tmc5240_restore(TMC5240TypeDef *tmc5240)
void tmc5240_setRegisterResetState(TMC5240TypeDef *tmc5240, const int32_t *resetState)
void tmc5240_setCallback(TMC5240TypeDef *tmc5240, tmc5240_callback callback)
uint8_t tmc5240_getSlaveAddress(TMC5240TypeDef *tmc5240)
void tmc5240_setSlaveAddress(TMC5240TypeDef *tmc5240, uint8_t slaveAddress)
static void writeConfiguration(TMC5240TypeDef *tmc5240)
void tmc5240_periodicJob(TMC5240TypeDef *tmc5240, uint32_t tick)
void tmc5240_rotate(TMC5240TypeDef *tmc5240, int32_t velocity)
void tmc5240_right(TMC5240TypeDef *tmc5240, uint32_t velocity)
void tmc5240_left(TMC5240TypeDef *tmc5240, uint32_t velocity)
void tmc5240_stop(TMC5240TypeDef *tmc5240)
void tmc5240_moveTo(TMC5240TypeDef *tmc5240, int32_t position, uint32_t velocityMax)
void tmc5240_moveBy(TMC5240TypeDef *tmc5240, int32_t *ticks, uint32_t velocityMax)
file TMC5240.h
#include “tmc/helpers/API_Header.h”
#include “tmc/helpers/Constants.h”
#include “../TMC5240/TMC5240_Register.h”
#include “TMC5240_Constants.h”
#include “../TMC5240/TMC5240_Fields.h”

Defines

TMC5240_FIELD_READ(tdef, address, mask, shift)
TMC5240_FIELD_WRITE(tdef, address, mask, shift, value)
R00
R0A
R10
R11
R2A
R2B
R30
R3A
R52
R60
R61
R62
R63
R64
R65
R66
R67
R68
R69
R6C
R70
R74

Typedefs

typedef void (*tmc5240_callback)(TMC5240TypeDef*, ConfigState)

Functions

void tmc5240_writeInt(TMC5240TypeDef *tmc5240, uint8_t address, int32_t value)
int32_t tmc5240_readInt(TMC5240TypeDef *tmc5240, uint8_t address)
void tmc5240_init(TMC5240TypeDef *tmc5240, uint8_t channel, ConfigurationTypeDef *config, const int32_t *registerResetState)
uint8_t tmc5240_reset(TMC5240TypeDef *tmc5240)
uint8_t tmc5240_restore(TMC5240TypeDef *tmc5240)
uint8_t tmc5240_getSlaveAddress(TMC5240TypeDef *tmc5240)
void tmc5240_setSlaveAddress(TMC5240TypeDef *tmc5240, uint8_t slaveAddress)
void tmc5240_setRegisterResetState(TMC5240TypeDef *tmc5240, const int32_t *resetState)
void tmc5240_setCallback(TMC5240TypeDef *tmc5240, tmc5240_callback callback)
void tmc5240_periodicJob(TMC5240TypeDef *tmc5240, uint32_t tick)
void tmc5240_rotate(TMC5240TypeDef *tmc5240, int32_t velocity)
void tmc5240_right(TMC5240TypeDef *tmc5240, uint32_t velocity)
void tmc5240_left(TMC5240TypeDef *tmc5240, uint32_t velocity)
void tmc5240_stop(TMC5240TypeDef *tmc5240)
void tmc5240_moveTo(TMC5240TypeDef *tmc5240, int32_t position, uint32_t velocityMax)
void tmc5240_moveBy(TMC5240TypeDef *tmc5240, int32_t *ticks, uint32_t velocityMax)

Variables

static const int32_t tmc5240_defaultRegisterResetState[TMC5240_REGISTER_COUNT] = {R00, 0, 0, 0, 0, 0, 0, 0, 0, 0, R0A, 0, 0, 0, 0, 0, R10, R11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R2A, R2B, 0, 0, 0, 0, R30, 0, 0, 0, 0, 0, 0, 0, 0, 0, R3A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R52, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R60, R61, R62, R63, R64, R65, R66, R67, R68, R69, 0, 0, R6C, 0, 0, 0, R70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,}
static const uint8_t tmc5240_defaultRegisterAccess[TMC5240_REGISTER_COUNT] = {0x03, 0x23, 0x01, 0x03, 0x03, 0x03, 0x03, ____, ____, ____, 0x03, 0x03, ____, ____, ____, ____, 0x03, 0x03, 0x01, 0x03, 0x03, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x03, 0x03, 0x01, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x01, ____, 0x03, 0x03, 0x23, 0x01, ____, 0x03, 0x03, 0x03, 0x23, 0x01, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x01, 0x01, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x01, 0x01, 0x03, 0x03, 0x03, 0x01, 0x03, 0x01, 0x01, ____, 0x03, 0x01, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const TMCRegisterConstant tmc5240_RegisterConstants[] = {}
file TMC5240_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC5240_REGISTER_COUNT
TMC5240_MOTORS
TMC5240_WRITE_BIT
TMC5240_ADDRESS_MASK
TMC5240_MAX_VELOCITY
TMC5240_MAX_ACCELERATION
TMC5240_MODE_POSITION
TMC5240_MODE_VELPOS
TMC5240_MODE_VELNEG
TMC5240_MODE_HOLD
TMC5240_SW_STOPL_ENABLE
TMC5240_SW_STOPR_ENABLE
TMC5240_SW_STOPL_POLARITY
TMC5240_SW_STOPR_POLARITY
TMC5240_SW_SWAP_LR
TMC5240_SW_LATCH_L_ACT
TMC5240_SW_LATCH_L_INACT
TMC5240_SW_LATCH_R_ACT
TMC5240_SW_LATCH_R_INACT
TMC5240_SW_LATCH_ENC
TMC5240_SW_SG_STOP
TMC5240_SW_SOFTSTOP
TMC5240_RS_STOPL
TMC5240_RS_STOPR
TMC5240_RS_LATCHL
TMC5240_RS_LATCHR
TMC5240_RS_EV_STOPL
TMC5240_RS_EV_STOPR
TMC5240_RS_EV_STOP_SG
TMC5240_RS_EV_POSREACHED
TMC5240_RS_VELREACHED
TMC5240_RS_POSREACHED
TMC5240_RS_VZERO
TMC5240_RS_ZEROWAIT
TMC5240_RS_SECONDMOVE
TMC5240_RS_SG
TMC5240_EM_DECIMAL
TMC5240_EM_LATCH_XACT
TMC5240_EM_CLR_XENC
TMC5240_EM_NEG_EDGE
TMC5240_EM_POS_EDGE
TMC5240_EM_CLR_ONCE
TMC5240_EM_CLR_CONT
TMC5240_EM_IGNORE_AB
TMC5240_EM_POL_N
TMC5240_EM_POL_B
TMC5240_EM_POL_A
file TMC5240_Fields.h

Defines

TMC5240_SPI_STATUS_RESET_FLAG_MASK
TMC5240_SPI_STATUS_RESET_FLAG_SHIFT
TMC5240_SPI_STATUS_DRIVER_ERROR_MASK
TMC5240_SPI_STATUS_DRIVER_ERROR_SHIFT
TMC5240_SPI_STATUS_SG2_MASK
TMC5240_SPI_STATUS_SG2_SHIFT
TMC5240_SPI_STATUS_STANDSTILL_MASK
TMC5240_SPI_STATUS_STANDSTILL_SHIFT
TMC5240_SPI_STATUS_VELOCITY_REACHED_MASK
TMC5240_SPI_STATUS_VELOCITY_REACHED_SHIFT
TMC5240_SPI_STATUS_POSITION_REACHED_MASK
TMC5240_SPI_STATUS_POSITION_REACHED_SHIFT
TMC5240_SPI_STATUS_STATUS_STOP_L_MASK
TMC5240_SPI_STATUS_STATUS_STOP_L_SHIFT
TMC5240_SPI_STATUS_STATUS_STOP_R_MASK
TMC5240_SPI_STATUS_STATUS_STOP_R_SHIFT
TMC5240_FAST_STANDSTILL_MASK
TMC5240_FAST_STANDSTILL_SHIFT
TMC5240_EN_PWM_MODE_MASK
TMC5240_EN_PWM_MODE_SHIFT
TMC5240_MULTISTEP_FILT_MASK
TMC5240_MULTISTEP_FILT_SHIFT
TMC5240_SHAFT_MASK
TMC5240_SHAFT_SHIFT
TMC5240_DIAG0_ERROR_MASK
TMC5240_DIAG0_ERROR_SHIFT
TMC5240_DIAG0_OTPW_MASK
TMC5240_DIAG0_OTPW_SHIFT
TMC5240_DIAG0_STALL_STEP_MASK
TMC5240_DIAG0_STALL_STEP_SHIFT
TMC5240_DIAG1_STALL_DIR_MASK
TMC5240_DIAG1_STALL_DIR_SHIFT
TMC5240_DIAG1_INDEX_MASK
TMC5240_DIAG1_INDEX_SHIFT
TMC5240_DIAG1_ONSTATE_MASK
TMC5240_DIAG1_ONSTATE_SHIFT
TMC5240_DIAG0_INT_PUSHPULL_MASK
TMC5240_DIAG0_INT_PUSHPULL_SHIFT
TMC5240_DIAG1_POSCOMP_PUSHPULL_MASK
TMC5240_DIAG1_POSCOMP_PUSHPULL_SHIFT
TMC5240_SMALL_HYSTERESIS_MASK
TMC5240_SMALL_HYSTERESIS_SHIFT
TMC5240_STOP_ENABLE_MASK
TMC5240_STOP_ENABLE_SHIFT
TMC5240_DIRECT_MODE_MASK
TMC5240_DIRECT_MODE_SHIFT
TMC5240_LENGTH_STEP_PULSE_MASK
TMC5240_LENGTH_STEP_PULSE_SHIFT
TMC5240_RESET_MASK
TMC5240_RESET_SHIFT
TMC5240_DRV_ERR_MASK
TMC5240_DRV_ERR_SHIFT
TMC5240_UV_CP_MASK
TMC5240_UV_CP_SHIFT
TMC5240_REGISTER_RESET_MASK
TMC5240_REGISTER_RESET_SHIFT
TMC5240_VM_UVLO_MASK
TMC5240_VM_UVLO_SHIFT
TMC5240_IFCNT_MASK
TMC5240_IFCNT_SHIFT
TMC5240_SLAVEADDR_MASK
TMC5240_SLAVEADDR_SHIFT
TMC5240_SENDDELAY_MASK
TMC5240_SENDDELAY_SHIFT
TMC5240_REFL_STEP_MASK
TMC5240_REFL_STEP_SHIFT
TMC5240_REFR_DIR_MASK
TMC5240_REFR_DIR_SHIFT
TMC5240_ENCB_CFG4_MASK
TMC5240_ENCB_CFG4_SHIFT
TMC5240_ENCA_CFG5_MASK
TMC5240_ENCA_CFG5_SHIFT
TMC5240_DRV_ENN_MASK
TMC5240_DRV_ENN_SHIFT
TMC5240_ENCN_CFG6_MASK
TMC5240_ENCN_CFG6_SHIFT
TMC5240_UART_EN_MASK
TMC5240_UART_EN_SHIFT
TMC5240_COMP_A_MASK
TMC5240_COMP_A_SHIFT
TMC5240_COMP_B_MASK
TMC5240_COMP_B_SHIFT
TMC5240_COMP_A1_A2_MASK
TMC5240_COMP_A1_A2_SHIFT
TMC5240_COMP_B1_B2_MASK
TMC5240_COMP_B1_B2_SHIFT
TMC5240_OUTPUT_MASK
TMC5240_OUTPUT_SHIFT
TMC5240_EXT_RES_DET_MASK
TMC5240_EXT_RES_DET_SHIFT
TMC5240_EXT_CLK_MASK
TMC5240_EXT_CLK_SHIFT
TMC5240_ADC_ERR_MASK
TMC5240_ADC_ERR_SHIFT
TMC5240_SILICON_RV_MASK
TMC5240_SILICON_RV_SHIFT
TMC5240_VERSION_MASK
TMC5240_VERSION_SHIFT
TMC5240_X_COMPARE_MASK
TMC5240_X_COMPARE_SHIFT
TMC5240_X_COMPARE_REPEAT_MASK
TMC5240_X_COMPARE_REPEAT_SHIFT
TMC5240_CURRENT_RANGE_MASK
TMC5240_CURRENT_RANGE_SHIFT
TMC5240_SLOPE_CONTROL_MASK
TMC5240_SLOPE_CONTROL_SHIFT
TMC5240_RNDTF_MASK
TMC5240_RNDTF_SHIFT
TMC5240_BBM_CLKS_MASK
TMC5240_BBM_CLKS_SHIFT
TMC5240_GLOBAL_SCALER_MASK
TMC5240_GLOBAL_SCALER_SHIFT
TMC5240_IHOLD_MASK
TMC5240_IHOLD_SHIFT
TMC5240_IRUN_MASK
TMC5240_IRUN_SHIFT
TMC5240_IHOLDDELAY_MASK
TMC5240_IHOLDDELAY_SHIFT
TMC5240_IRUNDELAY_MASK
TMC5240_IRUNDELAY_SHIFT
TMC5240_TPOWERDOWN_MASK
TMC5240_TPOWERDOWN_SHIFT
TMC5240_TSTEP_MASK
TMC5240_TSTEP_SHIFT
TMC5240_TPWMTHRS_MASK
TMC5240_TPWMTHRS_SHIFT
TMC5240_TCOOLTHRS_MASK
TMC5240_TCOOLTHRS_SHIFT
TMC5240_THIGH_MASK
TMC5240_THIGH_SHIFT
TMC5240_RAMPMODE_MASK
TMC5240_RAMPMODE_SHIFT
TMC5240_XACTUAL_MASK
TMC5240_XACTUAL_SHIFT
TMC5240_VACTUAL_MASK
TMC5240_VACTUAL_SHIFT
TMC5240_VSTART_MASK
TMC5240_VSTART_SHIFT
TMC5240_A1_MASK
TMC5240_A1_SHIFT
TMC5240_V1_MASK
TMC5240_V1_SHIFT
TMC5240_AMAX_MASK
TMC5240_AMAX_SHIFT
TMC5240_VMAX_MASK
TMC5240_VMAX_SHIFT
TMC5240_DMAX_MASK
TMC5240_DMAX_SHIFT
TMC5240_TVMAX_MASK
TMC5240_TVMAX_SHIFT
TMC5240_D1_MASK
TMC5240_D1_SHIFT
TMC5240_VSTOP_MASK
TMC5240_VSTOP_SHIFT
TMC5240_TZEROWAIT_MASK
TMC5240_TZEROWAIT_SHIFT
TMC5240_XTARGET_MASK
TMC5240_XTARGET_SHIFT
TMC5240_V2_MASK
TMC5240_V2_SHIFT
TMC5240_A2_MASK
TMC5240_A2_SHIFT
TMC5240_D2_MASK
TMC5240_D2_SHIFT
TMC5240_AACTUAL_MASK
TMC5240_AACTUAL_SHIFT
TMC5240_VDCMIN_MASK
TMC5240_VDCMIN_SHIFT
TMC5240_STOP_L_ENABLE_MASK
TMC5240_STOP_L_ENABLE_SHIFT
TMC5240_STOP_R_ENABLE_MASK
TMC5240_STOP_R_ENABLE_SHIFT
TMC5240_POL_STOP_L_MASK
TMC5240_POL_STOP_L_SHIFT
TMC5240_POL_STOP_R_MASK
TMC5240_POL_STOP_R_SHIFT
TMC5240_SWAP_LR_MASK
TMC5240_SWAP_LR_SHIFT
TMC5240_LATCH_L_ACTIVE_MASK
TMC5240_LATCH_L_ACTIVE_SHIFT
TMC5240_LATCH_L_INACTIVE_MASK
TMC5240_LATCH_L_INACTIVE_SHIFT
TMC5240_LATCH_R_ACTIVE_MASK
TMC5240_LATCH_R_ACTIVE_SHIFT
TMC5240_LATCH_R_INACTIVE_MASK
TMC5240_LATCH_R_INACTIVE_SHIFT
TMC5240_EN_LATCH_ENCODER_MASK
TMC5240_EN_LATCH_ENCODER_SHIFT
TMC5240_SG_STOP_MASK
TMC5240_SG_STOP_SHIFT
TMC5240_EN_SOFTSTOP_MASK
TMC5240_EN_SOFTSTOP_SHIFT
TMC5240_EN_VIRTUAL_STOP_L_MASK
TMC5240_EN_VIRTUAL_STOP_L_SHIFT
TMC5240_EN_VIRTUAL_STOP_R_MASK
TMC5240_EN_VIRTUAL_STOP_R_SHIFT
TMC5240_VIRTUAL_STOP_ENC_MASK
TMC5240_VIRTUAL_STOP_ENC_SHIFT
TMC5240_STATUS_STOP_L_MASK
TMC5240_STATUS_STOP_L_SHIFT
TMC5240_STATUS_STOP_R_MASK
TMC5240_STATUS_STOP_R_SHIFT
TMC5240_STATUS_LATCH_L_MASK
TMC5240_STATUS_LATCH_L_SHIFT
TMC5240_STATUS_LATCH_R_MASK
TMC5240_STATUS_LATCH_R_SHIFT
TMC5240_EVENT_STOP_L_MASK
TMC5240_EVENT_STOP_L_SHIFT
TMC5240_EVENT_STOP_R_MASK
TMC5240_EVENT_STOP_R_SHIFT
TMC5240_EVENT_STOP_SG_MASK
TMC5240_EVENT_STOP_SG_SHIFT
TMC5240_EVENT_POS_REACHED_MASK
TMC5240_EVENT_POS_REACHED_SHIFT
TMC5240_VELOCITY_REACHED_MASK
TMC5240_VELOCITY_REACHED_SHIFT
TMC5240_POSITION_REACHED_MASK
TMC5240_POSITION_REACHED_SHIFT
TMC5240_VZERO_MASK
TMC5240_VZERO_SHIFT
TMC5240_T_ZEROWAIT_ACTIVE_MASK
TMC5240_T_ZEROWAIT_ACTIVE_SHIFT
TMC5240_SECOND_MOVE_MASK
TMC5240_SECOND_MOVE_SHIFT
TMC5240_STATUS_SG_MASK
TMC5240_STATUS_SG_SHIFT
TMC5240_STATUS_VIRTUAL_STOP_L_MASK
TMC5240_STATUS_VIRTUAL_STOP_L_SHIFT
TMC5240_STATUS_VIRTUAL_STOP_R_MASK
TMC5240_STATUS_VIRTUAL_STOP_R_SHIFT
TMC5240_XLATCH_MASK
TMC5240_XLATCH_SHIFT
TMC5240_POL_A_MASK
TMC5240_POL_A_SHIFT
TMC5240_POL_B_MASK
TMC5240_POL_B_SHIFT
TMC5240_POL_N_MASK
TMC5240_POL_N_SHIFT
TMC5240_IGNORE_AB_MASK
TMC5240_IGNORE_AB_SHIFT
TMC5240_CLR_CONT_MASK
TMC5240_CLR_CONT_SHIFT
TMC5240_CLR_ONCE_MASK
TMC5240_CLR_ONCE_SHIFT
TMC5240_POS_NEG_EDGE_MASK
TMC5240_POS_NEG_EDGE_SHIFT
TMC5240_CLR_ENC_X_MASK
TMC5240_CLR_ENC_X_SHIFT
TMC5240_LATCH_X_ACT_MASK
TMC5240_LATCH_X_ACT_SHIFT
TMC5240_ENC_SEL_DECIMAL_MASK
TMC5240_ENC_SEL_DECIMAL_SHIFT
TMC5240_X_ENC_MASK
TMC5240_X_ENC_SHIFT
TMC5240_ENC_CONST_MASK
TMC5240_ENC_CONST_SHIFT
TMC5240_N_EVENT_MASK
TMC5240_N_EVENT_SHIFT
TMC5240_DEVIATION_WARN_MASK
TMC5240_DEVIATION_WARN_SHIFT
TMC5240_ENC_LATCH_MASK
TMC5240_ENC_LATCH_SHIFT
TMC5240_ENC_DEVIATION_MASK
TMC5240_ENC_DEVIATION_SHIFT
TMC5240_VIRTUAL_STOP_L_MASK
TMC5240_VIRTUAL_STOP_L_SHIFT
TMC5240_VIRTUAL_STOP_R_MASK
TMC5240_VIRTUAL_STOP_R_SHIFT
TMC5240_ADC_VSUPPLY_MASK
TMC5240_ADC_VSUPPLY_SHIFT
TMC5240_ADC_AIN_MASK
TMC5240_ADC_AIN_SHIFT
TMC5240_ADC_TEMP_MASK
TMC5240_ADC_TEMP_SHIFT
TMC5240_OVERVOLTAGE_VTH_MASK
TMC5240_OVERVOLTAGE_VTH_SHIFT
TMC5240_OVERTEMPPREWARNING_VTH_MASK
TMC5240_OVERTEMPPREWARNING_VTH_SHIFT
TMC5240_MSLUT_0_MASK
TMC5240_MSLUT_0_SHIFT
TMC5240_MSLUT_1_MASK
TMC5240_MSLUT_1_SHIFT
TMC5240_MSLUT_2_MASK
TMC5240_MSLUT_2_SHIFT
TMC5240_MSLUT_3_MASK
TMC5240_MSLUT_3_SHIFT
TMC5240_MSLUT_4_MASK
TMC5240_MSLUT_4_SHIFT
TMC5240_MSLUT_5_MASK
TMC5240_MSLUT_5_SHIFT
TMC5240_MSLUT_6_MASK
TMC5240_MSLUT_6_SHIFT
TMC5240_MSLUT_7_MASK
TMC5240_MSLUT_7_SHIFT
TMC5240_W0_MASK
TMC5240_W0_SHIFT
TMC5240_W1_MASK
TMC5240_W1_SHIFT
TMC5240_W2_MASK
TMC5240_W2_SHIFT
TMC5240_W3_MASK
TMC5240_W3_SHIFT
TMC5240_X1_MASK
TMC5240_X1_SHIFT
TMC5240_X2_MASK
TMC5240_X2_SHIFT
TMC5240_X3_MASK
TMC5240_X3_SHIFT
TMC5240_START_SIN_MASK
TMC5240_START_SIN_SHIFT
TMC5240_START_SIN90_MASK
TMC5240_START_SIN90_SHIFT
TMC5240_OFFSET_SIN90_MASK
TMC5240_OFFSET_SIN90_SHIFT
TMC5240_MSCNT_MASK
TMC5240_MSCNT_SHIFT
TMC5240_CUR_B_MASK
TMC5240_CUR_B_SHIFT
TMC5240_CUR_A_MASK
TMC5240_CUR_A_SHIFT
TMC5240_TOFF_MASK
TMC5240_TOFF_SHIFT
TMC5240_TFD_ALL_MASK
TMC5240_TFD_ALL_SHIFT
TMC5240_HEND_OFFSET_MASK
TMC5240_HEND_OFFSET_SHIFT
TMC5240_FD3_MASK
TMC5240_FD3_SHIFT
TMC5240_DISFDCC_MASK
TMC5240_DISFDCC_SHIFT
TMC5240_CHM_MASK
TMC5240_CHM_SHIFT
TMC5240_TBL_MASK
TMC5240_TBL_SHIFT
TMC5240_VHIGHFS_MASK
TMC5240_VHIGHFS_SHIFT
TMC5240_VHIGHCHM_MASK
TMC5240_VHIGHCHM_SHIFT
TMC5240_TPFD_MASK
TMC5240_TPFD_SHIFT
TMC5240_MRES_MASK
TMC5240_MRES_SHIFT
TMC5240_INTPOL_MASK
TMC5240_INTPOL_SHIFT
TMC5240_DEDGE_MASK
TMC5240_DEDGE_SHIFT
TMC5240_DISS2G_MASK
TMC5240_DISS2G_SHIFT
TMC5240_DISS2VS_MASK
TMC5240_DISS2VS_SHIFT
TMC5240_SEMIN_MASK
TMC5240_SEMIN_SHIFT
TMC5240_SEUP_MASK
TMC5240_SEUP_SHIFT
TMC5240_SEMAX_MASK
TMC5240_SEMAX_SHIFT
TMC5240_SEDN_MASK
TMC5240_SEDN_SHIFT
TMC5240_SEIMIN_MASK
TMC5240_SEIMIN_SHIFT
TMC5240_SGT_MASK
TMC5240_SGT_SHIFT
TMC5240_SFILT_MASK
TMC5240_SFILT_SHIFT
TMC5240_DC_TIME_MASK
TMC5240_DC_TIME_SHIFT
TMC5240_DC_SG_MASK
TMC5240_DC_SG_SHIFT
TMC5240_SG_RESULT_MASK
TMC5240_SG_RESULT_SHIFT
TMC5240_S2VSA_MASK
TMC5240_S2VSA_SHIFT
TMC5240_S2VSB_MASK
TMC5240_S2VSB_SHIFT
TMC5240_STEALTH_MASK
TMC5240_STEALTH_SHIFT
TMC5240_FSACTIVE_MASK
TMC5240_FSACTIVE_SHIFT
TMC5240_CS_ACTUAL_MASK
TMC5240_CS_ACTUAL_SHIFT
TMC5240_STALLGUARD_MASK
TMC5240_STALLGUARD_SHIFT
TMC5240_OT_MASK
TMC5240_OT_SHIFT
TMC5240_OTPW_MASK
TMC5240_OTPW_SHIFT
TMC5240_S2GA_MASK
TMC5240_S2GA_SHIFT
TMC5240_S2GB_MASK
TMC5240_S2GB_SHIFT
TMC5240_OLA_MASK
TMC5240_OLA_SHIFT
TMC5240_OLB_MASK
TMC5240_OLB_SHIFT
TMC5240_STST_MASK
TMC5240_STST_SHIFT
TMC5240_PWM_OFS_MASK
TMC5240_PWM_OFS_SHIFT
TMC5240_PWM_GRAD_MASK
TMC5240_PWM_GRAD_SHIFT
TMC5240_PWM_FREQ_MASK
TMC5240_PWM_FREQ_SHIFT
TMC5240_PWM_AUTOSCALE_MASK
TMC5240_PWM_AUTOSCALE_SHIFT
TMC5240_PWM_AUTOGRAD_MASK
TMC5240_PWM_AUTOGRAD_SHIFT
TMC5240_FREEWHEEL_MASK
TMC5240_FREEWHEEL_SHIFT
TMC5240_PWM_MEAS_SD_ENABLE_MASK
TMC5240_PWM_MEAS_SD_ENABLE_SHIFT
TMC5240_PWM_DIS_REG_STST_MASK
TMC5240_PWM_DIS_REG_STST_SHIFT
TMC5240_PWM_REG_MASK
TMC5240_PWM_REG_SHIFT
TMC5240_PWM_LIM_MASK
TMC5240_PWM_LIM_SHIFT
TMC5240_PWM_SCALE_SUM_MASK
TMC5240_PWM_SCALE_SUM_SHIFT
TMC5240_PWM_SCALE_AUTO_MASK
TMC5240_PWM_SCALE_AUTO_SHIFT
TMC5240_PWM_OFS_AUTO_MASK
TMC5240_PWM_OFS_AUTO_SHIFT
TMC5240_PWM_GRAD_AUTO_MASK
TMC5240_PWM_GRAD_AUTO_SHIFT
TMC5240_SG4_THRS_MASK
TMC5240_SG4_THRS_SHIFT
TMC5240_SG4_FILT_EN_MASK
TMC5240_SG4_FILT_EN_SHIFT
TMC5240_SG_ANGLE_OFFSET_MASK
TMC5240_SG_ANGLE_OFFSET_SHIFT
TMC5240_SG4_RESULT_MASK
TMC5240_SG4_RESULT_SHIFT
TMC5240_SG4_IND_0_MASK
TMC5240_SG4_IND_0_SHIFT
TMC5240_SG4_IND_1_MASK
TMC5240_SG4_IND_1_SHIFT
TMC5240_SG4_IND_2_MASK
TMC5240_SG4_IND_2_SHIFT
TMC5240_SG4_IND_3_MASK
TMC5240_SG4_IND_3_SHIFT
file TMC5240_Register.h

Defines

TMC5240_GCONF
TMC5240_GSTAT
TMC5240_IFCNT
TMC5240_SLAVECONF
TMC5240_INP_OUT
TMC5240_X_COMPARE
TMC5240_OTP_PROG
TMC5240_DRV_CONF
TMC5240_GLOBAL_SCALER
TMC5240_IHOLD_IRUN
TMC5240_TPOWERDOWN
TMC5240_TSTEP
TMC5240_TPWMTHRS
TMC5240_TCOOLTHRS
TMC5240_THIGH
TMC5240_RAMPMODE
TMC5240_XACTUAL
TMC5240_VACTUAL
TMC5240_VSTART
TMC5240_A1
TMC5240_V1
TMC5240_AMAX
TMC5240_VMAX
TMC5240_DMAX
TMC5240_TVMAX
TMC5240_D1
TMC5240_VSTOP
TMC5240_TZEROWAIT
TMC5240_XTARGET
TMC5240_V2
TMC5240_A2
TMC5240_D2
TMC5240_AACTUAL
TMC5240_VDCMIN
TMC5240_SWMODE
TMC5240_RAMPSTAT
TMC5240_XLATCH
TMC5240_ENCMODE
TMC5240_XENC
TMC5240_ENC_CONST
TMC5240_ENC_STATUS
TMC5240_ENC_LATCH
TMC5240_ENC_DEVIATION
TMC5240_ADC_VSUPPLY_AIN
TMC5240_ADC_TEMP
TMC5240_OTW_OV_VTH
TMC5240_MSLUT0
TMC5240_MSLUT1
TMC5240_MSLUT2
TMC5240_MSLUT3
TMC5240_MSLUT4
TMC5240_MSLUT5
TMC5240_MSLUT6
TMC5240_MSLUT7
TMC5240_MSLUTSEL
TMC5240_MSLUTSTART
TMC5240_MSCNT
TMC5240_MSCURACT
TMC5240_CHOPCONF
TMC5240_COOLCONF
TMC5240_DCCTRL
TMC5240_DRVSTATUS
TMC5240_PWMCONF
TMC5240_PWMSCALE
TMC5240_PWM_AUTO
TMC5240_SG4_THRS
TMC5240_SG4_RESULT
TMC5240_SG4_IND
file TMC5271.c
#include <tmc/ic/TMC5271/TMC5271.h>

Functions

void tmc5271_init(TMC5271TypeDef *tmc5271, uint8_t channel, ConfigurationTypeDef *config)
uint8_t tmc5271_reset(TMC5271TypeDef *tmc5271)
void tmc5271_setCallback(TMC5271TypeDef *tmc5271, tmc5271_callback callback)
uint8_t tmc5271_getSlaveAddress(TMC5271TypeDef *tmc5271)
void tmc5271_setSlaveAddress(TMC5271TypeDef *tmc5271, uint8_t slaveAddress)
static void writeConfiguration(TMC5271TypeDef *tmc5271)
void tmc5271_periodicJob(TMC5271TypeDef *tmc5271, uint32_t tick)
void tmc5271_rotate(TMC5271TypeDef *tmc5271, uint8_t motor, int32_t velocity)
void tmc5271_right(TMC5271TypeDef *tmc5271, uint8_t motor, int32_t velocity)
void tmc5271_left(TMC5271TypeDef *tmc5271, uint8_t motor, int32_t velocity)
void tmc5271_stop(TMC5271TypeDef *tmc5271, uint8_t motor)
void tmc5271_moveTo(TMC5271TypeDef *tmc5271, uint8_t motor, int32_t position, uint32_t velocityMax)
void tmc5271_moveBy(TMC5271TypeDef *tmc5271, uint8_t motor, uint32_t velocityMax, int32_t *ticks)
uint8_t tmc5271_consistencyCheck(TMC5271TypeDef *tmc5271)
file TMC5271.h
#include “tmc/helpers/API_Header.h”
#include “tmc/helpers/Constants.h”
#include “../TMC5271/TMC5271_Register.h”
#include <tmc/ic/TMC5271/TMC5271_Constants.h>
#include “../TMC5271/TMC5271_Fields.h”

Defines

TMC5271_FIELD_READ(tdef, address, mask, shift)
TMC5271_FIELD_WRITE(tdef, address, mask, shift, value)
R00
R0A
R10
R11
R2A
R2B
R30
R3A
R52
R60
R61
R62
R63
R64
R65
R66
R67
R68
R69
R6C
R70
R74

Typedefs

typedef void (*tmc5271_callback)(TMC5271TypeDef*, ConfigState)

Functions

void tmc5271_writeInt(TMC5271TypeDef *tmc5271, uint8_t address, int32_t value)
int32_t tmc5271_readInt(TMC5271TypeDef *tmc5271, uint8_t address)
void tmc5271_init(TMC5271TypeDef *tmc5271, uint8_t channel, ConfigurationTypeDef *config)
uint8_t tmc5271_reset(TMC5271TypeDef *tmc5271)
uint8_t tmc5271_restore(TMC5271TypeDef *tmc5271)
uint8_t tmc5271_getSlaveAddress(TMC5271TypeDef *tmc5271)
void tmc5271_setSlaveAddress(TMC5271TypeDef *tmc5271, uint8_t slaveAddress)
void tmc5271_setRegisterResetState(TMC5271TypeDef *tmc5271, const int32_t *resetState)
void tmc5271_setCallback(TMC5271TypeDef *tmc5271, tmc5271_callback callback)
void tmc5271_periodicJob(TMC5271TypeDef *tmc5271, uint32_t tick)
void tmc5271_rotate(TMC5271TypeDef *tmc5271, uint8_t motor, int32_t velocity)
void tmc5271_right(TMC5271TypeDef *tmc5271, uint8_t motor, int32_t velocity)
void tmc5271_left(TMC5271TypeDef *tmc5271, uint8_t motor, int32_t velocity)
void tmc5271_stop(TMC5271TypeDef *tmc5271, uint8_t motor)
void tmc5271_moveTo(TMC5271TypeDef *tmc5271, uint8_t motor, int32_t position, uint32_t velocityMax)
void tmc5271_moveBy(TMC5271TypeDef *tmc5271, uint8_t motor, uint32_t velocityMax, int32_t *ticks)
uint8_t tmc5271_consistencyCheck(TMC5271TypeDef *tmc5271)

Variables

static const TMCRegisterConstant tmc5271_RegisterConstants[] = {}
file TMC5271_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC5271_REGISTER_COUNT
TMC5271_MOTORS
TMC5271_WRITE_BIT
TMC5271_ADDRESS_MASK
TMC5271_MAX_VELOCITY
TMC5271_MAX_ACCELERATION
TMC5271_MODE_POSITION
TMC5271_MODE_VELPOS
TMC5271_MODE_VELNEG
TMC5271_MODE_HOLD
file TMC5271_Fields.h

Defines

TMC5271_EN_PWM_MODE_MASK
TMC5271_EN_PWM_MODE_SHIFT
TMC5271_MULTISTEP_FILT_MASK
TMC5271_MULTISTEP_FILT_SHIFT
TMC5271_SHAFT_MASK
TMC5271_SHAFT_SHIFT
TMC5271_DIAG0_ERROR_MASK
TMC5271_DIAG0_ERROR_SHIFT
TMC5271_DIAG0_OTPW_MASK
TMC5271_DIAG0_OTPW_SHIFT
TMC5271_DIAG0_STALL_STEP_MASK
TMC5271_DIAG0_STALL_STEP_SHIFT
TMC5271_DIAG1_STALL_DIR_MASK
TMC5271_DIAG1_STALL_DIR_SHIFT
TMC5271_DIAG1_INDEX_MASK
TMC5271_DIAG1_INDEX_SHIFT
TMC5271_DIAG0_INT_PUSHPULL_MASK
TMC5271_DIAG0_INT_PUSHPULL_SHIFT
TMC5271_DIAG1_POSCOMP_PUSHPULL_MASK
TMC5271_DIAG1_POSCOMP_PUSHPULL_SHIFT
TMC5271_SMALL_HYSTERESIS_MASK
TMC5271_SMALL_HYSTERESIS_SHIFT
TMC5271_STOP_ENABLE_MASK
TMC5271_STOP_ENABLE_SHIFT
TMC5271_DIRECT_MODE_MASK
TMC5271_DIRECT_MODE_SHIFT
TMC5271_SD_MASK
TMC5271_SD_SHIFT
TMC5271_DRV_ENN_MASK
TMC5271_DRV_ENN_SHIFT
TMC5271_QSC_STS_ENA_MASK
TMC5271_QSC_STS_ENA_SHIFT
TMC5271_DIAG0_SEL_NERROR_RAMP_MASK
TMC5271_DIAG0_SEL_NERROR_RAMP_SHIFT
TMC5271_RESET_MASK
TMC5271_RESET_SHIFT
TMC5271_DRV_ERR_MASK
TMC5271_DRV_ERR_SHIFT
TMC5271_UV_LDO_MASK
TMC5271_UV_LDO_SHIFT
TMC5271_REGISTER_RESET_MASK
TMC5271_REGISTER_RESET_SHIFT
TMC5271_VM_UVLO_MASK
TMC5271_VM_UVLO_SHIFT
TMC5271_IFCNT_MASK
TMC5271_IFCNT_SHIFT
TMC5271_SLAVEADDR_MASK
TMC5271_SLAVEADDR_SHIFT
TMC5271_SENDDELAY_MASK
TMC5271_SENDDELAY_SHIFT
TMC5271_ADC_TEMPERATURE_MASK
TMC5271_ADC_TEMPERATURE_SHIFT
TMC5271_ADC_EN_MASK
TMC5271_ADC_EN_SHIFT
TMC5271_SEL_OSCILLATOR_MASK
TMC5271_SEL_OSCILLATOR_SHIFT
TMC5271_EXT_RES_DET_MASK
TMC5271_EXT_RES_DET_SHIFT
TMC5271_OUTPUT_MASK
TMC5271_OUTPUT_SHIFT
TMC5271_QSC_STATUS_MASK
TMC5271_QSC_STATUS_SHIFT
TMC5271_SILICON_RV_MASK
TMC5271_SILICON_RV_SHIFT
TMC5271_VERSION_MASK
TMC5271_VERSION_SHIFT
TMC5271_FSR_MASK
TMC5271_FSR_SHIFT
TMC5271_FSR_IREF_MASK
TMC5271_FSR_IREF_SHIFT
TMC5271_EN_EMERGENCY_DISABLE_MASK
TMC5271_EN_EMERGENCY_DISABLE_SHIFT
TMC5271_STANDSTILL_TIME_MASK
TMC5271_STANDSTILL_TIME_SHIFT
TMC5271_GLOBALSCALER_A_MASK
TMC5271_GLOBALSCALER_A_SHIFT
TMC5271_GLOBALSCALER_B_MASK
TMC5271_GLOBALSCALER_B_SHIFT
TMC5271_RAMPMODE_MASK
TMC5271_RAMPMODE_SHIFT
TMC5271_MSLUT_ADDR_MASK
TMC5271_MSLUT_ADDR_SHIFT
TMC5271_MSLUT_DATA_MASK
TMC5271_MSLUT_DATA_SHIFT
TMC5271_X_COMPARE_MASK
TMC5271_X_COMPARE_SHIFT
TMC5271_X_COMPARE_REPEAT_MASK
TMC5271_X_COMPARE_REPEAT_SHIFT
TMC5271_IHOLD_MASK
TMC5271_IHOLD_SHIFT
TMC5271_IRUN_MASK
TMC5271_IRUN_SHIFT
TMC5271_IHOLDDELAY_MASK
TMC5271_IHOLDDELAY_SHIFT
TMC5271_IRUNDELAY_MASK
TMC5271_IRUNDELAY_SHIFT
TMC5271_TPOWERDOWN_MASK
TMC5271_TPOWERDOWN_SHIFT
TMC5271_TSTEP_MASK
TMC5271_TSTEP_SHIFT
TMC5271_TPWMTHRS_MASK
TMC5271_TPWMTHRS_SHIFT
TMC5271_TCOOLTHRS_MASK
TMC5271_TCOOLTHRS_SHIFT
TMC5271_THIGH_MASK
TMC5271_THIGH_SHIFT
TMC5271_XACTUAL_MASK
TMC5271_XACTUAL_SHIFT
TMC5271_VACTUAL_MASK
TMC5271_VACTUAL_SHIFT
TMC5271_AACTUAL_MASK
TMC5271_AACTUAL_SHIFT
TMC5271_VSTART_MASK
TMC5271_VSTART_SHIFT
TMC5271_A1_MASK
TMC5271_A1_SHIFT
TMC5271_V1_MASK
TMC5271_V1_SHIFT
TMC5271_A2_MASK
TMC5271_A2_SHIFT
TMC5271_V2_MASK
TMC5271_V2_SHIFT
TMC5271_AMAX_MASK
TMC5271_AMAX_SHIFT
TMC5271_VMAX_MASK
TMC5271_VMAX_SHIFT
TMC5271_DMAX_MASK
TMC5271_DMAX_SHIFT
TMC5271_D2_MASK
TMC5271_D2_SHIFT
TMC5271_D1_MASK
TMC5271_D1_SHIFT
TMC5271_VSTOP_MASK
TMC5271_VSTOP_SHIFT
TMC5271_TVMAX_MASK
TMC5271_TVMAX_SHIFT
TMC5271_TZEROWAIT_MASK
TMC5271_TZEROWAIT_SHIFT
TMC5271_XTARGET_MASK
TMC5271_XTARGET_SHIFT
TMC5271_VDCMIN_RESERVED_MASK
TMC5271_VDCMIN_RESERVED_SHIFT
TMC5271_VDCMIN_VDCMIN_MASK
TMC5271_VDCMIN_VDCMIN_SHIFT
TMC5271_SW_MODE_STOP_L_ENABLE_MASK
TMC5271_SW_MODE_STOP_L_ENABLE_SHIFT
TMC5271_SW_MODE_STOP_R_ENABLE_MASK
TMC5271_SW_MODE_STOP_R_ENABLE_SHIFT
TMC5271_SW_MODE_POL_STOP_L_MASK
TMC5271_SW_MODE_POL_STOP_L_SHIFT
TMC5271_SW_MODE_POL_STOP_R_MASK
TMC5271_SW_MODE_POL_STOP_R_SHIFT
TMC5271_SW_MODE_SWAP_LR_MASK
TMC5271_SW_MODE_SWAP_LR_SHIFT
TMC5271_SW_MODE_LATCH_L_ACTIVE_MASK
TMC5271_SW_MODE_LATCH_L_ACTIVE_SHIFT
TMC5271_SW_MODE_LATCH_L_INACTIVE_MASK
TMC5271_SW_MODE_LATCH_L_INACTIVE_SHIFT
TMC5271_SW_MODE_LATCH_R_ACTIVE_MASK
TMC5271_SW_MODE_LATCH_R_ACTIVE_SHIFT
TMC5271_SW_MODE_LATCH_R_INACTIVE_MASK
TMC5271_SW_MODE_LATCH_R_INACTIVE_SHIFT
TMC5271_SW_MODE_EN_LATCH_ENCODER_MASK
TMC5271_SW_MODE_EN_LATCH_ENCODER_SHIFT
TMC5271_SW_MODE_SG_STOP_MASK
TMC5271_SW_MODE_SG_STOP_SHIFT
TMC5271_SW_MODE_EN_SOFTSTOP_MASK
TMC5271_SW_MODE_EN_SOFTSTOP_SHIFT
TMC5271_SW_MODE_EN_VIRTUAL_STOP_L_MASK
TMC5271_SW_MODE_EN_VIRTUAL_STOP_L_SHIFT
TMC5271_SW_MODE_EN_VIRTUAL_STOP_R_MASK
TMC5271_SW_MODE_EN_VIRTUAL_STOP_R_SHIFT
TMC5271_SW_MODE_VIRTUAL_STEP_ENC_MASK
TMC5271_SW_MODE_VIRTUAL_STEP_ENC_SHIFT
TMC5271_STATUS_STOP_L_MASK
TMC5271_STATUS_STOP_L_SHIFT
TMC5271_STATUS_STOP_R_MASK
TMC5271_STATUS_STOP_R_SHIFT
TMC5271_STATUS_LATCH_L_MASK
TMC5271_STATUS_LATCH_L_SHIFT
TMC5271_STATUS_LATCH_R_MASK
TMC5271_STATUS_LATCH_R_SHIFT
TMC5271_EVENT_STOP_L_MASK
TMC5271_EVENT_STOP_L_SHIFT
TMC5271_EVENT_STOP_R_MASK
TMC5271_EVENT_STOP_R_SHIFT
TMC5271_EVENT_STOP_SG_MASK
TMC5271_EVENT_STOP_SG_SHIFT
TMC5271_EVENT_POS_REACHED_MASK
TMC5271_EVENT_POS_REACHED_SHIFT
TMC5271_VELOCITY_REACHED_MASK
TMC5271_VELOCITY_REACHED_SHIFT
TMC5271_POSITION_REACHED_MASK
TMC5271_POSITION_REACHED_SHIFT
TMC5271_VZERO_MASK
TMC5271_VZERO_SHIFT
TMC5271_T_ZEROWAIT_ACTIVE_MASK
TMC5271_T_ZEROWAIT_ACTIVE_SHIFT
TMC5271_SECOND_MOVE_MASK
TMC5271_SECOND_MOVE_SHIFT
TMC5271_STATUS_SG_MASK
TMC5271_STATUS_SG_SHIFT
TMC5271_STATUS_VIRTUAL_STOP_L_MASK
TMC5271_STATUS_VIRTUAL_STOP_L_SHIFT
TMC5271_STATUS_VIRTUAL_STOP_R_MASK
TMC5271_STATUS_VIRTUAL_STOP_R_SHIFT
TMC5271_XLATCH_MASK
TMC5271_XLATCH_SHIFT
TMC5271_P_POSITION_MASK
TMC5271_P_POSITION_SHIFT
TMC5271_TOLERANCE_MASK
TMC5271_TOLERANCE_SHIFT
TMC5271_TOL_ON_POS_REACHED_MASK
TMC5271_TOL_ON_POS_REACHED_SHIFT
TMC5271_X_ENC_MASK
TMC5271_X_ENC_SHIFT
TMC5271_POL_A_MASK
TMC5271_POL_A_SHIFT
TMC5271_POL_B_MASK
TMC5271_POL_B_SHIFT
TMC5271_POL_N_MASK
TMC5271_POL_N_SHIFT
TMC5271_IGNORE_AB_MASK
TMC5271_IGNORE_AB_SHIFT
TMC5271_CLR_CONT_MASK
TMC5271_CLR_CONT_SHIFT
TMC5271_CLR_ONCE_MASK
TMC5271_CLR_ONCE_SHIFT
TMC5271_POS_NEG_EDGE_MASK
TMC5271_POS_NEG_EDGE_SHIFT
TMC5271_CLR_ENC_X_MASK
TMC5271_CLR_ENC_X_SHIFT
TMC5271_LATCH_X_ACT_MASK
TMC5271_LATCH_X_ACT_SHIFT
TMC5271_ENC_SEL_DECIMAL_MASK
TMC5271_ENC_SEL_DECIMAL_SHIFT
TMC5271_NBEMF_ABN_SEL_MASK
TMC5271_NBEMF_ABN_SEL_SHIFT
TMC5271_BEMF_HYST_MASK
TMC5271_BEMF_HYST_SHIFT
TMC5271_QSC_ENC_EN_MASK
TMC5271_QSC_ENC_EN_SHIFT
TMC5271_BEMF_BLANK_TIME_MASK
TMC5271_BEMF_BLANK_TIME_SHIFT
TMC5271_BEMF_FILTER_SEL_MASK
TMC5271_BEMF_FILTER_SEL_SHIFT
TMC5271_ENC_CONST_MASK
TMC5271_ENC_CONST_SHIFT
TMC5271_N_EVENT_MASK
TMC5271_N_EVENT_SHIFT
TMC5271_DEVIATION_WARN_MASK
TMC5271_DEVIATION_WARN_SHIFT
TMC5271_ENC_LATCH_MASK
TMC5271_ENC_LATCH_SHIFT
TMC5271_ENC_DEVIATION_MASK
TMC5271_ENC_DEVIATION_SHIFT
TMC5271_VIRTUAL_STOP_L_MASK
TMC5271_VIRTUAL_STOP_L_SHIFT
TMC5271_VIRTUAL_STOP_R_MASK
TMC5271_VIRTUAL_STOP_R_SHIFT
TMC5271_MSCNT_MASK
TMC5271_MSCNT_SHIFT
TMC5271_CUR_A_MASK
TMC5271_CUR_A_SHIFT
TMC5271_CUR_B_MASK
TMC5271_CUR_B_SHIFT
TMC5271_TOFF_MASK
TMC5271_TOFF_SHIFT
TMC5271_HSTRT_TFD210_MASK
TMC5271_HSTRT_TFD210_SHIFT
TMC5271_HEND_OFFSET_MASK
TMC5271_HEND_OFFSET_SHIFT
TMC5271_FD3_MASK
TMC5271_FD3_SHIFT
TMC5271_DISFDCC_MASK
TMC5271_DISFDCC_SHIFT
TMC5271_CHM_MASK
TMC5271_CHM_SHIFT
TMC5271_TBL_MASK
TMC5271_TBL_SHIFT
TMC5271_VHIGHFS_MASK
TMC5271_VHIGHFS_SHIFT
TMC5271_VHIGHCHM_MASK
TMC5271_VHIGHCHM_SHIFT
TMC5271_TPFD_MASK
TMC5271_TPFD_SHIFT
TMC5271_MRES_MASK
TMC5271_MRES_SHIFT
TMC5271_INTPOL_MASK
TMC5271_INTPOL_SHIFT
TMC5271_DEDGE_MASK
TMC5271_DEDGE_SHIFT
TMC5271_DISS2G_MASK
TMC5271_DISS2G_SHIFT
TMC5271_DISS2VS_MASK
TMC5271_DISS2VS_SHIFT
TMC5271_SEMIN_MASK
TMC5271_SEMIN_SHIFT
TMC5271_SEUP_MASK
TMC5271_SEUP_SHIFT
TMC5271_SEMAX_MASK
TMC5271_SEMAX_SHIFT
TMC5271_SEDN_MASK
TMC5271_SEDN_SHIFT
TMC5271_SEIMIN_MASK
TMC5271_SEIMIN_SHIFT
TMC5271_SGT_MASK
TMC5271_SGT_SHIFT
TMC5271_SFILT_MASK
TMC5271_SFILT_SHIFT
TMC5271_DC_TIME_MASK
TMC5271_DC_TIME_SHIFT
TMC5271_DC_SG_MASK
TMC5271_DC_SG_SHIFT
TMC5271_SG_RESULT_MASK
TMC5271_SG_RESULT_SHIFT
TMC5271_S2VSA_MASK
TMC5271_S2VSA_SHIFT
TMC5271_S2VSB_MASK
TMC5271_S2VSB_SHIFT
TMC5271_STEALTH_MASK
TMC5271_STEALTH_SHIFT
TMC5271_FSACTIVE_MASK
TMC5271_FSACTIVE_SHIFT
TMC5271_CS_ACTUAL_MASK
TMC5271_CS_ACTUAL_SHIFT
TMC5271_STALLGUARD_MASK
TMC5271_STALLGUARD_SHIFT
TMC5271_OT_MASK
TMC5271_OT_SHIFT
TMC5271_OTPW_MASK
TMC5271_OTPW_SHIFT
TMC5271_S2GA_MASK
TMC5271_S2GA_SHIFT
TMC5271_S2GB_MASK
TMC5271_S2GB_SHIFT
TMC5271_OLA_MASK
TMC5271_OLA_SHIFT
TMC5271_OLB_MASK
TMC5271_OLB_SHIFT
TMC5271_STST_MASK
TMC5271_STST_SHIFT
TMC5271_PWM_OFS_MASK
TMC5271_PWM_OFS_SHIFT
TMC5271_PWM_GRAD_MASK
TMC5271_PWM_GRAD_SHIFT
TMC5271_PWM_FREQ_MASK
TMC5271_PWM_FREQ_SHIFT
TMC5271_PWM_AUTOSCALE_MASK
TMC5271_PWM_AUTOSCALE_SHIFT
TMC5271_PWM_AUTOGRAD_MASK
TMC5271_PWM_AUTOGRAD_SHIFT
TMC5271_FREEWHEEL_MASK
TMC5271_FREEWHEEL_SHIFT
TMC5271_PWM_MEAS_SD_ENABLE_MASK
TMC5271_PWM_MEAS_SD_ENABLE_SHIFT
TMC5271_PWM_DIS_REG_STST_MASK
TMC5271_PWM_DIS_REG_STST_SHIFT
TMC5271_PWM_REG_MASK
TMC5271_PWM_REG_SHIFT
TMC5271_PWM_LIM_MASK
TMC5271_PWM_LIM_SHIFT
TMC5271_PWM_SCALE_SUM_MASK
TMC5271_PWM_SCALE_SUM_SHIFT
TMC5271_PWM_SCALE_AUTO_MASK
TMC5271_PWM_SCALE_AUTO_SHIFT
TMC5271_PWM_OFS_AUTO_MASK
TMC5271_PWM_OFS_AUTO_SHIFT
TMC5271_PWM_GRAD_AUTO_MASK
TMC5271_PWM_GRAD_AUTO_SHIFT
TMC5271_SG4_THRS_MASK
TMC5271_SG4_THRS_SHIFT
TMC5271_SG4_FILT_EN_MASK
TMC5271_SG4_FILT_EN_SHIFT
TMC5271_SG_ANGLE_OFFSET_MASK
TMC5271_SG_ANGLE_OFFSET_SHIFT
TMC5271_SG4_RESULT_SG_RESULT_MASK
TMC5271_SG4_RESULT_SG_RESULT_SHIFT
TMC5271_IND_0_MASK
TMC5271_IND_0_SHIFT
TMC5271_IND_1_MASK
TMC5271_IND_1_SHIFT
TMC5271_IND_2_MASK
TMC5271_IND_2_SHIFT
TMC5271_IND_3_MASK
TMC5271_IND_3_SHIFT
file TMC5271_Register.h

Defines

TMC5271_GCONF
TMC5271_GSTAT
TMC5271_IFCNT
TMC5271_SLAVECONF
TMC5271_IOIN
TMC5271_DRV_CONF
TMC5271_GLOBAL_SCALER
TMC5271_RAMPMODE
TMC5271_MSLUT_ADDR
TMC5271_MSLUT_DATA
TMC5271_X_COMPARE
TMC5271_X_COMPARE_REPEAT
TMC5271_IHOLD_IRUN
TMC5271_TPOWERDOWN
TMC5271_TSTEP
TMC5271_TPWMTHRS
TMC5271_TCOOLTHRS
TMC5271_THIGH
TMC5271_XACTUAL
TMC5271_VACTUAL
TMC5271_AACTUAL
TMC5271_VSTART
TMC5271_A1
TMC5271_V1
TMC5271_A2
TMC5271_V2
TMC5271_AMAX
TMC5271_VMAX
TMC5271_DMAX
TMC5271_D2
TMC5271_D1
TMC5271_VSTOP
TMC5271_TVMAX
TMC5271_TZEROWAIT
TMC5271_XTARGET
TMC5271_VDCMIN
TMC5271_SW_MODE
TMC5271_RAMP_STAT
TMC5271_XLATCH
TMC5271_POSITION_PI_CTRL
TMC5271_X_ENC
TMC5271_ENCMODE
TMC5271_ENC_CONST
TMC5271_ENC_STATUS
TMC5271_ENC_LATCH
TMC5271_ENC_DEVIATION
TMC5271_VIRTUAL_STOP_L
TMC5271_VIRTUAL_STOP_R
TMC5271_MSCNT
TMC5271_MSCURACT
TMC5271_CHOPCONF
TMC5271_COOLCONF
TMC5271_DCCTRL
TMC5271_DRV_STATUS
TMC5271_PWMCONF
TMC5271_PWM_SCALE
TMC5271_PWM_AUTO
TMC5271_SG4_THRS
TMC5271_SG4_RESULT
TMC5271_SG4_IND
file TMC5272.c
#include “TMC5272.h”

Functions

void tmc5272_init(TMC5272TypeDef *tmc5272, uint8_t channel, ConfigurationTypeDef *config)
uint8_t tmc5272_reset(TMC5272TypeDef *tmc5272)
uint8_t tmc5272_restore(TMC5272TypeDef *tmc5272)
void tmc5272_setRegisterResetState(TMC5272TypeDef *tmc5272, const int32_t *resetState)
void tmc5272_setCallback(TMC5272TypeDef *tmc5272, tmc5272_callback callback)
uint8_t tmc5272_getSlaveAddress(TMC5272TypeDef *tmc5272)
void tmc5272_setSlaveAddress(TMC5272TypeDef *tmc5272, uint8_t slaveAddress)
static void writeConfiguration(TMC5272TypeDef *tmc5272)
void tmc5272_periodicJob(TMC5272TypeDef *tmc5272, uint32_t tick)
void tmc5272_rotate(TMC5272TypeDef *tmc5272, uint8_t motor, int32_t velocity)
void tmc5272_right(TMC5272TypeDef *tmc5272, uint8_t motor, int32_t velocity)
void tmc5272_left(TMC5272TypeDef *tmc5272, uint8_t motor, int32_t velocity)
void tmc5272_stop(TMC5272TypeDef *tmc5272, uint8_t motor)
void tmc5272_moveTo(TMC5272TypeDef *tmc5272, uint8_t motor, int32_t position, uint32_t velocityMax)
void tmc5272_moveBy(TMC5272TypeDef *tmc5272, uint8_t motor, uint32_t velocityMax, int32_t *ticks)
uint8_t tmc5272_consistencyCheck(TMC5272TypeDef *tmc5272)
file TMC5272.h
#include “tmc/helpers/API_Header.h”
#include “tmc/helpers/Constants.h”
#include “../TMC5272/TMC5272_Register.h”
#include “TMC5272_Constants.h”
#include “../TMC5272/TMC5272_Fields.h”

Defines

TMC5272_FIELD_READ(tdef, address, mask, shift)
TMC5272_FIELD_WRITE(tdef, address, mask, shift, value)
R00
R0A
R10
R11
R2A
R2B
R30
R3A
R52
R60
R61
R62
R63
R64
R65
R66
R67
R68
R69
R6C
R70
R74

Typedefs

typedef void (*tmc5272_callback)(TMC5272TypeDef*, ConfigState)

Functions

void tmc5272_writeInt(TMC5272TypeDef *tmc5272, uint8_t address, int32_t value)
int32_t tmc5272_readInt(TMC5272TypeDef *tmc5272, uint8_t address)
void tmc5272_init(TMC5272TypeDef *tmc5272, uint8_t channel, ConfigurationTypeDef *config)
uint8_t tmc5272_reset(TMC5272TypeDef *tmc5272)
uint8_t tmc5272_restore(TMC5272TypeDef *tmc5272)
uint8_t tmc5272_getSlaveAddress(TMC5272TypeDef *tmc5272)
void tmc5272_setSlaveAddress(TMC5272TypeDef *tmc5272, uint8_t slaveAddress)
void tmc5272_setRegisterResetState(TMC5272TypeDef *tmc5272, const int32_t *resetState)
void tmc5272_setCallback(TMC5272TypeDef *tmc5272, tmc5272_callback callback)
void tmc5272_periodicJob(TMC5272TypeDef *tmc5272, uint32_t tick)
void tmc5272_rotate(TMC5272TypeDef *tmc5272, uint8_t motor, int32_t velocity)
void tmc5272_right(TMC5272TypeDef *tmc5272, uint8_t motor, int32_t velocity)
void tmc5272_left(TMC5272TypeDef *tmc5272, uint8_t motor, int32_t velocity)
void tmc5272_stop(TMC5272TypeDef *tmc5272, uint8_t motor)
void tmc5272_moveTo(TMC5272TypeDef *tmc5272, uint8_t motor, int32_t position, uint32_t velocityMax)
void tmc5272_moveBy(TMC5272TypeDef *tmc5272, uint8_t motor, uint32_t velocityMax, int32_t *ticks)
uint8_t tmc5272_consistencyCheck(TMC5272TypeDef *tmc5272)
file TMC5272_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC5272_REGISTER_COUNT
TMC5272_MOTORS
TMC5272_WRITE_BIT
TMC5272_ADDRESS_MASK
TMC5272_MAX_VELOCITY
TMC5272_MAX_ACCELERATION
TMC5272_MODE_POSITION
TMC5272_MODE_VELPOS
TMC5272_MODE_VELNEG
TMC5272_MODE_HOLD
file TMC5272_Fields.h

Defines

TMC5272_GCONF_M0_EN_PWM_MODE_MASK
TMC5272_GCONF_M0_EN_PWM_MODE_SHIFT
TMC5272_GCONF_M0_MULTISTEP_FILT_MASK
TMC5272_GCONF_M0_MULTISTEP_FILT_SHIFT
TMC5272_GCONF_M0_SHAFT_MASK
TMC5272_GCONF_M0_SHAFT_SHIFT
TMC5272_GCONF_M0_DIAG0_ERROR_MASK
TMC5272_GCONF_M0_DIAG0_ERROR_SHIFT
TMC5272_GCONF_DIAG0_OTPW_MASK
TMC5272_GCONF_DIAG0_OTPW_SHIFT
TMC5272_GCONF_DIAG0_STALL_STEP_MASK
TMC5272_GCONF_DIAG0_STALL_STEP_SHIFT
TMC5272_GCONF_DIAG1_STALL_DIR_MASK
TMC5272_GCONF_DIAG1_STALL_DIR_SHIFT
TMC5272_GCONF_M0_DIAG1_INDEX_MASK
TMC5272_GCONF_M0_DIAG1_INDEX_SHIFT
TMC5272_GCONF_DIAG0_INT_PUSHPULL_MASK
TMC5272_GCONF_DIAG0_INT_PUSHPULL_SHIFT
TMC5272_GCONF_DIAG1_POSCOMP_PUSHPULL_MASK
TMC5272_GCONF_DIAG1_POSCOMP_PUSHPULL_SHIFT
TMC5272_GCONF_M0_SMALL_HYSTERESIS_MASK
TMC5272_GCONF_M0_SMALL_HYSTERESIS_SHIFT
TMC5272_GCONF_M0_STOP_ENABLE_MASK
TMC5272_GCONF_M0_STOP_ENABLE_SHIFT
TMC5272_GCONF_M0_DIRECT_MODE_MASK
TMC5272_GCONF_M0_DIRECT_MODE_SHIFT
TMC5272_GCONF_M0_SD_MASK
TMC5272_GCONF_M0_SD_SHIFT
TMC5272_GCONF_M0_DRV_ENN_MASK
TMC5272_GCONF_M0_DRV_ENN_SHIFT
TMC5272_GCONF_M1_EN_PWM_MODE_MASK
TMC5272_GCONF_M1_EN_PWM_MODE_SHIFT
TMC5272_GCONF_M1_MULTISTEP_FILT_MASK
TMC5272_GCONF_M1_MULTISTEP_FILT_SHIFT
TMC5272_GCONF_M1_SHAFT_MASK
TMC5272_GCONF_M1_SHAFT_SHIFT
TMC5272_GCONF_DIAG0_INTOUT_SEL_MASK
TMC5272_GCONF_DIAG0_INTOUT_SEL_SHIFT
TMC5272_GCONF_DIAG1_X_COMP_SEL_MASK
TMC5272_GCONF_DIAG1_X_COMP_SEL_SHIFT
TMC5272_GCONF_M1_DIAG1_INDEX_MASK
TMC5272_GCONF_M1_DIAG1_INDEX_SHIFT
TMC5272_GCONF_M1_SMALL_HYSTERESIS_MASK
TMC5272_GCONF_M1_SMALL_HYSTERESIS_SHIFT
TMC5272_GCONF_M1_STOP_ENABLE_MASK
TMC5272_GCONF_M1_STOP_ENABLE_SHIFT
TMC5272_GCONF_M1_DIRECT_MODE_MASK
TMC5272_GCONF_M1_DIRECT_MODE_SHIFT
TMC5272_GCONF_M1_SD_MASK
TMC5272_GCONF_M1_SD_SHIFT
TMC5272_GCONF_M1_DRV_ENN_MASK
TMC5272_GCONF_M1_DRV_ENN_SHIFT
TMC5272_GSTAT_RESET_MASK
TMC5272_GSTAT_RESET_SHIFT
TMC5272_GSTAT_M0_DRV_ERR_MASK
TMC5272_GSTAT_M0_DRV_ERR_SHIFT
TMC5272_GSTAT_UV_CP_MASK
TMC5272_GSTAT_UV_CP_SHIFT
TMC5272_GSTAT_REGISTER_RESET_MASK
TMC5272_GSTAT_REGISTER_RESET_SHIFT
TMC5272_GSTAT_VM_UVLO_MASK
TMC5272_GSTAT_VM_UVLO_SHIFT
TMC5272_GSTAT_M1_DRV_ERR_MASK
TMC5272_GSTAT_M1_DRV_ERR_SHIFT
TMC5272_IFCNT_MASK
TMC5272_IFCNT_SHIFT
TMC5272_SLAVECONF_SLAVEADDR_MASK
TMC5272_SLAVECONF_SLAVEADDR_SHIFT
TMC5272_SLAVECONF_SENDDELAY_MASK
TMC5272_SLAVECONF_SENDDELAY_SHIFT
TMC5272_IOIN_ADC_TEMPERATURE_MASK
TMC5272_IOIN_ADC_TEMPERATURE_SHIFT
TMC5272_IOIN_ADC_EN_MASK
TMC5272_IOIN_ADC_EN_SHIFT
TMC5272_IOIN_SEL_OSCILLATOR_MASK
TMC5272_IOIN_SEL_OSCILLATOR_SHIFT
TMC5272_IOIN_EXT_RES_DET_MASK
TMC5272_IOIN_EXT_RES_DET_SHIFT
TMC5272_IOIN_OUTPUT_MASK
TMC5272_IOIN_OUTPUT_SHIFT
TMC5272_IOIN_QSC_STATUS_MASK
TMC5272_IOIN_QSC_STATUS_SHIFT
TMC5272_IOIN_SILICON_RV_MASK
TMC5272_IOIN_SILICON_RV_SHIFT
TMC5272_IOIN_VERSION_MASK
TMC5272_IOIN_VERSION_SHIFT
TMC5272_DRV_CONF_FSR_M0_MASK
TMC5272_DRV_CONF_FSR_M0_SHIFT
TMC5272_DRV_CONF_FSR_IREF_M0_MASK
TMC5272_DRV_CONF_FSR_IREF_M0_SHIFT
TMC5272_DRV_CONF_M0_EN_EMERGENCY_DISABLE_MASK
TMC5272_DRV_CONF_M0_EN_EMERGENCY_DISABLE_SHIFT
TMC5272_DRV_CONF_M0_SEL_EM_STOP_SRC_MASK
TMC5272_DRV_CONF_M0_SEL_EM_STOP_SRC_SHIFT
TMC5272_DRV_CONF_FSR_M1_MASK
TMC5272_DRV_CONF_FSR_M1_SHIFT
TMC5272_DRV_CONF_FSR_IREF_M1_MASK
TMC5272_DRV_CONF_FSR_IREF_M1_SHIFT
TMC5272_DRV_CONF_M1_EN_EMERGENCY_DISABLE_MASK
TMC5272_DRV_CONF_M1_EN_EMERGENCY_DISABLE_SHIFT
TMC5272_DRV_CONF_M1_SEL_EM_STOP_SRC_MASK
TMC5272_DRV_CONF_M1_SEL_EM_STOP_SRC_SHIFT
TMC5272_DRV_CONF_M0_STANDSTILL_TIME_MASK
TMC5272_DRV_CONF_M0_STANDSTILL_TIME_SHIFT
TMC5272_DRV_CONF_M1_STANDSTILL_TIME_MASK
TMC5272_DRV_CONF_M1_STANDSTILL_TIME_SHIFT
TMC5272_GLOBAL_SCALER_GLOBALSCALER_M0_A_MASK
TMC5272_GLOBAL_SCALER_GLOBALSCALER_M0_A_SHIFT
TMC5272_GLOBAL_SCALER_GLOBALSCALER_M0_B_MASK
TMC5272_GLOBAL_SCALER_GLOBALSCALER_M0_B_SHIFT
TMC5272_GLOBAL_SCALER_GLOBALSCALER_M1_A_MASK
TMC5272_GLOBAL_SCALER_GLOBALSCALER_M1_A_SHIFT
TMC5272_GLOBAL_SCALER_GLOBALSCALER_M1_B_MASK
TMC5272_GLOBAL_SCALER_GLOBALSCALER_M1_B_SHIFT
TMC5272_RAMPMODE_M0_RAMPMODE_MASK
TMC5272_RAMPMODE_M0_RAMPMODE_SHIFT
TMC5272_RAMPMODE_M1_RAMPMODE_MASK
TMC5272_RAMPMODE_M1_RAMPMODE_SHIFT
TMC5272_RAMPMODE_RAMP0_HOLD_MASK
TMC5272_RAMPMODE_RAMP0_HOLD_SHIFT
TMC5272_RAMPMODE_RAMP1_HOLD_MASK
TMC5272_RAMPMODE_RAMP1_HOLD_SHIFT
TMC5272_MSLUT_ADDR_MASK
TMC5272_MSLUT_ADDR_SHIFT
TMC5272_MSLUT_SEL_START_MSLUT_DATA_MASK
TMC5272_MSLUT_SEL_START_MSLUT_DATA_SHIFT
TMC5272_X_COMPARE_MASK
TMC5272_X_COMPARE_SHIFT
TMC5272_X_COMPARE_REPEAT_MASK
TMC5272_X_COMPARE_REPEAT_SHIFT
TMC5272_IHOLD_IRUN_IHOLD_MASK
TMC5272_IHOLD_IRUN_IHOLD_SHIFT
TMC5272_IHOLD_IRUN_IRUN_MASK
TMC5272_IHOLD_IRUN_IRUN_SHIFT
TMC5272_IHOLD_IRUN_IHOLDDELAY_MASK
TMC5272_IHOLD_IRUN_IHOLDDELAY_SHIFT
TMC5272_IHOLD_IRUN_IRUNDELAY_MASK
TMC5272_IHOLD_IRUN_IRUNDELAY_SHIFT
TMC5272_TPOWERDOWN_MASK
TMC5272_TPOWERDOWN_SHIFT
TMC5272_TSTEP_MASK
TMC5272_TSTEP_SHIFT
TMC5272_TPWMTHRS_MASK
TMC5272_TPWMTHRS_SHIFT
TMC5272_TCOOLTHRS_MASK
TMC5272_TCOOLTHRS_SHIFT
TMC5272_THIGH_MASK
TMC5272_THIGH_SHIFT
TMC5272_XACTUAL_MASK
TMC5272_XACTUAL_SHIFT
TMC5272_VACTUAL_MASK
TMC5272_VACTUAL_SHIFT
TMC5272_AACTUAL_MASK
TMC5272_AACTUAL_SHIFT
TMC5272_VSTART_MASK
TMC5272_VSTART_SHIFT
TMC5272_A1_MASK
TMC5272_A1_SHIFT
TMC5272_V1_MASK
TMC5272_V1_SHIFT
TMC5272_A2_MASK
TMC5272_A2_SHIFT
TMC5272_V2_MASK
TMC5272_V2_SHIFT
TMC5272_AMAX_MASK
TMC5272_AMAX_SHIFT
TMC5272_VMAX_MASK
TMC5272_VMAX_SHIFT
TMC5272_DMAX_MASK
TMC5272_DMAX_SHIFT
TMC5272_D2_MASK
TMC5272_D2_SHIFT
TMC5272_D1_MASK
TMC5272_D1_SHIFT
TMC5272_VSTOP_MASK
TMC5272_VSTOP_SHIFT
TMC5272_TVMAX_MASK
TMC5272_TVMAX_SHIFT
TMC5272_TZEROWAIT_MASK
TMC5272_TZEROWAIT_SHIFT
TMC5272_XTARGET_MASK
TMC5272_XTARGET_SHIFT
TMC5272_VDCMIN_RESERVED_MASK
TMC5272_VDCMIN_RESERVED_SHIFT
TMC5272_VDCMIN_VDCMIN_MASK
TMC5272_VDCMIN_VDCMIN_SHIFT
TMC5272_SW_MODE_STOP_L_ENABLE_MASK
TMC5272_SW_MODE_STOP_L_ENABLE_SHIFT
TMC5272_SW_MODE_STOP_R_ENABLE_MASK
TMC5272_SW_MODE_STOP_R_ENABLE_SHIFT
TMC5272_SW_MODE_POL_STOP_L_MASK
TMC5272_SW_MODE_POL_STOP_L_SHIFT
TMC5272_SW_MODE_POL_STOP_R_MASK
TMC5272_SW_MODE_POL_STOP_R_SHIFT
TMC5272_SW_MODE_SWAP_LR_MASK
TMC5272_SW_MODE_SWAP_LR_SHIFT
TMC5272_SW_MODE_LATCH_L_ACTIVE_MASK
TMC5272_SW_MODE_LATCH_L_ACTIVE_SHIFT
TMC5272_SW_MODE_LATCH_L_INACTIVE_MASK
TMC5272_SW_MODE_LATCH_L_INACTIVE_SHIFT
TMC5272_SW_MODE_LATCH_R_ACTIVE_MASK
TMC5272_SW_MODE_LATCH_R_ACTIVE_SHIFT
TMC5272_SW_MODE_LATCH_R_INACTIVE_MASK
TMC5272_SW_MODE_LATCH_R_INACTIVE_SHIFT
TMC5272_SW_MODE_EN_LATCH_ENCODER_MASK
TMC5272_SW_MODE_EN_LATCH_ENCODER_SHIFT
TMC5272_SW_MODE_SG_STOP_MASK
TMC5272_SW_MODE_SG_STOP_SHIFT
TMC5272_SW_MODE_EN_SOFTSTOP_MASK
TMC5272_SW_MODE_EN_SOFTSTOP_SHIFT
TMC5272_SW_MODE_EN_VIRTUAL_STOP_L_MASK
TMC5272_SW_MODE_EN_VIRTUAL_STOP_L_SHIFT
TMC5272_SW_MODE_EN_VIRTUAL_STOP_R_MASK
TMC5272_SW_MODE_EN_VIRTUAL_STOP_R_SHIFT
TMC5272_SW_MODE_VIRTUAL_STEP_ENC_MASK
TMC5272_SW_MODE_VIRTUAL_STEP_ENC_SHIFT
TMC5272_RAMP_STAT_STATUS_STOP_L_MASK
TMC5272_RAMP_STAT_STATUS_STOP_L_SHIFT
TMC5272_RAMP_STAT_STATUS_STOP_R_MASK
TMC5272_RAMP_STAT_STATUS_STOP_R_SHIFT
TMC5272_RAMP_STAT_STATUS_LATCH_L_MASK
TMC5272_RAMP_STAT_STATUS_LATCH_L_SHIFT
TMC5272_RAMP_STAT_STATUS_LATCH_R_MASK
TMC5272_RAMP_STAT_STATUS_LATCH_R_SHIFT
TMC5272_RAMP_STAT_EVENT_STOP_L_MASK
TMC5272_RAMP_STAT_EVENT_STOP_L_SHIFT
TMC5272_RAMP_STAT_EVENT_STOP_R_MASK
TMC5272_RAMP_STAT_EVENT_STOP_R_SHIFT
TMC5272_RAMP_STAT_EVENT_STOP_SG_MASK
TMC5272_RAMP_STAT_EVENT_STOP_SG_SHIFT
TMC5272_RAMP_STAT_EVENT_POS_REACHED_MASK
TMC5272_RAMP_STAT_EVENT_POS_REACHED_SHIFT
TMC5272_RAMP_STAT_VELOCITY_REACHED_MASK
TMC5272_RAMP_STAT_VELOCITY_REACHED_SHIFT
TMC5272_RAMP_STAT_POSITION_REACHED_MASK
TMC5272_RAMP_STAT_POSITION_REACHED_SHIFT
TMC5272_RAMP_STAT_VZERO_MASK
TMC5272_RAMP_STAT_VZERO_SHIFT
TMC5272_RAMP_STAT_T_ZEROWAIT_ACTIVE_MASK
TMC5272_RAMP_STAT_T_ZEROWAIT_ACTIVE_SHIFT
TMC5272_RAMP_STAT_SECOND_MOVE_MASK
TMC5272_RAMP_STAT_SECOND_MOVE_SHIFT
TMC5272_RAMP_STAT_STATUS_SG_MASK
TMC5272_RAMP_STAT_STATUS_SG_SHIFT
TMC5272_RAMP_STAT_STATUS_VIRTUAL_STOP_L_MASK
TMC5272_RAMP_STAT_STATUS_VIRTUAL_STOP_L_SHIFT
TMC5272_RAMP_STAT_STATUS_VIRTUAL_STOP_R_MASK
TMC5272_RAMP_STAT_STATUS_VIRTUAL_STOP_R_SHIFT
TMC5272_XLATCH_MASK
TMC5272_XLATCH_SHIFT
TMC5272_POSITION_PI_CTRL_POSITION_PI_CTRL_REGS_MASK
TMC5272_POSITION_PI_CTRL_POSITION_PI_CTRL_REGS_SHIFT
TMC5272_X_ENC_MASK
TMC5272_X_ENC_SHIFT
TMC5272_ENCMODE_POL_A_MASK
TMC5272_ENCMODE_POL_A_SHIFT
TMC5272_ENCMODE_POL_B_MASK
TMC5272_ENCMODE_POL_B_SHIFT
TMC5272_ENCMODE_POL_N_MASK
TMC5272_ENCMODE_POL_N_SHIFT
TMC5272_ENCMODE_IGNORE_AB_MASK
TMC5272_ENCMODE_IGNORE_AB_SHIFT
TMC5272_ENCMODE_CLR_CONT_MASK
TMC5272_ENCMODE_CLR_CONT_SHIFT
TMC5272_ENCMODE_CLR_ONCE_MASK
TMC5272_ENCMODE_CLR_ONCE_SHIFT
TMC5272_ENCMODE_POS_NEG_EDGE_MASK
TMC5272_ENCMODE_POS_NEG_EDGE_SHIFT
TMC5272_ENCMODE_CLR_ENC_X_MASK
TMC5272_ENCMODE_CLR_ENC_X_SHIFT
TMC5272_ENCMODE_LATCH_X_ACT_MASK
TMC5272_ENCMODE_LATCH_X_ACT_SHIFT
TMC5272_ENCMODE_ENC_SEL_DECIMAL_MASK
TMC5272_ENCMODE_ENC_SEL_DECIMAL_SHIFT
TMC5272_ENCMODE_NBEMF_ABN_SEL_MASK
TMC5272_ENCMODE_NBEMF_ABN_SEL_SHIFT
TMC5272_ENCMODE_BEMF_HYST_MASK
TMC5272_ENCMODE_BEMF_HYST_SHIFT
TMC5272_ENCMODE_BEMF_BLANK_TIME_MASK
TMC5272_ENCMODE_BEMF_BLANK_TIME_SHIFT
TMC5272_ENC_CONST_MASK
TMC5272_ENC_CONST_SHIFT
TMC5272_ENC_STATUS_N_EVENT_MASK
TMC5272_ENC_STATUS_N_EVENT_SHIFT
TMC5272_ENC_STATUS_DEVIATION_WARN_MASK
TMC5272_ENC_STATUS_DEVIATION_WARN_SHIFT
TMC5272_ENC_LATCH_MASK
TMC5272_ENC_LATCH_SHIFT
TMC5272_ENC_DEVIATION_MASK
TMC5272_ENC_DEVIATION_SHIFT
TMC5272_VIRTUAL_STOP_L_MASK
TMC5272_VIRTUAL_STOP_L_SHIFT
TMC5272_VIRTUAL_STOP_R_MASK
TMC5272_VIRTUAL_STOP_R_SHIFT
TMC5272_MSCNT_MASK
TMC5272_MSCNT_SHIFT
TMC5272_MSCURACT_CUR_A_MASK
TMC5272_MSCURACT_CUR_A_SHIFT
TMC5272_MSCURACT_CUR_B_MASK
TMC5272_MSCURACT_CUR_B_SHIFT
TMC5272_CHOPCONF_TOFF_MASK
TMC5272_CHOPCONF_TOFF_SHIFT
TMC5272_CHOPCONF_HSTRT_TFD210_MASK
TMC5272_CHOPCONF_HSTRT_TFD210_SHIFT
TMC5272_CHOPCONF_HEND_OFFSET_MASK
TMC5272_CHOPCONF_HEND_OFFSET_SHIFT
TMC5272_CHOPCONF_FD3_MASK
TMC5272_CHOPCONF_FD3_SHIFT
TMC5272_CHOPCONF_DISFDCC_MASK
TMC5272_CHOPCONF_DISFDCC_SHIFT
TMC5272_CHOPCONF_CHM_MASK
TMC5272_CHOPCONF_CHM_SHIFT
TMC5272_CHOPCONF_TBL_MASK
TMC5272_CHOPCONF_TBL_SHIFT
TMC5272_CHOPCONF_VHIGHFS_MASK
TMC5272_CHOPCONF_VHIGHFS_SHIFT
TMC5272_CHOPCONF_VHIGHCHM_MASK
TMC5272_CHOPCONF_VHIGHCHM_SHIFT
TMC5272_CHOPCONF_TPFD_MASK
TMC5272_CHOPCONF_TPFD_SHIFT
TMC5272_CHOPCONF_MRES_MASK
TMC5272_CHOPCONF_MRES_SHIFT
TMC5272_CHOPCONF_INTPOL_MASK
TMC5272_CHOPCONF_INTPOL_SHIFT
TMC5272_CHOPCONF_DEDGE_MASK
TMC5272_CHOPCONF_DEDGE_SHIFT
TMC5272_CHOPCONF_DISS2G_MASK
TMC5272_CHOPCONF_DISS2G_SHIFT
TMC5272_CHOPCONF_DISS2VS_MASK
TMC5272_CHOPCONF_DISS2VS_SHIFT
TMC5272_COOLCONF_SEMIN_MASK
TMC5272_COOLCONF_SEMIN_SHIFT
TMC5272_COOLCONF_SEUP_MASK
TMC5272_COOLCONF_SEUP_SHIFT
TMC5272_COOLCONF_SEMAX_MASK
TMC5272_COOLCONF_SEMAX_SHIFT
TMC5272_COOLCONF_SEDN_MASK
TMC5272_COOLCONF_SEDN_SHIFT
TMC5272_COOLCONF_SEIMIN_MASK
TMC5272_COOLCONF_SEIMIN_SHIFT
TMC5272_COOLCONF_SGT_MASK
TMC5272_COOLCONF_SGT_SHIFT
TMC5272_COOLCONF_SFILT_MASK
TMC5272_COOLCONF_SFILT_SHIFT
TMC5272_DCCTRL_DC_TIME_MASK
TMC5272_DCCTRL_DC_TIME_SHIFT
TMC5272_DCCTRL_DC_SG_MASK
TMC5272_DCCTRL_DC_SG_SHIFT
TMC5272_DRV_STATUS_SG_RESULT_MASK
TMC5272_DRV_STATUS_SG_RESULT_SHIFT
TMC5272_DRV_STATUS_S2VSA_MASK
TMC5272_DRV_STATUS_S2VSA_SHIFT
TMC5272_DRV_STATUS_S2VSB_MASK
TMC5272_DRV_STATUS_S2VSB_SHIFT
TMC5272_DRV_STATUS_STEALTH_MASK
TMC5272_DRV_STATUS_STEALTH_SHIFT
TMC5272_DRV_STATUS_FSACTIVE_MASK
TMC5272_DRV_STATUS_FSACTIVE_SHIFT
TMC5272_DRV_STATUS_CS_ACTUAL_MASK
TMC5272_DRV_STATUS_CS_ACTUAL_SHIFT
TMC5272_DRV_STATUS_STALLGUARD_MASK
TMC5272_DRV_STATUS_STALLGUARD_SHIFT
TMC5272_DRV_STATUS_OT_MASK
TMC5272_DRV_STATUS_OT_SHIFT
TMC5272_DRV_STATUS_OTPW_MASK
TMC5272_DRV_STATUS_OTPW_SHIFT
TMC5272_DRV_STATUS_S2GA_MASK
TMC5272_DRV_STATUS_S2GA_SHIFT
TMC5272_DRV_STATUS_S2GB_MASK
TMC5272_DRV_STATUS_S2GB_SHIFT
TMC5272_DRV_STATUS_OLA_MASK
TMC5272_DRV_STATUS_OLA_SHIFT
TMC5272_DRV_STATUS_OLB_MASK
TMC5272_DRV_STATUS_OLB_SHIFT
TMC5272_DRV_STATUS_STST_MASK
TMC5272_DRV_STATUS_STST_SHIFT
TMC5272_PWMCONF_PWM_OFS_MASK
TMC5272_PWMCONF_PWM_OFS_SHIFT
TMC5272_PWMCONF_PWM_GRAD_MASK
TMC5272_PWMCONF_PWM_GRAD_SHIFT
TMC5272_PWMCONF_PWM_FREQ_MASK
TMC5272_PWMCONF_PWM_FREQ_SHIFT
TMC5272_PWMCONF_PWM_AUTOSCALE_MASK
TMC5272_PWMCONF_PWM_AUTOSCALE_SHIFT
TMC5272_PWMCONF_PWM_AUTOGRAD_MASK
TMC5272_PWMCONF_PWM_AUTOGRAD_SHIFT
TMC5272_PWMCONF_FREEWHEEL_MASK
TMC5272_PWMCONF_FREEWHEEL_SHIFT
TMC5272_PWMCONF_PWM_MEAS_SD_ENABLE_MASK
TMC5272_PWMCONF_PWM_MEAS_SD_ENABLE_SHIFT
TMC5272_PWMCONF_PWM_DIS_REG_STST_MASK
TMC5272_PWMCONF_PWM_DIS_REG_STST_SHIFT
TMC5272_PWMCONF_PWM_REG_MASK
TMC5272_PWMCONF_PWM_REG_SHIFT
TMC5272_PWMCONF_PWM_LIM_MASK
TMC5272_PWMCONF_PWM_LIM_SHIFT
TMC5272_PWM_SCALE_PWM_SCALE_SUM_MASK
TMC5272_PWM_SCALE_PWM_SCALE_SUM_SHIFT
TMC5272_PWM_SCALE_PWM_SCALE_AUTO_MASK
TMC5272_PWM_SCALE_PWM_SCALE_AUTO_SHIFT
TMC5272_PWM_AUTO_PWM_OFS_AUTO_MASK
TMC5272_PWM_AUTO_PWM_OFS_AUTO_SHIFT
TMC5272_PWM_AUTO_PWM_GRAD_AUTO_MASK
TMC5272_PWM_AUTO_PWM_GRAD_AUTO_SHIFT
TMC5272_SG4_THRS_SG4_THRS_MASK
TMC5272_SG4_THRS_SG4_THRS_SHIFT
TMC5272_SG4_THRS_SG4_FILT_EN_MASK
TMC5272_SG4_THRS_SG4_FILT_EN_SHIFT
TMC5272_SG4_THRS_SG_ANGLE_OFFSET_MASK
TMC5272_SG4_THRS_SG_ANGLE_OFFSET_SHIFT
TMC5272_SG4_RESULT_SG_RESULT_MASK
TMC5272_SG4_RESULT_SG_RESULT_SHIFT
TMC5272_SG4_IND_SG4_IND_0_MASK
TMC5272_SG4_IND_SG4_IND_0_SHIFT
TMC5272_SG4_IND_SG4_IND_1_MASK
TMC5272_SG4_IND_SG4_IND_1_SHIFT
TMC5272_SG4_IND_SG4_IND_2_MASK
TMC5272_SG4_IND_SG4_IND_2_SHIFT
TMC5272_SG4_IND_SG4_IND_3_MASK
TMC5272_SG4_IND_SG4_IND_3_SHIFT
file TMC5272_Register.h

Defines

MOTOR_ADDR(m)
TMC5272_GCONF
TMC5272_GSTAT
TMC5272_IFCNT
TMC5272_SLAVECONF
TMC5272_IOIN
TMC5272_DRV_CONF
TMC5272_GLOBAL_SCALER
TMC5272_RAMPMODE
TMC5272_MSLUT_ADDR
TMC5272_MSLUT_SEL_START
TMC5272_X_COMPARE(motor)
TMC5272_X_COMPARE_REPEAT(motor)
TMC5272_IHOLD_IRUN(motor)
TMC5272_TPOWERDOWN(motor)
TMC5272_TSTEP(motor)
TMC5272_TPWMTHRS(motor)
TMC5272_TCOOLTHRS(motor)
TMC5272_THIGH(motor)
TMC5272_XACTUAL(motor)
TMC5272_VACTUAL(motor)
TMC5272_AACTUAL(motor)
TMC5272_VSTART(motor)
TMC5272_A1(motor)
TMC5272_V1(motor)
TMC5272_A2(motor)
TMC5272_V2(motor)
TMC5272_AMAX(motor)
TMC5272_VMAX(motor)
TMC5272_DMAX(motor)
TMC5272_D2(motor)
TMC5272_D1(motor)
TMC5272_VSTOP(motor)
TMC5272_TVMAX(motor)
TMC5272_TZEROWAIT(motor)
TMC5272_XTARGET(motor)
TMC5272_VDCMIN(motor)
TMC5272_SW_MODE(motor)
TMC5272_RAMP_STAT(motor)
TMC5272_XLATCH(motor)
TMC5272_POSITION_PI_CTRL(motor)
TMC5272_X_ENC(motor)
TMC5272_ENCMODE(motor)
TMC5272_ENC_CONST(motor)
TMC5272_ENC_STATUS(motor)
TMC5272_ENC_LATCH(motor)
TMC5272_ENC_DEVIATION(motor)
TMC5272_VIRTUAL_STOP_L(motor)
TMC5272_VIRTUAL_STOP_R(motor)
TMC5272_MSCNT(motor)
TMC5272_MSCURACT(motor)
TMC5272_CHOPCONF(motor)
TMC5272_COOLCONF(motor)
TMC5272_DCCTRL(motor)
TMC5272_DRV_STATUS(motor)
TMC5272_PWMCONF(motor)
TMC5272_PWM_SCALE(motor)
TMC5272_PWM_AUTO(motor)
TMC5272_SG4_THRS(motor)
TMC5272_SG4_RESULT(motor)
TMC5272_SG4_IND(motor)
file TMC6100.c
#include “TMC6100.h”

Functions

uint8_t tmc6100_readwriteByte(uint8_t motor, uint8_t data, uint8_t lastTransfer)
int32_t tmc6100_readInt(uint8_t motor, uint8_t address)
void tmc6100_writeInt(uint8_t motor, uint8_t address, int32_t value)
file TMC6100.h
#include “tmc/helpers/API_Header.h”
#include “TMC6100_Constants.h”
#include “TMC6100_Register.h”
#include “TMC6100_Fields.h”

Functions

int32_t tmc6100_readInt(uint8_t motor, uint8_t address)
void tmc6100_writeInt(uint8_t motor, uint8_t address, int32_t value)
file TMC6100_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC6100_MOTORS
TMC6100_WRITE_BIT
TMC6100_ADDRESS_MASK
TMC6100_MAX_VELOCITY
TMC6100_MAX_ACCELERATION
file TMC6100_Fields.h

Defines

TMC6100_DISABLE_MASK
TMC6100_DISABLE_SHIFT
TMC6100_SINGLELINE_MASK
TMC6100_SINGLELINE_SHIFT
TMC6100_FAULTDIRECT_MASK
TMC6100_FAULTDIRECT_SHIFT
TMC6100_UNUSED_MASK
TMC6100_UNUSED_SHIFT
TMC6100_AMPLIFICATION_MASK
TMC6100_AMPLIFICATION_SHIFT
TMC6100_CURRENT_ZERO_MASK
TMC6100_CURRENT_ZERO_SHIFT
TMC6100_TEST_MODE_MASK
TMC6100_TEST_MODE_SHIFT
TMC6100_RESET_MASK
TMC6100_RESET_SHIFT
TMC6100_DRV_OTPW_MASK
TMC6100_DRV_OTPW_SHIFT
TMC6100_DRV_OT_MASK
TMC6100_DRV_OT_SHIFT
TMC6100_UV_CP_MASK
TMC6100_UV_CP_SHIFT
TMC6100_SHORTDET_U_MASK
TMC6100_SHORTDET_U_SHIFT
TMC6100_S2VSU_MASK
TMC6100_S2VSU_SHIFT
TMC6100_SHORTDET_V_MASK
TMC6100_SHORTDET_V_SHIFT
TMC6100_S2GV_MASK
TMC6100_S2GV_SHIFT
TMC6100_S2VSV_MASK
TMC6100_S2VSV_SHIFT
TMC6100_SHORTDET_W_MASK
TMC6100_SHORTDET_W_SHIFT
TMC6100_S2VSW_MASK
TMC6100_S2VSW_SHIFT
TMC6100_UL_MASK
TMC6100_UL_SHIFT
TMC6100_UH_MASK
TMC6100_UH_SHIFT
TMC6100_VL_MASK
TMC6100_VL_SHIFT
TMC6100_VH_MASK
TMC6100_VH_SHIFT
TMC6100_WL_MASK
TMC6100_WL_SHIFT
TMC6100_WH_MASK
TMC6100_WH_SHIFT
TMC6100_DRV_EN_MASK
TMC6100_DRV_EN_SHIFT
TMC6100_OTPW_MASK
TMC6100_OTPW_SHIFT
TMC6100_OT136C_MASK
TMC6100_OT136C_SHIFT
TMC6100_OT143C_MASK
TMC6100_OT143C_SHIFT
TMC6100_OT150C_MASK
TMC6100_OT150C_SHIFT
TMC6100_VERSION_MASK
TMC6100_VERSION_SHIFT
TMC6100_OTPBIT_MASK
TMC6100_OTPBIT_SHIFT
TMC6100_OTPBYTE_MASK
TMC6100_OTPBYTE_SHIFT
TMC6100_OTPMAGIC_MASK
TMC6100_OTPMAGIC_SHIFT
TMC6100_OTP_BBM_MASK
TMC6100_OTP_BBM_SHIFT
TMC6100_OTP_S2_LEVEL_MASK
TMC6100_OTP_S2_LEVEL_SHIFT
TMC6100_OTP_FCLKTRIM_MASK
TMC6100_OTP_FCLKTRIM_SHIFT
TMC6100_FCLKTRIM_MASK
TMC6100_FCLKTRIM_SHIFT
TMC6100_S2VS_LEVEL_MASK
TMC6100_S2VS_LEVEL_SHIFT
TMC6100_S2GND_LEVEL_MASK
TMC6100_S2GND_LEVEL_SHIFT
TMC6100_SHORTFILTER_MASK
TMC6100_SHORTFILTER_SHIFT
TMC6100_SHORTDELAY_MASK
TMC6100_SHORTDELAY_SHIFT
TMC6100_RETRY_MASK
TMC6100_RETRY_SHIFT
TMC6100_PROTECT_PARALLEL_MASK
TMC6100_PROTECT_PARALLEL_SHIFT
TMC6100_DISABLE_S2G_MASK
TMC6100_DISABLE_S2G_SHIFT
TMC6100_DISABLE_S2VS_MASK
TMC6100_DISABLE_S2VS_SHIFT
TMC6100_BBMCLKS_MASK
TMC6100_BBMCLKS_SHIFT
TMC6100_OTSELECT_MASK
TMC6100_OTSELECT_SHIFT
TMC6100_DRVSTRENGTH_MASK
TMC6100_DRVSTRENGTH_SHIFT
file TMC6100_Register.h

Defines

TMC6100_GCONF
TMC6100_GSTAT
TMC6100_IOIN_OUTPUT
TMC6100_OTP_PROG
TMC6100_OTP_READ
TMC6100_FACTORY_CONF
TMC6100_SHORT_CONF
TMC6100_DRV_CONF
file TMC6200.c
#include “TMC6200.h”

Functions

uint8_t tmc6200_readwriteByte(uint8_t motor, uint8_t data, uint8_t lastTransfer)
int32_t tmc6200_readInt(uint8_t motor, uint8_t address)
void tmc6200_writeInt(uint8_t motor, uint8_t address, int32_t value)
file TMC6200.h
#include “tmc/helpers/API_Header.h”
#include “TMC6200_Register.h”
#include “TMC6200_Constants.h”
#include “TMC6200_Fields.h”

Defines

TMC6200_FIELD_READ(tdef, address, mask, shift)
TMC6200_FIELD_UPDATE(tdef, address, mask, shift, value)

Functions

int32_t tmc6200_readInt(uint8_t motor, uint8_t address)
void tmc6200_writeInt(uint8_t motor, uint8_t address, int32_t value)
file TMC6200_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC6200_MOTORS
TMC6200_WRITE_BIT
TMC6200_ADDRESS_MASK
TMC6200_MAX_VELOCITY
TMC6200_MAX_ACCELERATION
file TMC6200_Fields.h

Defines

TMC6200_DISABLE_MASK
TMC6200_DISABLE_SHIFT
TMC6200_SINGLELINE_MASK
TMC6200_SINGLELINE_SHIFT
TMC6200_FAULTDIRECT_MASK
TMC6200_FAULTDIRECT_SHIFT
TMC6200_UNUSED_MASK
TMC6200_UNUSED_SHIFT
TMC6200_AMPLIFICATION_MASK
TMC6200_AMPLIFICATION_SHIFT
TMC6200_CURRENT_ZERO_MASK
TMC6200_CURRENT_ZERO_SHIFT
TMC6200_TEST_MODE_MASK
TMC6200_TEST_MODE_SHIFT
TMC6200_RESET_MASK
TMC6200_RESET_SHIFT
TMC6200_DRV_OTPW_MASK
TMC6200_DRV_OTPW_SHIFT
TMC6200_DRV_OT_MASK
TMC6200_DRV_OT_SHIFT
TMC6200_UV_CP_MASK
TMC6200_UV_CP_SHIFT
TMC6200_SHORTDET_U_MASK
TMC6200_SHORTDET_U_SHIFT
TMC6200_S2VSU_MASK
TMC6200_S2VSU_SHIFT
TMC6200_SHORTDET_V_MASK
TMC6200_SHORTDET_V_SHIFT
TMC6200_S2GV_MASK
TMC6200_S2GV_SHIFT
TMC6200_S2VSV_MASK
TMC6200_S2VSV_SHIFT
TMC6200_SHORTDET_W_MASK
TMC6200_SHORTDET_W_SHIFT
TMC6200_S2VSW_MASK
TMC6200_S2VSW_SHIFT
TMC6200_UL_MASK
TMC6200_UL_SHIFT
TMC6200_UH_MASK
TMC6200_UH_SHIFT
TMC6200_VL_MASK
TMC6200_VL_SHIFT
TMC6200_VH_MASK
TMC6200_VH_SHIFT
TMC6200_WL_MASK
TMC6200_WL_SHIFT
TMC6200_WH_MASK
TMC6200_WH_SHIFT
TMC6200_DRV_EN_MASK
TMC6200_DRV_EN_SHIFT
TMC6200_OTPW_MASK
TMC6200_OTPW_SHIFT
TMC6200_OT136C_MASK
TMC6200_OT136C_SHIFT
TMC6200_OT143C_MASK
TMC6200_OT143C_SHIFT
TMC6200_OT150C_MASK
TMC6200_OT150C_SHIFT
TMC6200_VERSION_MASK
TMC6200_VERSION_SHIFT
TMC6200_OTPBIT_MASK
TMC6200_OTPBIT_SHIFT
TMC6200_OTPBYTE_MASK
TMC6200_OTPBYTE_SHIFT
TMC6200_OTPMAGIC_MASK
TMC6200_OTPMAGIC_SHIFT
TMC6200_OTP_BBM_MASK
TMC6200_OTP_BBM_SHIFT
TMC6200_OTP_S2_LEVEL_MASK
TMC6200_OTP_S2_LEVEL_SHIFT
TMC6200_OTP_FCLKTRIM_MASK
TMC6200_OTP_FCLKTRIM_SHIFT
TMC6200_FCLKTRIM_MASK
TMC6200_FCLKTRIM_SHIFT
TMC6200_S2VS_LEVEL_MASK
TMC6200_S2VS_LEVEL_SHIFT
TMC6200_S2GND_LEVEL_MASK
TMC6200_S2GND_LEVEL_SHIFT
TMC6200_SHORTFILTER_MASK
TMC6200_SHORTFILTER_SHIFT
TMC6200_SHORTDELAY_MASK
TMC6200_SHORTDELAY_SHIFT
TMC6200_RETRY_MASK
TMC6200_RETRY_SHIFT
TMC6200_PROTECT_PARALLEL_MASK
TMC6200_PROTECT_PARALLEL_SHIFT
TMC6200_DISABLE_S2G_MASK
TMC6200_DISABLE_S2G_SHIFT
TMC6200_DISABLE_S2VS_MASK
TMC6200_DISABLE_S2VS_SHIFT
TMC6200_BBMCLKS_MASK
TMC6200_BBMCLKS_SHIFT
TMC6200_OTSELECT_MASK
TMC6200_OTSELECT_SHIFT
TMC6200_DRVSTRENGTH_MASK
TMC6200_DRVSTRENGTH_SHIFT
file TMC6200_Register.h

Defines

TMC6200_GCONF
TMC6200_GSTAT
TMC6200_IOIN_OUTPUT
TMC6200_OTP_PROG
TMC6200_OTP_READ
TMC6200_FACTORY_CONF
TMC6200_SHORT_CONF
TMC6200_DRV_CONF
file TMC7300.c
#include “TMC7300.h”

Functions

void tmc7300_readWriteArray(uint8_t channel, uint8_t *data, size_t writeLength, size_t readLength)
uint8_t tmc7300_CRC8(uint8_t *data, size_t length)
void tmc7300_writeInt(TMC7300TypeDef *tmc7300, uint8_t address, int32_t value)
int32_t tmc7300_readInt(TMC7300TypeDef *tmc7300, uint8_t address)
void tmc7300_init(TMC7300TypeDef *tmc7300, uint8_t channel, ConfigurationTypeDef *tmc7300_config, const int32_t *registerResetState)
static void fillShadowRegisters(TMC7300TypeDef *tmc7300)
static void writeConfiguration(TMC7300TypeDef *tmc7300)
void tmc7300_setRegisterResetState(TMC7300TypeDef *tmc7300, const int32_t *resetState)
void tmc7300_setCallback(TMC7300TypeDef *tmc7300, tmc7300_callback callback)
void tmc7300_periodicJob(TMC7300TypeDef *tmc7300, uint32_t tick)
uint8_t tmc7300_reset(TMC7300TypeDef *tmc7300)
uint8_t tmc7300_restore(TMC7300TypeDef *tmc7300)
uint8_t tmc7300_get_slave(TMC7300TypeDef *tmc7300)
void tmc7300_set_slave(TMC7300TypeDef *tmc7300, uint8_t slaveAddress)
uint8_t tmc7300_getStandby(TMC7300TypeDef *tmc7300)
void tmc7300_setStandby(TMC7300TypeDef *tmc7300, uint8_t standbyState)
uint8_t tmc7300_consistencyCheck(TMC7300TypeDef *tmc7300)
file TMC7300.h
#include “tmc/helpers/Constants.h”
#include “tmc/helpers/API_Header.h”
#include “TMC7300_Constants.h”
#include “TMC7300_Fields.h”
#include “TMC7300_Register.h”

Defines

TMC7300_FIELD_READ(tdef, address, mask, shift)
TMC7300_FIELD_WRITE(tdef, address, mask, shift, value)
R00

Typedefs

typedef void (*tmc7300_callback)(TMC7300TypeDef*, ConfigState)

Functions

void tmc7300_writeInt(TMC7300TypeDef *tmc7300, uint8_t address, int32_t value)
int32_t tmc7300_readInt(TMC7300TypeDef *tmc7300, uint8_t address)
void tmc7300_init(TMC7300TypeDef *tmc7300, uint8_t channel, ConfigurationTypeDef *tmc7300_config, const int32_t *registerResetState)
uint8_t tmc7300_reset(TMC7300TypeDef *tmc7300)
uint8_t tmc7300_restore(TMC7300TypeDef *tmc7300)
void tmc7300_setRegisterResetState(TMC7300TypeDef *tmc7300, const int32_t *resetState)
void tmc7300_setCallback(TMC7300TypeDef *tmc7300, tmc7300_callback callback)
void tmc7300_periodicJob(TMC7300TypeDef *tmc7300, uint32_t tick)
uint8_t tmc7300_get_slave(TMC7300TypeDef *tmc7300)
void tmc7300_set_slave(TMC7300TypeDef *tmc7300, uint8_t slaveAddress)
uint8_t tmc7300_getStandby(TMC7300TypeDef *tmc7300)
void tmc7300_setStandby(TMC7300TypeDef *tmc7300, uint8_t standbyState)
uint8_t tmc7300_consistencyCheck(TMC7300TypeDef *tmc7300)

Variables

static const uint8_t tmc7300_defaultRegisterAccess[TMC7300_REGISTER_COUNT] = {0x03, 0x23, 0x01, 0x02, ____, ____, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x42, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x43, ____, ____, 0x01, 0x43, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____}
static const int32_t tmc7300_defaultRegisterResetState[TMC7300_REGISTER_COUNT] = {R00, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
static const TMCRegisterConstant tmc7300_registerConstants[] = {{0x10, 0x00001F01}, {0x6C, 0x13008001}, {0x70, 0xC40D1024},}
file TMC7300_Constants.h

Defines

TMC7300_MOTORS
TMC7300_REGISTER_COUNT
TMC7300_WRITE_BIT
TMC7300_ADDRESS_MASK
file TMC7300_Fields.h

Defines

TMC7300_PWM_DIRECT_MASK
TMC7300_PWM_DIRECT_SHIFT
TMC7300_EXTCAP_MASK
TMC7300_EXTCAP_SHIFT
TMC7300_PAR_MODE_MASK
TMC7300_PAR_MODE_SHIFT
TMC7300_TEST_MODE_MASK
TMC7300_TEST_MODE_SHIFT
TMC7300_RESET_MASK
TMC7300_RESET_SHIFT
TMC7300_DRV_ERR_MASK
TMC7300_DRV_ERR_SHIFT
TMC7300_U3V5_MASK
TMC7300_U3V5_SHIFT
TMC7300_IFCNT_MASK
TMC7300_IFCNT_SHIFT
TMC7300_SLAVECONF_MASK
TMC7300_SLAVECONF_SHIFT
TMC7300_EN_MASK
TMC7300_EN_SHIFT
TMC7300_NSTDBY_MASK
TMC7300_NSTDBY_SHIFT
TMC7300_AD0_MASK
TMC7300_AD0_SHIFT
TMC7300_AD1_MASK
TMC7300_AD1_SHIFT
TMC7300_DIAG_MASK
TMC7300_DIAG_SHIFT
TMC7300_UART_ENABLED_MASK
TMC7300_UART_ENABLED_SHIFT
TMC7300_UART_INPUT_MASK
TMC7300_UART_INPUT_SHIFT
TMC7300_MODE_INPUT_MASK
TMC7300_MODE_INPUT_SHIFT
TMC7300_A2_MASK
TMC7300_A2_SHIFT
TMC7300_A1_MASK
TMC7300_A1_SHIFT
TMC7300_COMP_A1A2_MASK
TMC7300_COMP_A1A2_SHIFT
TMC7300_COMP_B1B2_MASK
TMC7300_COMP_B1B2_SHIFT
TMC7300_VERSION_MASK
TMC7300_VERSION_SHIFT
TMC7300_MOTORRUN_MASK
TMC7300_MOTORRUN_SHIFT
TMC7300_IRUN_MASK
TMC7300_IRUN_SHIFT
TMC7300_PWM_A_MASK
TMC7300_PWM_A_SHIFT
TMC7300_PWM_B_MASK
TMC7300_PWM_B_SHIFT
TMC7300_ENABLEDRV_MASK
TMC7300_ENABLEDRV_SHIFT
TMC7300_TBL_MASK
TMC7300_TBL_SHIFT
TMC7300_DISS2G_MASK
TMC7300_DISS2G_SHIFT
TMC7300_DISS2VS_MASK
TMC7300_DISS2VS_SHIFT
TMC7300_OTPW_MASK
TMC7300_OTPW_SHIFT
TMC7300_OT_MASK
TMC7300_OT_SHIFT
TMC7300_S2GA_MASK
TMC7300_S2GA_SHIFT
TMC7300_S2GB_MASK
TMC7300_S2GB_SHIFT
TMC7300_S2VSA_MASK
TMC7300_S2VSA_SHIFT
TMC7300_S2VSB_MASK
TMC7300_S2VSB_SHIFT
TMC7300_OLA_MASK
TMC7300_OLA_SHIFT
TMC7300_OLB_MASK
TMC7300_OLB_SHIFT
TMC7300_T120_MASK
TMC7300_T120_SHIFT
TMC7300_T150_MASK
TMC7300_T150_SHIFT
TMC7300_PWM_FREQ_MASK
TMC7300_PWM_FREQ_SHIFT
TMC7300_FREEWHEEL_MASK
TMC7300_FREEWHEEL_SHIFT
file TMC7300_Register.h

Defines

TMC7300_GCONF
TMC7300_GSTAT
TMC7300_IFCNT
TMC7300_SLAVECONF
TMC7300_IOIN
TMC7300_CURRENT_LIMIT
TMC7300_PWM_AB
TMC7300_CHOPCONF
TMC7300_DRVSTATUS
TMC7300_PWMCONF
file TMC8461.c
#include “TMC8461.h”

Functions

uint8_t tmc8461_readWrite(uint8_t channel, uint8_t data, uint8_t lastTransfer)
void tmc8461_esc_read(TMC8461TypeDef *tmc8461, uint16_t address)
void tmc8461_esc_write(TMC8461TypeDef *tmc8461, uint16_t address)
void tmc8461_mfc_read(TMC8461TypeDef *tmc8461, uint16_t address)
void tmc8461_mfc_write(TMC8461TypeDef *tmc8461, uint16_t address)
void tmc8461_esc_read_data(TMC8461TypeDef *tmc8461, uint8_t *data_ptr, uint16_t address, uint16_t len)
uint8_t tmc8461_esc_read_8(TMC8461TypeDef *tmc8461, uint16_t address)
uint16_t tmc8461_esc_read_16(TMC8461TypeDef *tmc8461, uint16_t address)
uint32_t tmc8461_esc_read_32(TMC8461TypeDef *tmc8461, uint16_t address)
void tmc8461_esc_write_data(TMC8461TypeDef *tmc8461, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8461_esc_write_8(TMC8461TypeDef *tmc8461, uint16_t address, uint8_t value)
void tmc8461_esc_write_16(TMC8461TypeDef *tmc8461, uint16_t address, uint16_t value)
void tmc8461_esc_write_32(TMC8461TypeDef *tmc8461, uint16_t address, uint32_t value)
void tmc8461_mfc_read_data(TMC8461TypeDef *tmc8461, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8461_mfc_read_32(TMC8461TypeDef *tmc8461, uint16_t address, uint32_t *value)
void tmc8461_mfc_read_64(TMC8461TypeDef *tmc8461, uint16_t address, uint64_t *value)
void tmc8461_mfc_read_auto(TMC8461TypeDef *tmc8461, uint16_t address, uint8_t *value)
void tmc8461_mfc_write_data(TMC8461TypeDef *tmc8461, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8461_mfc_write_32(TMC8461TypeDef *tmc8461, uint16_t address, uint32_t value)
void tmc8461_mfc_write_64(TMC8461TypeDef *tmc8461, uint16_t address, uint64_t value)
void tmc8461_mfc_write_auto(TMC8461TypeDef *tmc8461, uint16_t address, uint8_t *value)
void tmc8461_initConfig(TMC8461TypeDef *tmc8461, ConfigurationTypeDef *tmc8461_config_esc, ConfigurationTypeDef *tmc8461_config_mfc)

Initializes configurations for both, ESC and MFC block

Parameters:

  • tmc8461 – Your TMC8461 instance

  • tmc8461_config_esc – The configuration for the ESC

  • tmc8461_config_mfc – The configuration for the MFC block

file TMC8461.h
#include “tmc/helpers/Constants.h”
#include “tmc/helpers/API_Header.h”
#include “TMC8461_Register.h”
#include “TMC8461_Constants.h”
#include “TMC8461_Fields.h”

Defines

TMC8461_FIELD_READ(tdef, read, address, mask, shift)
TMC8461_FIELD_WRITE(tdef, read, write, address, mask, shift, value)

Functions

void tmc8461_esc_read(TMC8461TypeDef *tmc8461, uint16_t address)
void tmc8461_esc_write(TMC8461TypeDef *tmc8461, uint16_t address)
void tmc8461_mfc_read(TMC8461TypeDef *tmc8461, uint16_t address)
void tmc8461_mfc_write(TMC8461TypeDef *tmc8461, uint16_t address)
void tmc8461_esc_read_data(TMC8461TypeDef *tmc8461, uint8_t *data_ptr, uint16_t address, uint16_t len)
uint8_t tmc8461_esc_read_8(TMC8461TypeDef *tmc8461, uint16_t address)
uint16_t tmc8461_esc_read_16(TMC8461TypeDef *tmc8461, uint16_t address)
uint32_t tmc8461_esc_read_32(TMC8461TypeDef *tmc8461, uint16_t address)
void tmc8461_esc_write_data(TMC8461TypeDef *tmc8461, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8461_esc_write_8(TMC8461TypeDef *tmc8461, uint16_t address, uint8_t value)
void tmc8461_esc_write_16(TMC8461TypeDef *tmc8461, uint16_t address, uint16_t value)
void tmc8461_esc_write_32(TMC8461TypeDef *tmc8461, uint16_t address, uint32_t value)
void tmc8461_mfc_read_data(TMC8461TypeDef *tmc8461, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8461_mfc_read_32(TMC8461TypeDef *tmc8461, uint16_t address, uint32_t *value)
void tmc8461_mfc_read_64(TMC8461TypeDef *tmc8461, uint16_t address, uint64_t *value)
void tmc8461_mfc_read_auto(TMC8461TypeDef *tmc8461, uint16_t address, uint8_t *value)
void tmc8461_mfc_write_data(TMC8461TypeDef *tmc8461, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8461_mfc_write_32(TMC8461TypeDef *tmc8461, uint16_t address, uint32_t value)
void tmc8461_mfc_write_64(TMC8461TypeDef *tmc8461, uint16_t address, uint64_t value)
void tmc8461_mfc_write_auto(TMC8461TypeDef *tmc8461, uint16_t address, uint8_t *value)
void tmc8461_initConfig(TMC8461TypeDef *tmc8461, ConfigurationTypeDef *tmc8461_config_esc, ConfigurationTypeDef *tmc8461_config_mfc)

Initializes configurations for both, ESC and MFC block

Parameters:

  • tmc8461 – Your TMC8461 instance

  • tmc8461_config_esc – The configuration for the ESC

  • tmc8461_config_mfc – The configuration for the MFC block

file TMC8461_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC8461_CMD_READ
TMC8461_CMD_READ_WAIT
TMC8461_CMD_WRITE
TMC8461_CMD_ADDR_EXT
TMC8461_ESC_EEP_CMD_IDLE
TMC8461_ESC_EEP_CMD_READ
TMC8461_ESC_EEP_CMD_WRITE
TMC8461_ESC_EEP_CMD_RELOAD
TMC8461_EC_STATE_INIT
TMC8461_EC_STATE_BOOTSTRAP
TMC8461_EC_STATE_PREOP
TMC8461_EC_STATE_SAFEOP
TMC8461_EC_STATE_OPERATIONAL
TMC8461_MAGIC_RESET
TMC8461_MAGIC_RESET_0
TMC8461_MAGIC_RESET_1
TMC8461_MAGIC_RESET_2
file TMC8461_Fields.h

Defines

TMC8461_ESC_AL_STATE_MASK
TMC8461_ESC_AL_STATE_SHIFT
TMC8461_ESC_AL_ERROR_MASK
TMC8461_ESC_AL_ERROR_SHIFT
TMC8461_ESC_DEVICEID_MASK
TMC8461_ESC_DEVICEID_SHIFT
TMC8461_ESC_PDI_MODE_MASK
TMC8461_ESC_PDI_MODE_SHIFT
TMC8461_ESC_EEP_PDI_MASK
TMC8461_ESC_EEP_PDI_SHIFT
TMC8461_ESC_PDI_ACCESS_MASK
TMC8461_ESC_PDI_ACCESS_SHIFT
TMC8461_ESC_EEP_BUSY_MASK
TMC8461_ESC_EEP_BUSY_SHIFT
TMC8461_ESC_EEP_CMD_MASK
TMC8461_ESC_EEP_CMD_SHIFT
file TMC8461/TMC8461_Register.h

Defines

TMC8461_MFC_ENC_MODE
TMC8461_MFC_ENC_STATUS
TMC8461_MFC_ENC_X_W
TMC8461_MFC_ENC_X_R
TMC8461_MFC_ENC_CONST
TMC8461_MFC_ENC_LATCH
TMC8461_MFC_SPI_RX_DATA
TMC8461_MFC_SPI_TX_DATA
TMC8461_MFC_SPI_CONF
TMC8461_MFC_SPI_STATUS
TMC8461_MFC_SPI_LENGTH
TMC8461_MFC_SPI_TIME
TMC8461_MFC_IIC_TIMEBASE
TMC8461_MFC_IIC_CONTROL
TMC8461_MFC_IIC_STATUS
TMC8461_MFC_IIC_ADDRESS
TMC8461_MFC_IIC_DATA_R
TMC8461_MFC_IIC_DATA_W
TMC8461_MFC_SD_SR0
TMC8461_MFC_SD_SR1
TMC8461_MFC_SD_SR2
TMC8461_MFC_SD_SC0
TMC8461_MFC_SD_SC1
TMC8461_MFC_SD_SC2
TMC8461_MFC_SD_ST0
TMC8461_MFC_SD_ST1
TMC8461_MFC_SD_ST2
TMC8461_MFC_SD_CMP0
TMC8461_MFC_SD_CMP1
TMC8461_MFC_SD_CMP2
TMC8461_MFC_SD_NEXTSR0
TMC8461_MFC_SD_NEXTSR1
TMC8461_MFC_SD_NEXTSR2
TMC8461_MFC_SD_SL
TMC8461_MFC_SD_DLY
TMC8461_MFC_SD_CFG
TMC8461_MFC_PWM_CFG
TMC8461_MFC_PWM1
TMC8461_MFC_PWM2
TMC8461_MFC_PWM3
TMC8461_MFC_PWM4
TMC8461_MFC_PWM1_CNTRSHFT
TMC8461_MFC_PWM2_CNTRSHFT
TMC8461_MFC_PWM3_CNTRSHFT
TMC8461_MFC_PWM4_CNTRSHFT
TMC8461_MFC_PULSE_B_PULSE_A
TMC8461_MFC_PULSE_LENGTH
TMC8461_MFC_HVIO_CFG
TMC8461_MFC_SWREG_CONF
TMC8461_MFC_AL_OVERRIDE
TMC8461_MFC_TEST_BIST
TMC8461_MFC_TEST_ON_CFG
TMC8461_ESC_RESET_ECAT
TMC8461_ESC_RESET_PDI
TMC8461_ESC_AL_CONTROL
TMC8461_ESC_AL_STATUS
TMC8461_ESC_AL_CODE
TMC8461_ESC_PDI_CTRL
TMC8461_ESC_AL_EVENT_MASK_LO
TMC8461_ESC_AL_EVENT_MASK_HI
TMC8461_ESC_AL_EVENT_REQUEST
TMC8461_ESC_EEP_CFG
TMC8461_ESC_EEP_PDI_ACCESS
TMC8461_ESC_EEP_STATUS
TMC8461_ESC_EEP_ADDRESS
TMC8461_ESC_EEP_DATA
TMC8461_ESC_CFG_MFCIO_0
TMC8461_ESC_CFG_MFCIO_1
TMC8461_ESC_CFG_MFCIO_2
TMC8461_ESC_CFG_MFCIO_3
TMC8461_ESC_CFG_MFCIO_4
TMC8461_ESC_CFG_MFCIO_5
TMC8461_ESC_CFG_MFCIO_6
TMC8461_ESC_CFG_MFCIO_7
TMC8461_ESC_CFG_MFCIO_8
TMC8461_ESC_CFG_MFCIO_9
TMC8461_ESC_CFG_MFCIO_10
TMC8461_ESC_CFG_MFCIO_11
TMC8461_ESC_CFG_MFCIO_12
TMC8461_ESC_CFG_MFCIO_13
TMC8461_ESC_CFG_MFCIO_14
TMC8461_ESC_CFG_MFCIO_15
TMC8461_ESC_CFG_MFCIO_HV_0
TMC8461_ESC_CFG_MFCIO_HV_1
TMC8461_ESC_CFG_MFCIO_HV_2
TMC8461_ESC_CFG_MFCIO_HV_3
TMC8461_ESC_CFG_MFCIO_HV_4
TMC8461_ESC_CFG_MFCIO_HV_5
TMC8461_ESC_CFG_MFCIO_HV_6
TMC8461_ESC_CFG_MFCIO_HV_7
TMC8461_ESC_CFG_HVIO_SLOPE
TMC8461_ESC_CFG_HVIO_WEAK_H
TMC8461_ESC_CFG_HVIO_WEAK_L
TMC8461_ESC_CFG_HVIO_DIFF_EN
TMC8461_ESC_CFG_SWREG_33
TMC8461_ESC_CFG_SWREG_VOUT
TMC8461_ESC_CFG_MEM_BLOCK0
TMC8461_ESC_CFG_MEM_BLOCK1
TMC8461_ESC_ENC_MODE
TMC8461_ESC_ENC_STATUS
TMC8461_ESC_ENC_X_W
TMC8461_ESC_ENC_X_R
TMC8461_ESC_ENC_CONST
TMC8461_ESC_ENC_LATCH
TMC8461_ESC_SPI_RX_DATA
TMC8461_ESC_SPI_TX_DATA
TMC8461_ESC_SPI_CONF
TMC8461_ESC_SPI_STATUS
TMC8461_ESC_SPI_LENGTH
TMC8461_ESC_SPI_TIME
TMC8461_ESC_IIC_TIMEBASE
TMC8461_ESC_IIC_CONTROL
TMC8461_ESC_IIC_STATUS
TMC8461_ESC_IIC_ADDRESS
TMC8461_ESC_IIC_DATA_R
TMC8461_ESC_IIC_DATA_W
TMC8461_ESC_SD_SR0
TMC8461_ESC_SD_SR1
TMC8461_ESC_SD_SR2
TMC8461_ESC_SD_SC0
TMC8461_ESC_SD_SC1
TMC8461_ESC_SD_SC2
TMC8461_ESC_SD_ST0
TMC8461_ESC_SD_ST1
TMC8461_ESC_SD_ST2
TMC8461_ESC_SD_CMP0
TMC8461_ESC_SD_CMP1
TMC8461_ESC_SD_CMP2
TMC8461_ESC_SD_NEXTSR0
TMC8461_ESC_SD_NEXTSR1
TMC8461_ESC_SD_NEXTSR2
TMC8461_ESC_SD_SL
TMC8461_ESC_SD_DLY
TMC8461_ESC_SD_CFG
TMC8461_ESC_PWM_CFG
TMC8461_ESC_PWM1
TMC8461_ESC_PWM2
TMC8461_ESC_PWM3
TMC8461_ESC_PWM4
TMC8461_ESC_PWM1_CNTRSHFT
TMC8461_ESC_PWM2_CNTRSHFT
TMC8461_ESC_PWM3_CNTRSHFT
TMC8461_ESC_PWM4_CNTRSHFT
TMC8461_ESC_PULSE_B_PULSE_A
TMC8461_ESC_PULSE_LENGTH
TMC8461_ESC_GPO
TMC8461_ESC_GPI
TMC8461_ESC_GPIO_CONFIG
TMC8461_ESC_DAC_VAL
TMC8461_ESC_MFCIO_IRQ_CFG
TMC8461_ESC_MFCIO_IRQ_FLAGS
TMC8461_ESC_WD_TIME
TMC8461_ESC_WD_CFG
TMC8461_ESC_WD_OUT_MASK_POL
TMC8461_ESC_WD_OE_POL
TMC8461_ESC_WD_IN_MASK_POL
TMC8461_ESC_WD_MAX
TMC8461_ESC_HV_STATUS
TMC8461_ESC_SYNC_EVT_COUNTER
TMC8461_ESC_SM0_START
TMC8461_ESC_SM0_LEN
TMC8461_ESC_SM0_CTRL_STATUS
TMC8461_ESC_MB_STATUS
TMC8461_ESC_SM1_START
TMC8461_ESC_SM1_LEN
TMC8461_ESC_SM2_START
TMC8461_ESC_SM2_LEN
TMC8461_ESC_SM2_CTRL_STATUS
TMC8461_ESC_PDO_STATUS
TMC8461_ESC_SM3_START
TMC8461_ESC_SM3_LEN
TMC8461_MFCFG_INPUT
TMC8461_MFCFG_LOW
TMC8461_MFCFG_HIGH
TMC8461_MFCFG_TRI
TMC8461_MFCFG_ENCA_P
TMC8461_MFCFG_ENCA_N
TMC8461_MFCFG_ENCB_P
TMC8461_MFCFG_ENCB_N
TMC8461_MFCFG_ENCN_P
TMC8461_MFCFG_ENCN_N
TMC8461_MFCFG_SPI_SCK
TMC8461_MFCFG_SPI_MOSI
TMC8461_MFCFG_SPI_MISO
TMC8461_MFCFG_SPI_CSN0
TMC8461_MFCFG_SPI_CSN1
TMC8461_MFCFG_SPI_CSN2
TMC8461_MFCFG_SPI_CSN3
TMC8461_MFCFG_IIC_SCL
TMC8461_MFCFG_IIC_SDA
TMC8461_MFCFG_SD_STEP0
TMC8461_MFCFG_SD_DIR0
TMC8461_MFCFG_SD_STEP1
TMC8461_MFCFG_SD_DIR1
TMC8461_MFCFG_SD_STEP2
TMC8461_MFCFG_SD_DIR2
TMC8461_MFCFG_SD_STEP0_N
TMC8461_MFCFG_SD_DIR0_N
TMC8461_MFCFG_SD_STEP1_N
TMC8461_MFCFG_SD_DIR1_N
TMC8461_MFCFG_SD_STEP2_N
TMC8461_MFCFG_SD_DIR2_N
TMC8461_MFCFG_PWM_HS0
TMC8461_MFCFG_PWM_LS0
TMC8461_MFCFG_PWM_HS1
TMC8461_MFCFG_PWM_LS1
TMC8461_MFCFG_PWM_HS2
TMC8461_MFCFG_PWM_LS2
TMC8461_MFCFG_PWM_HS3
TMC8461_MFCFG_PWM_LS3
TMC8461_MFCFG_GPI0
TMC8461_MFCFG_GPI1
TMC8461_MFCFG_GPI2
TMC8461_MFCFG_GPI3
TMC8461_MFCFG_GPI4
TMC8461_MFCFG_GPI5
TMC8461_MFCFG_GPI6
TMC8461_MFCFG_GPI7
TMC8461_MFCFG_GPI8
TMC8461_MFCFG_GPI9
TMC8461_MFCFG_GPI10
TMC8461_MFCFG_GPI11
TMC8461_MFCFG_GPI12
TMC8461_MFCFG_GPI13
TMC8461_MFCFG_GPI14
TMC8461_MFCFG_GPI15
TMC8461_MFCFG_GPO0
TMC8461_MFCFG_GPO1
TMC8461_MFCFG_GPO2
TMC8461_MFCFG_GPO3
TMC8461_MFCFG_GPO4
TMC8461_MFCFG_GPO5
TMC8461_MFCFG_GPO6
TMC8461_MFCFG_GPO7
TMC8461_MFCFG_GPO8
TMC8461_MFCFG_GPO9
TMC8461_MFCFG_GPO10
TMC8461_MFCFG_GPO11
TMC8461_MFCFG_GPO12
TMC8461_MFCFG_GPO13
TMC8461_MFCFG_GPO14
TMC8461_MFCFG_GPO15
TMC8461_MFCFG_DAC0
TMC8461_MFCFG_PWM_PULSE_A
TMC8461_MFCFG_PWM_PULSE_CENTER
TMC8461_MFCFG_PWM_PULSE_B
TMC8461_MFCFG_PWM_PULSE_AB
TMC8461_MFCFG_PWM_PULSE_ZERO
TMC8461_PDI_DISABLED
TMC8461_PDI_4DI
TMC8461_PDI_4DO
TMC8461_PDI_2DI_2DO
TMC8461_PDI_DIO
TMC8461_PDI_SPI_SLAVE
TMC8461_PDI_OSIO
TMC8461_PDI_EC_BRIDGE
TMC8461_PDI_16BIT_ASYNC
TMC8461_PDI_8BIT_ASYNC
TMC8461_PDI_16BIT_SYNC
TMC8461_PDI_8BIT_SYNC
TMC8461_PDI_32DI
TMC8461_PDI_24DI_8DO
TMC8461_PDI_16DI_16DO
TMC8461_PDI_8DI_24DO
TMC8461_PDI_32DO
TMC8461_PDI_ON_CHIP_BUS
file TMC846x/TMC8461_Register.h

Defines

TMC8461_ENC_MODE
TMC8461_ENC_STATUS
TMC8461_ENC_X_W
TMC8461_ENC_X_R
TMC8461_ENC_CONST
TMC8461_ENC_LATCH
TMC8461_SPI_RX_DATA
TMC8461_SPI_TX_DATA
TMC8461_SPI_CONF
TMC8461_SPI_STATUS
TMC8461_SPI_LENGTH
TMC8461_SPI_TIME
TMC8461_IIC_TIMEBASE
TMC8461_IIC_CONTROL
TMC8461_IIC_STATUS
TMC8461_IIC_ADDRESS
TMC8461_IIC_DATA_R
TMC8461_IIC_DATA_W
TMC8461_SD_SR0
TMC8461_SD_SR1
TMC8461_SD_SR2
TMC8461_SD_SC0
TMC8461_SD_SC1
TMC8461_SD_SC2
TMC8461_SD_ST0
TMC8461_SD_ST1
TMC8461_SD_ST2
TMC8461_SD_CMP0
TMC8461_SD_CMP1
TMC8461_SD_CMP2
TMC8461_SD_NEXTSR0
TMC8461_SD_NEXTSR1
TMC8461_SD_NEXTSR2
TMC8461_SD_SL
TMC8461_SD_DLY
TMC8461_SD_CFG
TMC8461_PWM_CFG
TMC8461_PWM1
TMC8461_PWM2
TMC8461_PWM3
TMC8461_PWM4
TMC8461_PWM1_CNTRSHFT
TMC8461_PWM2_CNTRSHFT
TMC8461_PWM3_CNTRSHFT
TMC8461_PWM4_CNTRSHFT
TMC8461_PULSE_B_PULSE_A
TMC8461_PULSE_LENGTH
TMC8461_GPO
TMC8461_GPI
TMC8461_GPIO_CONFIG
TMC8461_DAC_VAL
TMC8461_MFCIO_IRQ_CFG
TMC8461_MFCIO_IRQ_FLAGS
TMC8461_WD_TIME
TMC8461_WD_CFG
TMC8461_WD_OUT_MASK_POL
TMC8461_WD_OE_POL
TMC8461_WD_IN_MASK_POL
TMC8461_WD_MAX
TMC8461_HV_STATUS
TMC8461_SYNC_EVT_COUNTER
TMC8461_HVIO_CFG
TMC8461_SWREG_CONF
TMC8461_AL_OVERRIDE
TMC8461_TEST_BIST
TMC8461_TEST_ON_CFG
TMC8461_ESC_CFG_MFCIO_0
TMC8461_ESC_CFG_MFCIO_1
TMC8461_ESC_CFG_MFCIO_2
TMC8461_ESC_CFG_MFCIO_3
TMC8461_ESC_CFG_MFCIO_4
TMC8461_ESC_CFG_MFCIO_5
TMC8461_ESC_CFG_MFCIO_6
TMC8461_ESC_CFG_MFCIO_7
TMC8461_ESC_CFG_MFCIO_8
TMC8461_ESC_CFG_MFCIO_9
TMC8461_ESC_CFG_MFCIO_10
TMC8461_ESC_CFG_MFCIO_11
TMC8461_ESC_CFG_MFCIO_12
TMC8461_ESC_CFG_MFCIO_13
TMC8461_ESC_CFG_MFCIO_14
TMC8461_ESC_CFG_MFCIO_15
TMC8461_ESC_CFG_MFCIO_HV_0
TMC8461_ESC_CFG_MFCIO_HV_1
TMC8461_ESC_CFG_MFCIO_HV_2
TMC8461_ESC_CFG_MFCIO_HV_3
TMC8461_ESC_CFG_MFCIO_HV_4
TMC8461_ESC_CFG_MFCIO_HV_5
TMC8461_ESC_CFG_MFCIO_HV_6
TMC8461_ESC_CFG_MFCIO_HV_7
TMC8461_ESC_CFG_HVIO_SLOPE
TMC8461_ESC_CFG_HVIO_WEAK_H
TMC8461_ESC_CFG_HVIO_WEAK_L
TMC8461_ESC_CFG_HVIO_DIFF_EN
TMC8461_ESC_CFG_SWREG_33
TMC8461_ESC_CFG_SWREG_VOUT
TMC8461_ESC_CFG_MEM_BLOCK0
TMC8461_ESC_CFG_MEM_BLOCK1
TMC8461_ESC_ENC_MODE
TMC8461_ESC_ENC_STATUS
TMC8461_ESC_ENC_X_W
TMC8461_ESC_ENC_X_R
TMC8461_ESC_ENC_CONST
TMC8461_ESC_ENC_LATCH
TMC8461_ESC_SPI_RX_DATA
TMC8461_ESC_SPI_TX_DATA
TMC8461_ESC_SPI_CONF
TMC8461_ESC_SPI_STATUS
TMC8461_ESC_SPI_LENGTH
TMC8461_ESC_SPI_TIME
TMC8461_ESC_IIC_TIMEBASE
TMC8461_ESC_IIC_CONTROL
TMC8461_ESC_IIC_STATUS
TMC8461_ESC_IIC_ADDRESS
TMC8461_ESC_IIC_DATA_R
TMC8461_ESC_IIC_DATA_W
TMC8461_ESC_SD_SR0
TMC8461_ESC_SD_SR1
TMC8461_ESC_SD_SR2
TMC8461_ESC_SD_SC0
TMC8461_ESC_SD_SC1
TMC8461_ESC_SD_SC2
TMC8461_ESC_SD_ST0
TMC8461_ESC_SD_ST1
TMC8461_ESC_SD_ST2
TMC8461_ESC_SD_CMP0
TMC8461_ESC_SD_CMP1
TMC8461_ESC_SD_CMP2
TMC8461_ESC_SD_NEXTSR0
TMC8461_ESC_SD_NEXTSR1
TMC8461_ESC_SD_NEXTSR2
TMC8461_ESC_SD_SL
TMC8461_ESC_SD_DLY
TMC8461_ESC_SD_CFG
TMC8461_ESC_PWM_CFG
TMC8461_ESC_PWM1
TMC8461_ESC_PWM2
TMC8461_ESC_PWM3
TMC8461_ESC_PWM4
TMC8461_ESC_PWM1_CNTRSHFT
TMC8461_ESC_PWM2_CNTRSHFT
TMC8461_ESC_PWM3_CNTRSHFT
TMC8461_ESC_PWM4_CNTRSHFT
TMC8461_ESC_PULSE_B_PULSE_A
TMC8461_ESC_PULSE_LENGTH
TMC8461_GPO
TMC8461_GPI
TMC8461_GPIO_CONFIG
TMC8461_DAC_VAL
TMC8461_MFCIO_IRQ_CFG
TMC8461_MFCIO_IRQ_FLAGS
TMC8461_WD_TIME
TMC8461_WD_CFG
TMC8461_WD_OUT_MASK_POL
TMC8461_WD_OE_POL
TMC8461_WD_IN_MASK_POL
TMC8461_WD_MAX
TMC8461_HV_STATUS
TMC8461_SYNC_EVT_COUNTER
TMC8461_MFCFG_INPUT
TMC8461_MFCFG_LOW
TMC8461_MFCFG_HIGH
TMC8461_MFCFG_TRI
TMC8461_MFCFG_ENCA_P
TMC8461_MFCFG_ENCA_N
TMC8461_MFCFG_ENCB_P
TMC8461_MFCFG_ENCB_N
TMC8461_MFCFG_ENCN_P
TMC8461_MFCFG_ENCN_N
TMC8461_MFCFG_SPI_SCK
TMC8461_MFCFG_SPI_MOSI
TMC8461_MFCFG_SPI_MISO
TMC8461_MFCFG_SPI_CSN0
TMC8461_MFCFG_SPI_CSN1
TMC8461_MFCFG_SPI_CSN2
TMC8461_MFCFG_SPI_CSN3
TMC8461_MFCFG_IIC_SCL
TMC8461_MFCFG_IIC_SDA
TMC8461_MFCFG_SD_STEP0
TMC8461_MFCFG_SD_DIR0
TMC8461_MFCFG_SD_STEP1
TMC8461_MFCFG_SD_DIR1
TMC8461_MFCFG_SD_STEP2
TMC8461_MFCFG_SD_DIR2
TMC8461_MFCFG_SD_STEP0_N
TMC8461_MFCFG_SD_DIR0_N
TMC8461_MFCFG_SD_STEP1_N
TMC8461_MFCFG_SD_DIR1_N
TMC8461_MFCFG_SD_STEP2_N
TMC8461_MFCFG_SD_DIR2_N
TMC8461_MFCFG_PWM_HS0
TMC8461_MFCFG_PWM_LS0
TMC8461_MFCFG_PWM_HS1
TMC8461_MFCFG_PWM_LS1
TMC8461_MFCFG_PWM_HS2
TMC8461_MFCFG_PWM_LS2
TMC8461_MFCFG_PWM_HS3
TMC8461_MFCFG_PWM_LS3
TMC8461_MFCFG_GPI0
TMC8461_MFCFG_GPI1
TMC8461_MFCFG_GPI2
TMC8461_MFCFG_GPI3
TMC8461_MFCFG_GPI4
TMC8461_MFCFG_GPI5
TMC8461_MFCFG_GPI6
TMC8461_MFCFG_GPI7
TMC8461_MFCFG_GPI8
TMC8461_MFCFG_GPI9
TMC8461_MFCFG_GPI10
TMC8461_MFCFG_GPI11
TMC8461_MFCFG_GPI12
TMC8461_MFCFG_GPI13
TMC8461_MFCFG_GPI14
TMC8461_MFCFG_GPI15
TMC8461_MFCFG_GPO0
TMC8461_MFCFG_GPO1
TMC8461_MFCFG_GPO2
TMC8461_MFCFG_GPO3
TMC8461_MFCFG_GPO4
TMC8461_MFCFG_GPO5
TMC8461_MFCFG_GPO6
TMC8461_MFCFG_GPO7
TMC8461_MFCFG_GPO8
TMC8461_MFCFG_GPO9
TMC8461_MFCFG_GPO10
TMC8461_MFCFG_GPO11
TMC8461_MFCFG_GPO12
TMC8461_MFCFG_GPO13
TMC8461_MFCFG_GPO14
TMC8461_MFCFG_GPO15
TMC8461_MFCFG_DAC0
TMC8461_MFCFG_PWM_PULSE_A
TMC8461_MFCFG_PWM_PULSE_CENTER
TMC8461_MFCFG_PWM_PULSE_B
TMC8461_MFCFG_PWM_PULSE_AB
TMC8461_MFCFG_PWM_PULSE_ZERO
file TMC8462.c
#include “TMC8462.h”

Functions

uint8_t tmc8462_readWrite(uint8_t channel, uint8_t data, uint8_t lastTransfer)
void tmc8462_esc_read(TMC8462TypeDef *tmc8462, uint16_t address)
void tmc8462_esc_write(TMC8462TypeDef *tmc8462, uint16_t address)
void tmc8462_mfc_read(TMC8462TypeDef *tmc8462, uint16_t address)
void tmc8462_mfc_write(TMC8462TypeDef *tmc8462, uint16_t address)
void tmc8462_esc_read_data(TMC8462TypeDef *tmc8462, uint8_t *data_ptr, uint16_t address, uint16_t len)
uint8_t tmc8462_esc_read_8(TMC8462TypeDef *tmc8462, uint16_t address)
uint16_t tmc8462_esc_read_16(TMC8462TypeDef *tmc8462, uint16_t address)
uint32_t tmc8462_esc_read_32(TMC8462TypeDef *tmc8462, uint16_t address)
void tmc8462_esc_write_data(TMC8462TypeDef *tmc8462, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8462_esc_write_8(TMC8462TypeDef *tmc8462, uint16_t address, uint8_t value)
void tmc8462_esc_write_16(TMC8462TypeDef *tmc8462, uint16_t address, uint16_t value)
void tmc8462_esc_write_32(TMC8462TypeDef *tmc8462, uint16_t address, uint32_t value)
void tmc8462_mfc_read_data(TMC8462TypeDef *tmc8462, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8462_mfc_read_32(TMC8462TypeDef *tmc8462, uint16_t address, uint32_t *value)
void tmc8462_mfc_read_64(TMC8462TypeDef *tmc8462, uint16_t address, uint64_t *value)
void tmc8462_mfc_read_auto(TMC8462TypeDef *tmc8462, uint16_t address, uint8_t *value)
void tmc8462_mfc_write_data(TMC8462TypeDef *tmc8462, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8462_mfc_write_32(TMC8462TypeDef *tmc8462, uint16_t address, uint32_t value)
void tmc8462_mfc_write_64(TMC8462TypeDef *tmc8462, uint16_t address, uint64_t value)
void tmc8462_mfc_write_auto(TMC8462TypeDef *tmc8462, uint16_t address, uint8_t *value)
void tmc8462_initConfig(TMC8462TypeDef *tmc8462, ConfigurationTypeDef *tmc8462_config_esc, ConfigurationTypeDef *tmc8462_config_mfc)

Initializes configurations for both, ESC and MFC block

Parameters:

  • tmc8462 – Your TMC8462 instance

  • tmc8462_config_esc – The configuration for the ESC

  • tmc8462_config_mfc – The configuration for the MFC block

file TMC8462.h
#include “tmc/helpers/Constants.h”
#include “tmc/helpers/API_Header.h”
#include “TMC8462_Register.h”
#include “TMC8462_Constants.h”
#include “TMC8462_Fields.h”

Defines

TMC8462_FIELD_READ(tdef, read, address, mask, shift)
TMC8462_FIELD_WRITE(tdef, read, write, address, mask, shift, value)

Functions

void tmc8462_esc_read(TMC8462TypeDef *tmc8462, uint16_t address)
void tmc8462_esc_write(TMC8462TypeDef *tmc8462, uint16_t address)
void tmc8462_mfc_read(TMC8462TypeDef *tmc8462, uint16_t address)
void tmc8462_mfc_write(TMC8462TypeDef *tmc8462, uint16_t address)
void tmc8462_esc_read_data(TMC8462TypeDef *tmc8462, uint8_t *data_ptr, uint16_t address, uint16_t len)
uint8_t tmc8462_esc_read_8(TMC8462TypeDef *tmc8462, uint16_t address)
uint16_t tmc8462_esc_read_16(TMC8462TypeDef *tmc8462, uint16_t address)
uint32_t tmc8462_esc_read_32(TMC8462TypeDef *tmc8462, uint16_t address)
void tmc8462_esc_write_data(TMC8462TypeDef *tmc8462, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8462_esc_write_8(TMC8462TypeDef *tmc8462, uint16_t address, uint8_t value)
void tmc8462_esc_write_16(TMC8462TypeDef *tmc8462, uint16_t address, uint16_t value)
void tmc8462_esc_write_32(TMC8462TypeDef *tmc8462, uint16_t address, uint32_t value)
void tmc8462_mfc_read_data(TMC8462TypeDef *tmc8462, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8462_mfc_read_32(TMC8462TypeDef *tmc8462, uint16_t address, uint32_t *value)
void tmc8462_mfc_read_64(TMC8462TypeDef *tmc8462, uint16_t address, uint64_t *value)
void tmc8462_mfc_read_auto(TMC8462TypeDef *tmc8462, uint16_t address, uint8_t *value)
void tmc8462_mfc_write_data(TMC8462TypeDef *tmc8462, uint8_t *data_ptr, uint16_t address, uint16_t len)
void tmc8462_mfc_write_32(TMC8462TypeDef *tmc8462, uint16_t address, uint32_t value)
void tmc8462_mfc_write_64(TMC8462TypeDef *tmc8462, uint16_t address, uint64_t value)
void tmc8462_mfc_write_auto(TMC8462TypeDef *tmc8462, uint16_t address, uint8_t *value)
void tmc8462_initConfig(TMC8462TypeDef *tmc8462, ConfigurationTypeDef *tmc8462_config_esc, ConfigurationTypeDef *tmc8462_config_mfc)

Initializes configurations for both, ESC and MFC block

Parameters:

  • tmc8462 – Your TMC8462 instance

  • tmc8462_config_esc – The configuration for the ESC

  • tmc8462_config_mfc – The configuration for the MFC block

file TMC8462_Constants.h
#include “tmc/helpers/Constants.h”

Defines

TMC8462_CMD_READ
TMC8462_CMD_READ_WAIT
TMC8462_CMD_WRITE
TMC8462_CMD_ADDR_EXT
TMC8462_ESC_EEP_CMD_IDLE
TMC8462_ESC_EEP_CMD_READ
TMC8462_ESC_EEP_CMD_WRITE
TMC8462_ESC_EEP_CMD_RELOAD
TMC8462_EC_STATE_INIT
TMC8462_EC_STATE_BOOTSTRAP
TMC8462_EC_STATE_PREOP
TMC8462_EC_STATE_SAFEOP
TMC8462_EC_STATE_OPERATIONAL
TMC8462_MAGIC_RESET
TMC8462_MAGIC_RESET_0
TMC8462_MAGIC_RESET_1
TMC8462_MAGIC_RESET_2
file TMC8462_Fields.h

Defines

TMC8462_ESC_AL_STATE_MASK
TMC8462_ESC_AL_STATE_SHIFT
TMC8462_ESC_AL_ERROR_MASK
TMC8462_ESC_AL_ERROR_SHIFT
TMC8462_ESC_DEVICEID_MASK
TMC8462_ESC_DEVICEID_SHIFT
TMC8462_ESC_PDI_MODE_MASK
TMC8462_ESC_PDI_MODE_SHIFT
TMC8462_ESC_EEP_PDI_MASK
TMC8462_ESC_EEP_PDI_SHIFT
TMC8462_ESC_PDI_ACCESS_MASK
TMC8462_ESC_PDI_ACCESS_SHIFT
TMC8462_ESC_EEP_BUSY_MASK
TMC8462_ESC_EEP_BUSY_SHIFT
TMC8462_ESC_EEP_CMD_MASK
TMC8462_ESC_EEP_CMD_SHIFT
file TMC8462/TMC8462_Register.h

Defines

TMC8462_MFC_ENC_MODE
TMC8462_MFC_ENC_STATUS
TMC8462_MFC_ENC_X_W
TMC8462_MFC_ENC_X_R
TMC8462_MFC_ENC_CONST
TMC8462_MFC_ENC_LATCH
TMC8462_MFC_SPI_RX_DATA
TMC8462_MFC_SPI_TX_DATA
TMC8462_MFC_SPI_CONF
TMC8462_MFC_SPI_STATUS
TMC8462_MFC_SPI_LENGTH
TMC8462_MFC_SPI_TIME
TMC8462_MFC_IIC_TIMEBASE
TMC8462_MFC_IIC_CONTROL
TMC8462_MFC_IIC_STATUS
TMC8462_MFC_IIC_ADDRESS
TMC8462_MFC_IIC_DATA_R
TMC8462_MFC_IIC_DATA_W
TMC8462_MFC_SD_SR0
TMC8462_MFC_SD_SR1
TMC8462_MFC_SD_SR2
TMC8462_MFC_SD_SC0
TMC8462_MFC_SD_SC1
TMC8462_MFC_SD_SC2
TMC8462_MFC_SD_ST0
TMC8462_MFC_SD_ST1
TMC8462_MFC_SD_ST2
TMC8462_MFC_SD_CMP0
TMC8462_MFC_SD_CMP1
TMC8462_MFC_SD_CMP2
TMC8462_MFC_SD_NEXTSR0
TMC8462_MFC_SD_NEXTSR1
TMC8462_MFC_SD_NEXTSR2
TMC8462_MFC_SD_SL
TMC8462_MFC_SD_DLY
TMC8462_MFC_SD_CFG
TMC8462_MFC_PWM_CFG
TMC8462_MFC_PWM1
TMC8462_MFC_PWM2
TMC8462_MFC_PWM3
TMC8462_MFC_PWM4
TMC8462_MFC_PWM1_CNTRSHFT
TMC8462_MFC_PWM2_CNTRSHFT
TMC8462_MFC_PWM3_CNTRSHFT
TMC8462_MFC_PWM4_CNTRSHFT
TMC8462_MFC_PULSE_B_PULSE_A
TMC8462_MFC_PULSE_LENGTH
TMC8462_MFC_HVIO_CFG
TMC8462_MFC_SWREG_CONF
TMC8462_MFC_AL_OVERRIDE
TMC8462_MFC_TEST_BIST
TMC8462_MFC_TEST_ON_CFG
TMC8462_ESC_RESET_ECAT
TMC8462_ESC_RESET_PDI
TMC8462_ESC_AL_CONTROL
TMC8462_ESC_AL_STATUS
TMC8462_ESC_AL_CODE
TMC8462_ESC_PDI_CTRL
TMC8462_ESC_AL_EVENT_MASK_LO
TMC8462_ESC_AL_EVENT_MASK_HI
TMC8462_ESC_AL_EVENT_REQUEST
TMC8462_ESC_EEP_CFG
TMC8462_ESC_EEP_PDI_ACCESS
TMC8462_ESC_EEP_STATUS
TMC8462_ESC_EEP_ADDRESS
TMC8462_ESC_EEP_DATA
TMC8462_ESC_CFG_MFCIO_0
TMC8462_ESC_CFG_MFCIO_1
TMC8462_ESC_CFG_MFCIO_2
TMC8462_ESC_CFG_MFCIO_3
TMC8462_ESC_CFG_MFCIO_4
TMC8462_ESC_CFG_MFCIO_5
TMC8462_ESC_CFG_MFCIO_6
TMC8462_ESC_CFG_MFCIO_7
TMC8462_ESC_CFG_MFCIO_8
TMC8462_ESC_CFG_MFCIO_9
TMC8462_ESC_CFG_MFCIO_10
TMC8462_ESC_CFG_MFCIO_11
TMC8462_ESC_CFG_MFCIO_12
TMC8462_ESC_CFG_MFCIO_13
TMC8462_ESC_CFG_MFCIO_14
TMC8462_ESC_CFG_MFCIO_15
TMC8462_ESC_CFG_MFCIO_HV_0
TMC8462_ESC_CFG_MFCIO_HV_1
TMC8462_ESC_CFG_MFCIO_HV_2
TMC8462_ESC_CFG_MFCIO_HV_3
TMC8462_ESC_CFG_MFCIO_HV_4
TMC8462_ESC_CFG_MFCIO_HV_5
TMC8462_ESC_CFG_MFCIO_HV_6
TMC8462_ESC_CFG_MFCIO_HV_7
TMC8462_ESC_CFG_HVIO_SLOPE
TMC8462_ESC_CFG_HVIO_WEAK_H
TMC8462_ESC_CFG_HVIO_WEAK_L
TMC8462_ESC_CFG_HVIO_DIFF_EN
TMC8462_ESC_CFG_SWREG_33
TMC8462_ESC_CFG_SWREG_VOUT
TMC8462_ESC_CFG_MEM_BLOCK0
TMC8462_ESC_CFG_MEM_BLOCK1
TMC8462_ESC_ENC_MODE
TMC8462_ESC_ENC_STATUS
TMC8462_ESC_ENC_X_W
TMC8462_ESC_ENC_X_R
TMC8462_ESC_ENC_CONST
TMC8462_ESC_ENC_LATCH
TMC8462_ESC_SPI_RX_DATA
TMC8462_ESC_SPI_TX_DATA
TMC8462_ESC_SPI_CONF
TMC8462_ESC_SPI_STATUS
TMC8462_ESC_SPI_LENGTH
TMC8462_ESC_SPI_TIME
TMC8462_ESC_IIC_TIMEBASE
TMC8462_ESC_IIC_CONTROL
TMC8462_ESC_IIC_STATUS
TMC8462_ESC_IIC_ADDRESS
TMC8462_ESC_IIC_DATA_R
TMC8462_ESC_IIC_DATA_W
TMC8462_ESC_SD_SR0
TMC8462_ESC_SD_SR1
TMC8462_ESC_SD_SR2
TMC8462_ESC_SD_SC0
TMC8462_ESC_SD_SC1
TMC8462_ESC_SD_SC2
TMC8462_ESC_SD_ST0
TMC8462_ESC_SD_ST1
TMC8462_ESC_SD_ST2
TMC8462_ESC_SD_CMP0
TMC8462_ESC_SD_CMP1
TMC8462_ESC_SD_CMP2
TMC8462_ESC_SD_NEXTSR0
TMC8462_ESC_SD_NEXTSR1
TMC8462_ESC_SD_NEXTSR2
TMC8462_ESC_SD_SL
TMC8462_ESC_SD_DLY
TMC8462_ESC_SD_CFG
TMC8462_ESC_PWM_CFG
TMC8462_ESC_PWM1
TMC8462_ESC_PWM2
TMC8462_ESC_PWM3
TMC8462_ESC_PWM4
TMC8462_ESC_PWM1_CNTRSHFT
TMC8462_ESC_PWM2_CNTRSHFT
TMC8462_ESC_PWM3_CNTRSHFT
TMC8462_ESC_PWM4_CNTRSHFT
TMC8462_ESC_PULSE_B_PULSE_A
TMC8462_ESC_PULSE_LENGTH
TMC8462_ESC_GPO
TMC8462_ESC_GPI
TMC8462_ESC_GPIO_CONFIG
TMC8462_ESC_DAC_VAL
TMC8462_ESC_MFCIO_IRQ_CFG
TMC8462_ESC_MFCIO_IRQ_FLAGS
TMC8462_ESC_WD_TIME
TMC8462_ESC_WD_CFG
TMC8462_ESC_WD_OUT_MASK_POL
TMC8462_ESC_WD_OE_POL
TMC8462_ESC_WD_IN_MASK_POL
TMC8462_ESC_WD_MAX
TMC8462_ESC_HV_STATUS
TMC8462_ESC_SYNC_EVT_COUNTER
TMC8462_ESC_SM0_START
TMC8462_ESC_SM0_LEN
TMC8462_ESC_SM0_CTRL_STATUS
TMC8462_ESC_MB_STATUS
TMC8462_ESC_SM1_START
TMC8462_ESC_SM1_LEN
TMC8462_ESC_SM2_START
TMC8462_ESC_SM2_LEN
TMC8462_ESC_SM2_CTRL_STATUS
TMC8462_ESC_PDO_STATUS
TMC8462_ESC_SM3_START
TMC8462_ESC_SM3_LEN
TMC8462_MFCFG_INPUT
TMC8462_MFCFG_LOW
TMC8462_MFCFG_HIGH
TMC8462_MFCFG_TRI
TMC8462_MFCFG_ENCA_P
TMC8462_MFCFG_ENCA_N
TMC8462_MFCFG_ENCB_P
TMC8462_MFCFG_ENCB_N
TMC8462_MFCFG_ENCN_P
TMC8462_MFCFG_ENCN_N
TMC8462_MFCFG_SPI_SCK
TMC8462_MFCFG_SPI_MOSI
TMC8462_MFCFG_SPI_MISO
TMC8462_MFCFG_SPI_CSN0
TMC8462_MFCFG_SPI_CSN1
TMC8462_MFCFG_SPI_CSN2
TMC8462_MFCFG_SPI_CSN3
TMC8462_MFCFG_IIC_SCL
TMC8462_MFCFG_IIC_SDA
TMC8462_MFCFG_SD_STEP0
TMC8462_MFCFG_SD_DIR0
TMC8462_MFCFG_SD_STEP1
TMC8462_MFCFG_SD_DIR1
TMC8462_MFCFG_SD_STEP2
TMC8462_MFCFG_SD_DIR2
TMC8462_MFCFG_SD_STEP0_N
TMC8462_MFCFG_SD_DIR0_N
TMC8462_MFCFG_SD_STEP1_N
TMC8462_MFCFG_SD_DIR1_N
TMC8462_MFCFG_SD_STEP2_N
TMC8462_MFCFG_SD_DIR2_N
TMC8462_MFCFG_PWM_HS0
TMC8462_MFCFG_PWM_LS0
TMC8462_MFCFG_PWM_HS1
TMC8462_MFCFG_PWM_LS1
TMC8462_MFCFG_PWM_HS2
TMC8462_MFCFG_PWM_LS2
TMC8462_MFCFG_PWM_HS3
TMC8462_MFCFG_PWM_LS3
TMC8462_MFCFG_GPI0
TMC8462_MFCFG_GPI1
TMC8462_MFCFG_GPI2
TMC8462_MFCFG_GPI3
TMC8462_MFCFG_GPI4
TMC8462_MFCFG_GPI5
TMC8462_MFCFG_GPI6
TMC8462_MFCFG_GPI7
TMC8462_MFCFG_GPI8
TMC8462_MFCFG_GPI9
TMC8462_MFCFG_GPI10
TMC8462_MFCFG_GPI11
TMC8462_MFCFG_GPI12
TMC8462_MFCFG_GPI13
TMC8462_MFCFG_GPI14
TMC8462_MFCFG_GPI15
TMC8462_MFCFG_GPO0
TMC8462_MFCFG_GPO1
TMC8462_MFCFG_GPO2
TMC8462_MFCFG_GPO3
TMC8462_MFCFG_GPO4
TMC8462_MFCFG_GPO5
TMC8462_MFCFG_GPO6
TMC8462_MFCFG_GPO7
TMC8462_MFCFG_GPO8
TMC8462_MFCFG_GPO9
TMC8462_MFCFG_GPO10
TMC8462_MFCFG_GPO11
TMC8462_MFCFG_GPO12
TMC8462_MFCFG_GPO13
TMC8462_MFCFG_GPO14
TMC8462_MFCFG_GPO15
TMC8462_MFCFG_DAC0
TMC8462_MFCFG_PWM_PULSE_A
TMC8462_MFCFG_PWM_PULSE_CENTER
TMC8462_MFCFG_PWM_PULSE_B
TMC8462_MFCFG_PWM_PULSE_AB
TMC8462_MFCFG_PWM_PULSE_ZERO
TMC8462_PDI_DISABLED
TMC8462_PDI_4DI
TMC8462_PDI_4DO
TMC8462_PDI_2DI_2DO
TMC8462_PDI_DIO
TMC8462_PDI_SPI_SLAVE
TMC8462_PDI_OSIO
TMC8462_PDI_EC_BRIDGE
TMC8462_PDI_16BIT_ASYNC
TMC8462_PDI_8BIT_ASYNC
TMC8462_PDI_16BIT_SYNC
TMC8462_PDI_8BIT_SYNC
TMC8462_PDI_32DI
TMC8462_PDI_24DI_8DO
TMC8462_PDI_16DI_16DO
TMC8462_PDI_8DI_24DO
TMC8462_PDI_32DO
TMC8462_PDI_ON_CHIP_BUS
file TMC846x/TMC8462_Register.h

Defines

TMC8462_ENC_MODE
TMC8462_ENC_STATUS
TMC8462_ENC_X_W
TMC8462_ENC_X_R
TMC8462_ENC_CONST
TMC8462_ENC_LATCH
TMC8462_SPI_RX_DATA
TMC8462_SPI_TX_DATA
TMC8462_SPI_CONF
TMC8462_SPI_STATUS
TMC8462_SPI_LENGTH
TMC8462_SPI_TIME
TMC8462_IIC_TIMEBASE
TMC8462_IIC_CONTROL
TMC8462_IIC_STATUS
TMC8462_IIC_ADDRESS
TMC8462_IIC_DATA_R
TMC8462_IIC_DATA_W
TMC8462_SD_SR0
TMC8462_SD_SR1
TMC8462_SD_SR2
TMC8462_SD_SC0
TMC8462_SD_SC1
TMC8462_SD_SC2
TMC8462_SD_ST0
TMC8462_SD_ST1
TMC8462_SD_ST2
TMC8462_SD_CMP0
TMC8462_SD_CMP1
TMC8462_SD_CMP2
TMC8462_SD_NEXTSR0
TMC8462_SD_NEXTSR1
TMC8462_SD_NEXTSR2
TMC8462_SD_SL
TMC8462_SD_DLY
TMC8462_SD_CFG
TMC8462_PWM_CFG
TMC8462_PWM1
TMC8462_PWM2
TMC8462_PWM3
TMC8462_PWM4
TMC8462_PWM1_CNTRSHFT
TMC8462_PWM2_CNTRSHFT
TMC8462_PWM3_CNTRSHFT
TMC8462_PWM4_CNTRSHFT
TMC8462_PULSE_B_PULSE_A
TMC8462_PULSE_LENGTH
TMC8462_GPO
TMC8462_GPI
TMC8462_GPIO_CONFIG
TMC8462_DAC_VAL
TMC8462_MFCIO_IRQ_CFG
TMC8462_MFCIO_IRQ_FLAGS
TMC8462_WD_TIME
TMC8462_WD_CFG
TMC8462_WD_OUT_MASK_POL
TMC8462_WD_OE_POL
TMC8462_WD_IN_MASK_POL
TMC8462_WD_MAX
TMC8462_HV_STATUS
TMC8462_SYNC_EVT_COUNTER
TMC8462_HVIO_CFG
TMC8462_SWREG_CONF
TMC8462_AL_OVERRIDE
TMC8462_TEST_BIST
TMC8462_TEST_ON_CFG
TMC8462_ESC_CFG_MFCIO_0
TMC8462_ESC_CFG_MFCIO_1
TMC8462_ESC_CFG_MFCIO_2
TMC8462_ESC_CFG_MFCIO_3
TMC8462_ESC_CFG_MFCIO_4
TMC8462_ESC_CFG_MFCIO_5
TMC8462_ESC_CFG_MFCIO_6
TMC8462_ESC_CFG_MFCIO_7
TMC8462_ESC_CFG_MFCIO_8
TMC8462_ESC_CFG_MFCIO_9
TMC8462_ESC_CFG_MFCIO_10
TMC8462_ESC_CFG_MFCIO_11
TMC8462_ESC_CFG_MFCIO_12
TMC8462_ESC_CFG_MFCIO_13
TMC8462_ESC_CFG_MFCIO_14
TMC8462_ESC_CFG_MFCIO_15
TMC8462_ESC_CFG_MFCIO_HV_0
TMC8462_ESC_CFG_MFCIO_HV_1
TMC8462_ESC_CFG_MFCIO_HV_2
TMC8462_ESC_CFG_MFCIO_HV_3
TMC8462_ESC_CFG_MFCIO_HV_4
TMC8462_ESC_CFG_MFCIO_HV_5
TMC8462_ESC_CFG_MFCIO_HV_6
TMC8462_ESC_CFG_MFCIO_HV_7
TMC8462_ESC_CFG_HVIO_SLOPE
TMC8462_ESC_CFG_HVIO_WEAK_H
TMC8462_ESC_CFG_HVIO_WEAK_L
TMC8462_ESC_CFG_HVIO_DIFF_EN
TMC8462_ESC_CFG_SWREG_33
TMC8462_ESC_CFG_SWREG_VOUT
TMC8462_ESC_CFG_MEM_BLOCK0
TMC8462_ESC_CFG_MEM_BLOCK1
TMC8462_ESC_ENC_MODE
TMC8462_ESC_ENC_STATUS
TMC8462_ESC_ENC_X_W
TMC8462_ESC_ENC_X_R
TMC8462_ESC_ENC_CONST
TMC8462_ESC_ENC_LATCH
TMC8462_ESC_SPI_RX_DATA
TMC8462_ESC_SPI_TX_DATA
TMC8462_ESC_SPI_CONF
TMC8462_ESC_SPI_STATUS
TMC8462_ESC_SPI_LENGTH
TMC8462_ESC_SPI_TIME
TMC8462_ESC_IIC_TIMEBASE
TMC8462_ESC_IIC_CONTROL
TMC8462_ESC_IIC_STATUS
TMC8462_ESC_IIC_ADDRESS
TMC8462_ESC_IIC_DATA_R
TMC8462_ESC_IIC_DATA_W
TMC8462_ESC_SD_SR0
TMC8462_ESC_SD_SR1
TMC8462_ESC_SD_SR2
TMC8462_ESC_SD_SC0
TMC8462_ESC_SD_SC1
TMC8462_ESC_SD_SC2
TMC8462_ESC_SD_ST0
TMC8462_ESC_SD_ST1
TMC8462_ESC_SD_ST2
TMC8462_ESC_SD_CMP0
TMC8462_ESC_SD_CMP1
TMC8462_ESC_SD_CMP2
TMC8462_ESC_SD_NEXTSR0
TMC8462_ESC_SD_NEXTSR1
TMC8462_ESC_SD_NEXTSR2
TMC8462_ESC_SD_SL
TMC8462_ESC_SD_DLY
TMC8462_ESC_SD_CFG
TMC8462_ESC_PWM_CFG
TMC8462_ESC_PWM1
TMC8462_ESC_PWM2
TMC8462_ESC_PWM3
TMC8462_ESC_PWM4
TMC8462_ESC_PWM1_CNTRSHFT
TMC8462_ESC_PWM2_CNTRSHFT
TMC8462_ESC_PWM3_CNTRSHFT
TMC8462_ESC_PWM4_CNTRSHFT
TMC8462_ESC_PULSE_B_PULSE_A
TMC8462_ESC_PULSE_LENGTH
TMC8462_GPO
TMC8462_GPI
TMC8462_GPIO_CONFIG
TMC8462_DAC_VAL
TMC8462_MFCIO_IRQ_CFG
TMC8462_MFCIO_IRQ_FLAGS
TMC8462_WD_TIME
TMC8462_WD_CFG
TMC8462_WD_OUT_MASK_POL
TMC8462_WD_OE_POL
TMC8462_WD_IN_MASK_POL
TMC8462_WD_MAX
TMC8462_HV_STATUS
TMC8462_SYNC_EVT_COUNTER
TMC8462_MFCFG_INPUT
TMC8462_MFCFG_LOW
TMC8462_MFCFG_HIGH
TMC8462_MFCFG_TRI
TMC8462_MFCFG_ENCA_P
TMC8462_MFCFG_ENCA_N
TMC8462_MFCFG_ENCB_P
TMC8462_MFCFG_ENCB_N
TMC8462_MFCFG_ENCN_P
TMC8462_MFCFG_ENCN_N
TMC8462_MFCFG_SPI_SCK
TMC8462_MFCFG_SPI_MOSI
TMC8462_MFCFG_SPI_MISO
TMC8462_MFCFG_SPI_CSN0
TMC8462_MFCFG_SPI_CSN1
TMC8462_MFCFG_SPI_CSN2
TMC8462_MFCFG_SPI_CSN3
TMC8462_MFCFG_IIC_SCL
TMC8462_MFCFG_IIC_SDA
TMC8462_MFCFG_SD_STEP0
TMC8462_MFCFG_SD_DIR0
TMC8462_MFCFG_SD_STEP1
TMC8462_MFCFG_SD_DIR1
TMC8462_MFCFG_SD_STEP2
TMC8462_MFCFG_SD_DIR2
TMC8462_MFCFG_SD_STEP0_N
TMC8462_MFCFG_SD_DIR0_N
TMC8462_MFCFG_SD_STEP1_N
TMC8462_MFCFG_SD_DIR1_N
TMC8462_MFCFG_SD_STEP2_N
TMC8462_MFCFG_SD_DIR2_N
TMC8462_MFCFG_PWM_HS0
TMC8462_MFCFG_PWM_LS0
TMC8462_MFCFG_PWM_HS1
TMC8462_MFCFG_PWM_LS1
TMC8462_MFCFG_PWM_HS2
TMC8462_MFCFG_PWM_LS2
TMC8462_MFCFG_PWM_HS3
TMC8462_MFCFG_PWM_LS3
TMC8462_MFCFG_GPI0
TMC8462_MFCFG_GPI1
TMC8462_MFCFG_GPI2
TMC8462_MFCFG_GPI3
TMC8462_MFCFG_GPI4
TMC8462_MFCFG_GPI5
TMC8462_MFCFG_GPI6
TMC8462_MFCFG_GPI7
TMC8462_MFCFG_GPI8
TMC8462_MFCFG_GPI9
TMC8462_MFCFG_GPI10
TMC8462_MFCFG_GPI11
TMC8462_MFCFG_GPI12
TMC8462_MFCFG_GPI13
TMC8462_MFCFG_GPI14
TMC8462_MFCFG_GPI15
TMC8462_MFCFG_GPO0
TMC8462_MFCFG_GPO1
TMC8462_MFCFG_GPO2
TMC8462_MFCFG_GPO3
TMC8462_MFCFG_GPO4
TMC8462_MFCFG_GPO5
TMC8462_MFCFG_GPO6
TMC8462_MFCFG_GPO7
TMC8462_MFCFG_GPO8
TMC8462_MFCFG_GPO9
TMC8462_MFCFG_GPO10
TMC8462_MFCFG_GPO11
TMC8462_MFCFG_GPO12
TMC8462_MFCFG_GPO13
TMC8462_MFCFG_GPO14
TMC8462_MFCFG_GPO15
TMC8462_MFCFG_DAC0
TMC8462_MFCFG_PWM_PULSE_A
TMC8462_MFCFG_PWM_PULSE_CENTER
TMC8462_MFCFG_PWM_PULSE_B
TMC8462_MFCFG_PWM_PULSE_AB
TMC8462_MFCFG_PWM_PULSE_ZERO
file TMC8460_Register.h

Defines

TMC8460_ENC_MODE
TMC8460_ENC_STATUS
TMC8460_ENC_X_W
TMC8460_ENC_X_R
TMC8460_ENC_CONST
TMC8460_ENC_LATCH
TMC8460_SPI_RX_DATA
TMC8460_SPI_TX_DATA
TMC8460_SPI_CONF
TMC8460_SPI_STATUS
TMC8460_SPI_LENGTH
TMC8460_SPI_TIME
TMC8460_SD_SR0
TMC8460_SD_SC0
TMC8460_SD_ST0
TMC8460_SD_SL0
TMC8460_SD_DLY0
TMC8460_SD_CFG0
TMC8460_PWM_MAXCNT
TMC8460_PWM_CHOPMODE
TMC8460_PWM_ALIGNMENT
TMC8460_PWM_POLARITIES
TMC8460_PWM1
TMC8460_PWM2
TMC8460_PWM3
TMC8460_PWM1_CNTRSHFT
TMC8460_PWM2_CNTRSHFT
TMC8460_PWM3_CNTRSHFT
TMC8460_PULSE_A
TMC8460_PULSE_B
TMC8460_PULSE_LENGTH
TMC8460_BBM_H
TMC8460_BBM_L
TMC8460_GPO_OUT_VAL
TMC8460_GPI_IN_VAL
TMC8460_GPIO_CONFIG
TMC8460_MFCIO_IRQ_CFG
TMC8460_MFCIO_IRQ_FLAGS
TMC8460_WD_TIME
TMC8460_WD_CFG
TMC8460_WD_OUT_MASK_POL
TMC8460_WD_OE_POL
TMC8460_WD_IN_MASK_POL
TMC8460_WD_MAX
TMC8460_AL_STATE_OVERRIDE
TMC8460_MAPCFG_ENC_MODE
TMC8460_MAPCFG_ENC_STATUS
TMC8460_MAPCFG_ENC_X_W
TMC8460_MAPCFG_ENC_X_R
TMC8460_MAPCFG_ENC_CONST
TMC8460_MAPCFG_ENC_LATCH
TMC8460_MAPCFG_SPI_RX_DATA
TMC8460_MAPCFG_SPI_TX_DATA
TMC8460_MAPCFG_SPI_CONF
TMC8460_MAPCFG_SPI_STATUS
TMC8460_MAPCFG_SPI_LENGTH
TMC8460_MAPCFG_SPI_TIME
TMC8460_MAPCFG_SD_SR
TMC8460_MAPCFG_SD_SC
TMC8460_MAPCFG_SD_ST
TMC8460_MAPCFG_SD_SL
TMC8460_MAPCFG_SD_DLY
TMC8460_MAPCFG_SD_CFG
TMC8460_MAPCFG_PWM_MAXCNT
TMC8460_MAPCFG_PWM_CHOPMODE
TMC8460_MAPCFG_PWM_ALIGNMENT
TMC8460_MAPCFG_PWM_POLARITIES
TMC8460_MAPCFG_PWM_VALUE_1
TMC8460_MAPCFG_PWM_VALUE_2
TMC8460_MAPCFG_PWM_VALUE_3
TMC8460_MAPCFG_PWM_CNTRSHIFT_1
TMC8460_MAPCFG_PWM_CNTRSHIFT_2
TMC8460_MAPCFG_PWM_CNTRSHIFT_3
TMC8460_MAPCFG_PWM_PULSE_A
TMC8460_MAPCFG_PWM_PULSE_B
TMC8460_MAPCFG_PWM_PULSE_LENGTH
TMC8460_MAPCFG_PWM_BBM_H
TMC8460_MAPCFG_PWM_BBM_L
TMC8460_MAPCFG_GPO_OUT_VAL
TMC8460_MAPCFG_GPI_IN_VAL
TMC8460_MAPCFG_GPIO_CONFIG
TMC8460_MAPCFG_IRQ_CFG
TMC8460_MAPCFG_IRQ_FLAGS
TMC8460_MAPCFG_WD_TIME
TMC8460_MAPCFG_WD_CFG
TMC8460_MAPCFG_WD_OUT_MASK_POL
TMC8460_MAPCFG_WD_OE_POL
TMC8460_MAPCFG_WD_IN_MASK_POL
TMC8460_MAPCFG_WD_MAX
TMC8460_MAPCFG_ECAT_WRITE
TMC8460_MAPCFG_TRIGGER_ALWAYS
TMC8460_MAPCFG_TRIGGER_SYNC0
TMC8460_MAPCFG_TRIGGER_SYNC1
TMC8460_MAPCFG_TRIGGER_LATCH0
TMC8460_MAPCFG_TRIGGER_LATCH1
TMC8460_MAPCFG_TRIGGER_SOF
TMC8460_MAPCFG_TRIGGER_EOF
TMC8460_MAPCFG_TRIGGER_PDI_CHIPSEL
TMC8460_MAPCFG_TRIGGER_PDI_CHIPDESEL
TMC8460_MAPCFG_TRIGGER_MFC_CHIPSEL
TMC8460_MAPCFG_TRIGGER_MFC_CHIPDESEL
TMC8460_MAPCFG_TRIGGER_BEFORE
TMC8460_MAPCFG_TRIGGER_AFTER
TMC8460_MAPCFG_TRIGGER_PWM_ZERO
TMC8460_MAPCFG_TRIGGER_DATA_CHANGE
TMC8460_MAPCFG_TRIGGER_IMMEDIATELY
TMC8460_MEMADDR_ENC_MODE
TMC8460_MEMADDR_ENC_X_W
TMC8460_MEMADDR_ENC_CONST
TMC8460_MEMADDR_SPI_TX_DATA
TMC8460_MEMADDR_SPI_CONF
TMC8460_MEMADDR_SPI_LENGTH
TMC8460_MEMADDR_SPI_TIME
TMC8460_MEMADDR_SD_SR
TMC8460_MEMADDR_SD_ST
TMC8460_MEMADDR_SD_SL
TMC8460_MEMADDR_SD_DLY
TMC8460_MEMADDR_SD_CFG
TMC8460_MEMADDR_PWM_MAXCNT
TMC8460_MEMADDR_PWM_CHOPMODE
TMC8460_MEMADDR_PWM_ALIGNMENT
TMC8460_MEMADDR_PWM_POLARITIES
TMC8460_MEMADDR_PWM_VALUE_1
TMC8460_MEMADDR_PWM_VALUE_2
TMC8460_MEMADDR_PWM_VALUE_3
TMC8460_MEMADDR_PWM_CNTRSHIFT_1
TMC8460_MEMADDR_PWM_CNTRSHIFT_2
TMC8460_MEMADDR_PWM_CNTRSHIFT_3
TMC8460_MEMADDR_PWM_PULSE_A
TMC8460_MEMADDR_PWM_PULSE_B
TMC8460_MEMADDR_PWM_PULSE_LENGTH
TMC8460_MEMADDR_PWM_BBM_H
TMC8460_MEMADDR_PWM_BBM_L
TMC8460_MEMADDR_GPO_OUT_VAL
TMC8460_MEMADDR_GPIO_CONFIG
TMC8460_MEMADDR_IRQ_CFG
TMC8460_MEMADDR_WD_TIME
TMC8460_MEMADDR_WD_CFG
TMC8460_MEMADDR_WD_OUT_MASK_POL
TMC8460_MEMADDR_WD_OE_POL
TMC8460_MEMADDR_WD_IN_MASK_POL
TMC8460_MEMADDR_ENC_STATUS
TMC8460_MEMADDR_ENC_X_R
TMC8460_MEMADDR_ENC_LATCH
TMC8460_MEMADDR_SPI_RX_DATA
TMC8460_MEMADDR_SPI_STATUS
TMC8460_MEMADDR_SD_SC
TMC8460_MEMADDR_GPI_IN_VAL
TMC8460_MEMADDR_IRQ_FLAGS
TMC8460_MEMADDR_WD_MAX
TMC8460_SDCFG_DISABLE
TMC8460_SDCFG_CONTINOUS
TMC8460_SDCFG_STEP_POL
TMC8460_SDCFG_DIR_POL
TMC8460_SDCFG_COUNT_CLEAR
TMC8460_SDCFG_TOGGLE
TMC8460_AL_OVR
file LinearRamp.c
#include “LinearRamp.h”

Functions

void tmc_linearRamp_init(TMC_LinearRamp *linearRamp)
void tmc_linearRamp_computeRampVelocity(TMC_LinearRamp *linearRamp)
void tmc_linearRamp_computeRampPosition(TMC_LinearRamp *linearRamp)
file LinearRamp.h
#include “tmc/helpers/API_Header.h”
#include “tmc/helpers/Functions.h”

Functions

void tmc_linearRamp_init(TMC_LinearRamp *linearRamp)
void tmc_linearRamp_computeRampVelocity(TMC_LinearRamp *linearRamp)
void tmc_linearRamp_computeRampPosition(TMC_LinearRamp *linearRamp)
file LinearRamp1.c
#include “LinearRamp1.h”
#include “tmc/helpers/Functions.h”

Functions

void tmc_ramp_linear_init(TMC_LinearRamp *linearRamp)
void tmc_ramp_linear_set_enabled(TMC_LinearRamp *linearRamp, bool enabled)
void tmc_ramp_linear_set_maxVelocity(TMC_LinearRamp *linearRamp, uint32_t maxVelocity)
void tmc_ramp_linear_set_targetPosition(TMC_LinearRamp *linearRamp, int32_t targetPosition)
void tmc_ramp_linear_set_rampPosition(TMC_LinearRamp *linearRamp, int32_t rampPosition)
void tmc_ramp_linear_set_targetVelocity(TMC_LinearRamp *linearRamp, int32_t targetVelocity)
void tmc_ramp_linear_set_rampVelocity(TMC_LinearRamp *linearRamp, int32_t rampVelocity)
void tmc_ramp_linear_set_acceleration(TMC_LinearRamp *linearRamp, int32_t acceleration)
void tmc_ramp_linear_set_mode(TMC_LinearRamp *linearRamp, TMC_LinearRamp_Mode mode)
void tmc_ramp_linear_set_precision(TMC_LinearRamp *linearRamp, uint32_t precision)
void tmc_ramp_linear_set_homingDistance(TMC_LinearRamp *linearRamp, uint32_t homingDistance)
void tmc_ramp_linear_set_stopVelocity(TMC_LinearRamp *linearRamp, uint32_t stopVelocity)
bool tmc_ramp_linear_get_enabled(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_maxVelocity(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_get_targetPosition(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_get_rampPosition(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_get_targetVelocity(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_get_rampVelocity(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_get_acceleration(TMC_LinearRamp *linearRamp)
TMC_LinearRamp_State tmc_ramp_linear_get_state(TMC_LinearRamp *linearRamp)
TMC_LinearRamp_Mode tmc_ramp_linear_get_mode(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_precision(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_acceleration_limit(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_velocity_limit(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_homingDistance(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_stopVelocity(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_compute(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_compute_velocity(TMC_LinearRamp *linearRamp)
void tmc_ramp_linear_compute_position(TMC_LinearRamp *linearRamp)
file LinearRamp1.h
#include “tmc/helpers/API_Header.h”
#include “Ramp.h”

Defines

TMC_RAMP_LINEAR_DEFAULT_PRECISION
TMC_RAMP_LINEAR_DEFAULT_HOMING_DISTANCE
TMC_RAMP_LINEAR_DEFAULT_STOP_VELOCITY

Enums

enum TMC_LinearRamp_Mode

Values:

enumerator TMC_RAMP_LINEAR_MODE_VELOCITY
enumerator TMC_RAMP_LINEAR_MODE_POSITION
enum TMC_LinearRamp_State

Values:

enumerator TMC_RAMP_LINEAR_STATE_IDLE
enumerator TMC_RAMP_LINEAR_STATE_DRIVING
enumerator TMC_RAMP_LINEAR_STATE_BRAKING

Functions

void tmc_ramp_linear_init(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_compute(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_compute_velocity(TMC_LinearRamp *linearRamp)
void tmc_ramp_linear_compute_position(TMC_LinearRamp *linearRamp)
void tmc_ramp_linear_set_enabled(TMC_LinearRamp *linearRamp, bool enabled)
void tmc_ramp_linear_set_maxVelocity(TMC_LinearRamp *linearRamp, uint32_t maxVelocity)
void tmc_ramp_linear_set_targetPosition(TMC_LinearRamp *linearRamp, int32_t targetPosition)
void tmc_ramp_linear_set_rampPosition(TMC_LinearRamp *linearRamp, int32_t rampPosition)
void tmc_ramp_linear_set_targetVelocity(TMC_LinearRamp *linearRamp, int32_t targetVelocity)
void tmc_ramp_linear_set_rampVelocity(TMC_LinearRamp *linearRamp, int32_t rampVelocity)
void tmc_ramp_linear_set_acceleration(TMC_LinearRamp *linearRamp, int32_t acceleration)
void tmc_ramp_linear_set_mode(TMC_LinearRamp *linearRamp, TMC_LinearRamp_Mode mode)
void tmc_ramp_linear_set_precision(TMC_LinearRamp *linearRamp, uint32_t precision)
void tmc_ramp_linear_set_homingDistance(TMC_LinearRamp *linearRamp, uint32_t homingDistance)
void tmc_ramp_linear_set_stopVelocity(TMC_LinearRamp *linearRamp, uint32_t stopVelocity)
bool tmc_ramp_linear_get_enabled(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_maxVelocity(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_get_targetPosition(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_get_rampPosition(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_get_targetVelocity(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_get_rampVelocity(TMC_LinearRamp *linearRamp)
int32_t tmc_ramp_linear_get_acceleration(TMC_LinearRamp *linearRamp)
TMC_LinearRamp_State tmc_ramp_linear_get_state(TMC_LinearRamp *linearRamp)
TMC_LinearRamp_Mode tmc_ramp_linear_get_mode(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_precision(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_acceleration_limit(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_velocity_limit(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_homingDistance(TMC_LinearRamp *linearRamp)
uint32_t tmc_ramp_linear_get_stopVelocity(TMC_LinearRamp *linearRamp)
file Ramp.c
#include “Ramp.h”

Functions

void tmc_ramp_init(void *ramp, TMC_RampType type)
int32_t tmc_ramp_compute(void *ramp, TMC_RampType type, uint32_t delta)
int32_t tmc_ramp_get_rampVelocity(void *ramp, TMC_RampType type)
int32_t tmc_ramp_get_rampPosition(void *ramp, TMC_RampType type)
bool tmc_ramp_get_enabled(void *ramp, TMC_RampType type)
void tmc_ramp_set_enabled(void *ramp, TMC_RampType type, bool enabled)
void tmc_ramp_toggle_enabled(void *ramp, TMC_RampType type)
file Ramp.h
#include “LinearRamp1.h”

Enums

enum TMC_RampType

Values:

enumerator TMC_RAMP_TYPE_LINEAR

Functions

void tmc_ramp_init(void *ramp, TMC_RampType type)
int32_t tmc_ramp_compute(void *ramp, TMC_RampType type, uint32_t delta)
int32_t tmc_ramp_get_rampVelocity(void *ramp, TMC_RampType type)
int32_t tmc_ramp_get_rampPosition(void *ramp, TMC_RampType type)
bool tmc_ramp_get_enabled(void *ramp, TMC_RampType type)
void tmc_ramp_set_enabled(void *ramp, TMC_RampType type, bool enabled)
void tmc_ramp_toggle_enabled(void *ramp, TMC_RampType type)
file test.h

Functions

void my_test_fuction(int a, int b)

this is a test function

Parameters:

  • a –

  • b –

Returns:

void

dir helpers
dir ic
dir MAX22216
dir ramp
dir test
dir tmc
dir TMC2130
dir TMC2160
dir TMC2208
dir TMC2209
dir TMC2224
dir TMC2225
dir TMC2226
dir TMC2240
dir TMC2300
dir TMC2590
dir TMC262
dir TMC2660
dir TMC389
dir TMC4210
dir TMC424
dir TMC429
dir TMC4330
dir TMC4331
dir TMC4361A
dir TMC43xx
dir TMC457
dir TMC4671
dir TMC5031
dir TMC5041
dir TMC5062
dir TMC5072
dir TMC5130
dir TMC5160
dir TMC5240
dir TMC5271
dir TMC5272
dir TMC6100
dir TMC6200
dir TMC7300
dir TMC8461
dir TMC8462
dir TMC846x